Tested with a Dresden Elektronik deRFmega128 module.
Change-Id: I91da3b11b60e78755360b08453ed368d6d396651
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-on: http://openocd.zylin.com/2790
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
At framework level, the resume hook is not protected. Make sure to
not attempt a resume if the target is not halted.
Change-Id: I4dd1975a95d6c513bd4f4e999e496bc11182a97a
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Basically port a fix that was already done for the cortex_a target.
Change-Id: I4cf4519159bda03ed611bc0b2e340a5dad2d85fe
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Instead of supplying a local, preinitialized "dscr" variable, use the
cached value from arm_dpm, which is kept up-to-date anyway.
Change-Id: I06d548d4dc6db68b9d984c83ed026fa9069d7875
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
arm commands are mostly unusable anyway, remove them. to be replaced
by aarch64 specific commands later
Change-Id: Ie994771bc0e86cff1c26f68f1f51ce8ec352a509
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
"currentel" special register is not accessible in debug state.
Change-Id: I9022b01b423cd9ae8227ed018d6166078ba44832
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Make debug and error messages more informative, fix spelling and
formatting errors
Change-Id: I7245f42c5153bcc95676270814d30e91c113aaed
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
struct arm_reg::value[] must be 8 byte to hold a 64bit register value.
Change-Id: If253e90731d0ee855eafd9d7b63b91f84630cc7c
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Move clearing of DSCR "Sticky Error" condition to the
exception handling function. Clear once on entering debug state.
Change-Id: Iec1d09d6f2d9cdd7e92953da5ea19f3e399ca12c
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
recommended for Corte-A8 cores, not sure if necessary
for ARMv8 based cores as well.
Change-Id: Ibcb36170c5fac6a6b132de17f734c70a56919f9b
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Remove register cache invalidation and target state changes that are
handled appropriately in other functions.
Change-Id: Ic903f41ddc267f4b8765ea022bd4d6da1017e21f
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
When a PE is in Aarch32 state and gdb asks for a target description,
provide a register view compatible with the "org.gnu.gdb.arm.core"
feature. Only current-mode registers are exported, banked registers are
not visible.
Change-Id: I99a85d94831cf597fe8cff6a0a1818ce0a33613b
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
There's no access to TTBR in EL0. Circumvent by moving the PE to EL1
before reading, and switch back to original mode afterwards.
Change-Id: I22891b958d3d7e6fad1cb27183c192d975d63d89
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
When halting a group of PEs through CTI, HDE must be set in EDSCR for
all of them.
Change-Id: Iaa4bc0b0fe31e46a463c709d8274023225affd85
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
When an armv8-a PE causes an exception while halted, e.g. by performing
a prohibited memory or register access, its state is affected in the
same way as if it was running. That means, a number of registers is
overwritten (notably DLR and DSPSR, but also others) and also
potentially the exception level and therefore also the PE state can
change. This state must be restored before resuming normal operation.
This is done by marking the relevant cached registers "dirty" so that
they are written back before resume.
Change-Id: I9b6967a62d7cb23a477a9f7839f8d2b7087eed09
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Use proper T32 opcodes for cache identification when the PE is in
Aarch32 state
Change-Id: I9cd9169409889273a3fd61167f388e68d8dde86d
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
DCPS only allows to enter higher ELs, for lower ELs you need to
use DRPS. Also, of course the encoding differs between A64 and T32.
Both DCPS and DRPS also clobber DLR and DSPSR, which then need to be
restored on resume.
Change-Id: Ifa3dcfa94212702e57170bd59fd0bb25495fb6fd
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
All register access is now performed through common read/write
functions, which delegate the actual register access to the
armv8_common object. armv8_common contains function pointers
to direct read and write requests to the respective low-level
functions for each PE state.
The respective read/write functions are selected on debug state
entry.
At the same time, T32 opcodes are now formatted for ITR in
dpmv8_exec_opcode() and the T32_FMTITR macro is removed from global
visibility.
Change-Id: I9eaef017c7cc9e0c531e693c534901bfdbdb842c
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Read registers based on current EL instead of PE mode.
Change-Id: I05d3219ac1bf8585e9f4f024a7e8599fea0913b6
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
There's no access to system control register in EL0. Circumvent by
moving the PE to EL1 before reading, and switch back to original mode
afterwards.
Change-Id: I309f4eea5597ffc88fc892e9bbb826982e8a44ec
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Translate from cpsr value to "enum arm_mode" by shifting up 4 bits and
filling the lowest nibble with 0xF.
Change-Id: Ic32186104b0c29578c4f6f99e04840ab88a0017b
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Use AT commands to translate virtual to physical addresses based on
current MMU configuration.
Change-Id: I1bbd7d674c435541b617b17022fa9f7f0f01bdab
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Set HDE bit through helper function instead of manual mem_ap access.
Change-Id: I68c157870f3f3c47a875d425ade6e975d8075424
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
The artificial "os_border" doesn't exist in aarch64 state and is wrong
for aarch32 state as well. Remove it.
Change-Id: I7c673a1404b03aa78dbd505e115fa3a93f7ca05f
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Update cache identification to match functionality present in
armv7a_cache.c
Change-Id: I2dc4bee80f5a22b8728334d40331c183d1406f27
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Move all DPM related functions from aarch64.c to armv8_dpm.c.
Change-Id: I43404ff5db414ae898787a523d3219e5bee44889
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Add database for common, equivalent opcodes for Aarch32 and
Aarch64 execution states
Revisit all functions that access Aarch64 specific registers
or use Aarch64 opcodes and rewrite them to act depending on
current state of the core.
Add core register access functions for Aarch32 state
Add function to determine the core execution state without
reading DSPSR.
Change-Id: I345e9f6d682fb4ba454e4b1d16bb5e1b27570691
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Set up CTI so that halt and resume requests get routed to all PEs in the
SMP group.
Change-Id: Ie92cfd3fe54632e5fdc049a6bf5b24b99451a8c9
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
For now only D-Cache flush (Clean&Invalidate) and I-Cache
invalidate are implemented. That's enough for software breakpoints.
Change-Id: I8e96d645a230b51e3490403f4564e59ba6a76cf3
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
On live hardware, interrupts will happen while the core is
held for stepping. The next step will most of the time execute an
interrupt service instead of the next line of code, which is not
what you expect. Disable interrupts through DSCR before resuming
for a step, and re-enable them again after the step happened.
This should be made configurable, like on cortex_a target.
Change-Id: I94d8ffb58cf7579dedb66bc756b7eb6828b6e8e4
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
External debuggers need to use HLT, not BRK. HLT generates a halting
debug event while BRK generates a debug exception for self-hosted
debugging.
Change-Id: I24024b83668107f73a14cc75d951134917269e5c
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Don't report breakpoint as debug reason when halt is due to a
single-step event.
Change-Id: Ie6c3ca1e5427c73eb726a038301b6a29a47d1217
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
According to gdb documentation, a register "cpsr" is expected if
aarch64 features are announced. Also, the value buffer must be
capable of holding a 64bit value (8 byte, not 4)
Change-Id: I7aec4e84fa87eadb26797acd0d16c988b9852616
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reduce complexity of memory access functions, anyway there are no ARMv8
platforms that actually contain an AHB-AP at all. while at it, fix
virt-to-phys function signatures to expect target_addr_t.
Change-Id: I55a369686f42993988b6323e5a77f38de12530a9
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
The step command optionally carries a resume address. In this case,
stepping should start not at the current PC, but at the given address.
Change-Id: Id5792a3745f470cf29efa90c63d65f33d36f6b25
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
When armv8_set_core_reg is used to set the value of
the CPSR, also update the internal architecture state.
Change-Id: I5f6a2be6fde8d91ec3352d8ba23c4aa90eb02977
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Make DSCR_RUN_MODE() usable for armv8 and arm7 debug
Change-Id: Ib3ba3000d5b6aa03e590f3ca4969e677474eb12c
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Aarch64 state has different PSTATE and exception level model.
Correct the printout e.g. in poll command.
Change-Id: I1820fd1836c7076ae0aa405fa335fd1a14a2e5b3
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Aarch64 has 34 registers, but use ARMV8_LAST_REG instead of
raw integer constant.
Change-Id: I86481899ade74f27fc90eff9f367d444c03e535e
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Page table layout in aarch64 is very different from armv7-a layout.
Remove the incorrect handling, to be replaced correct armv8 code in a
later patch
Change-Id: I64c728a72a24f9f4177726ccc07a02a8ca0d56ce
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Not only null control but also value of the breakpoint when it is
removed.
Change-Id: Id99c7e3644729c64e563f1fa8b0577f350be6a98
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
armv8 breakpoint register spacing is 16, not 4 as in armv7-a
Change-Id: I0d49d06878a0c9dab35cde478064e5366f01a8e0
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Use correct instructions to access CLIDR, CSSELR and CCSIDR.
Change-Id: I319b96c03a44fdb59fcb18a00f816f6af0261f0a
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
- armv8 EDSCR has no ITR_EN bit, ITR is always enabled. Writes to this
bit are ignored but we should not do them anyway
- use dpmv8 function to report the reason for debug entry
- WFAR is a 64bit register
Change-Id: I07b81ecf105ceb7c3ae2f764bb408eb973c1d1de
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Use opcode definitions from armv8_opcodes.h where appropriate
Change-Id: Iead33fb8e62eb2dd2419ef8932f7d46c087f51a8
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
The system control register has several instances, depending on the
exception level. Make sure to access always access the correct one.
Change-Id: I9e867f4dbd9625762042f20ed905064ea4e3270f
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Flush DTRRX with a dummy read if it's full, clear sticky errors
by writing CSE bit to EDRCR register.
Change-Id: Ia42ae9d3859ba6cbe892d48584e21acdd4e25c84
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Use configured CTI base address instead of hardcoded value, if
available.
Use symbolic constants instead of raw hex offsets.
Trim halt and resume code to what is actually necessary.
Change-Id: I4997c2bcca7cebf5ad78859a6a12abe8639594ed
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Fix 64bit address setting
Fix register spacing (16 instead of 4)
Set HMC bit for all but linked context match breakpoints,
where the bit is ignored anyway
Change-Id: I48428f39154a6fe5fadc075ca918d1500a0bb241
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Change the signature of aarch64_(read|write)_dcc[_64] to take a
"struct armv8_common *" as the context to operate on. No functional
change.
Change-Id: Ie501113f65ea22aff2eee173ec717f6908a63494
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Add or move ARMv8 related dpm function to their own source module
Change-Id: Id93d50be0b8635bd40ddb2a74fe8746ff840d736
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Some vendors don't fully populate the ROM table, e.g. BCM2357 (used in
Raspberry Pi 3) doesn't list CTI, however it is mandatory for halting
an ARMv8 core and therefore it's always present (and required),
regardless of the ROM table listing it or not.
Change-Id: Ia18a4f1b5b931ccd19805b188ebf737c837c6b54
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
When using hardware step for doing stepping, the existing DSCR records
the event as external debug request. This will generate a SIGINT event
to GDB and causes it to stop the stepping process.
For aarch64, read DESR to check if the event is a hardware step and set
state to DBG_REASON_SINGLESTEP.
With this patch, GDB can now do source level stepping.
Change-Id: I1d06f819578c74b3ac17376c67f882adddea1f52
Signed-off-by: David Ung <david.ung.42@gmail.com>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Enable resuming to an address.
Change-Id: I29c7d3b56f6cbf8b3cd02c93733fc96f45000af3
Signed-off-by: David Ung <david.ung.42@gmail.com>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Use AARCH64's hardware step event to do stepping.
Change-Id: I2d029ceeadd381913d0c3355c8787b11dacff7f7
Signed-off-by: pierre Kuo <vichy.kuo@gmail.com>
Signed-off-by: David Ung <david.ung.42@gmail.com>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Ensure that we allow halting debug mode after setting breakpoint
Change-Id: I6f0d7a4a4775a93c133fb1ec31dfe3324d9f7395
Signed-off-by: David Ung <david.ung.42@gmail.com>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Enable the use of hardware breakpoint on AARCH64.
Change-Id: I59caaa6d92ac60278af8938625b1790a1787372f
Signed-off-by: pierre Kuo <vichy.kuo@gmail.com>
Signed-off-by: David Ung <david.ung.42@gmail.com>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Add various function to read/write ARMv8 registers.
Change-Id: I16f2829bdd0e87b050a51e414ff675d5c21bcbae
Signed-off-by: David Ung <david.ung.42@gmail.com>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Add new enum ARM_STATE_AARCH64 to the list of possible states.
Change-Id: I3cb2df70f8d5803a63d8374bf3eb75de988e24f8
Signed-off-by: David Ung <david.ung.42@gmail.com>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Accept 64 bit addresses from GDB read memory packet.
Also allow breakpoint/stepping addresses to take 64bit values.
Change-Id: I9bf7b44affe24839cf30897c55ad17fdd29edf14
Signed-off-by: David Ung <david.ung.42@gmail.com>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Define a target_addr_t type to support 32-bit and 64-bit addresses at
the same time. Also define matching TARGET_PRI*ADDR format macros as
well as a convenient TARGET_ADDR_FMT.
In targets that are 32-bit (avr32, nds32, arm7/9/11, fm4, xmc1000)
be least invasive by leaving the formatting unchanged apart from the
type;
for generic code adopt TARGET_ADDR_FMT as unified address format.
Don't silently change gdb formatting here, leave that to later.
Add COMMAND_PARSE_ADDRESS() macro to abstract the address type.
Implement it using its own parse_target_addr() function, in the hopes
of catching pointer type mismatches better.
Add '--disable-target64' configure option to revert to previous 32-bit
target address behavior.
Change-Id: I2e91d205862ceb14f94b3e72a7e99ee0373a85d5
Signed-off-by: Dongxue Zhang <elta.era@gmail.com>
Signed-off-by: David Ung <david.ung.42@gmail.com>
[AF: Default to enabling (Paul Fertser), rename macros, simplify]
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
This bug was already attempted to fix in an earlier patch but
merging the "defer-examine" feature caused a regression, which this patch
tries to fix again.
Change-Id: Ie1ad1516f0d7f130d44e003d6c29dcc1a02a82ca
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3951
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
When SRST is never enabled, the global jtag_srst variable is left at its
initial state, that is, -1, and it does _not_ mean SRST is currently
asserted. Same about TRST.
Fixes "reset halt" in cases when srst_pulls_trst but srst usage is not
enabled.
Change-Id: I8d2e9120479de4cfbf5561033926c9ef945eecc9
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3943
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Commit 77a1c01ccb introduced infrastructure
for utilizing protection blocks of different size than erase sector.
Parts of doc/help kept reading 'sector' instead of 'protection block'.
flash_driver_protect() parameter range testing did not switched
to bank->num_prot_blocks.
This change fixes it.
Change-Id: Iec301761190a1a1bcc4cb005a519b9e5e4fede51
Reported-by: Mark Odell <mark@odell.ws>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3917
Tested-by: jenkins
Reviewed-by: Mark Odell <mrfirmware@gmail.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Don't terminate the transaction end-check early if debug power-loss
was detected, without clearing SSTICKYERR.
Change-Id: I83b6a4a20523eea42e48a15297f972a730aa21a8
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3947
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
These libraries override the used CFLAGS without adding the
defaults. This didn't have any effect until change
http://openocd.zylin.com/3870 (ef4c139). Restore by adding
AM_CLAGS to the per-target CFLAGS.
Interestingly, automake seems to clear the CFLAGS for the target
even if the override variable is only mentioned within a non-active
conditional branch, such as the IS_MINGW for the affected libraries.
Change-Id: I805206865e59e3fa33a7ea3c0d3472e51219351c
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3927
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Fix build failure when libusb dev files are not available and
so usb_blaster is disabled.
Change-Id: I4cda7df689cdb4b62b733cbbab813241cf561e29
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3920
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
This was never used and produces warnings on some systems.
Change-Id: I48d2c5b79890bb2d70c5fae95278b8eb62743398
Reported-by: Tommy Murphy <tm1234@users.sf.net>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3891
Tested-by: jenkins
OpenOCD doesn't (yet) know how to handle HYP mode properly so spsr
register is not getting initialised when OpenOCD connects to a target
stopped in this mode.
Reported on IRC by thinkfat and nearffxx.
Change-Id: I4bda9ba0c582c8e9cacefe708cc4a3d947151f84
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3906
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Chengyu Zheng <chengyu.zheng@polimi.it>
Add a helper to hide the platform-dependent method to get a
canonical, absolute, /-separated path to the executable.
Use this and the relative path from BINDIR to PKGDATADIR to
construct a search path that finds the scripts even if the
installation dir is moved, as long as the structure below $prefix
is maintained.
This method should fully support all the tricks you can to with
autotools to customize the installed layout such as overriding the
default directories at configure-time and overriding the configured
directories at build-time.
The exe path detection methods are combined from
http://openocd.zylin.com/3388 by Rick Foos and
http://openocd.zylin.com/3537 by Steven Stallion, as well as tips
found all over internet.
Change-Id: Ifc9cc9dd0bf52fbd67b1b0f2383318cda0c422c4
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Signed-off-by: Steven Stallion <sstallion@gmail.com>
Reviewed-on: http://openocd.zylin.com/3889
Tested-by: jenkins
Reviewed-by: Rick Foos <rfoos@solengtech.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
This prevents clean build when --enable-verbose-jtag-io is used.
Change-Id: I5c9e6968cfa425b1f6f92f59156b6ae38cb9af18
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3907
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Output the package version of libjaylink to ease debugging.
Change-Id: I3b9da6d046d140ba850056c98e67bed22c885ee0
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3887
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
The changes since the last update are mainly related to the build
system, preparations and cleanups for the upcoming release.
If there are no bugs reported, this will be the last update before the
libjaylink 0.1.0 release.
Change-Id: I4cec9bb61159f6153690aaf39c1d12ba0baacf9b
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3886
Tested-by: jenkins
Reviewed-by: Xiaofan <xiaofanc@gmail.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
EMUCOM is a way to communicate with a J-Link device via so called
channels. A channel can either be read or written in a single
operation.
Beside the reserved channels for SEGGER, there are channels available to
implement vendor and/or device specific functionalities. For example,
EMUCOM is used on many starter and development kits from Silicon Labs to
access power measurements and various other information and settings.
Change-Id: I6094109c043b34aed4a40ceabe71f30ff896bf1d
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3794
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
The current implementation fails on devices with less than 32k of
flash (such as several devices in the Zero Gecko family) because
the 'assert' assumes (incorrectly) that the number of flash banks
will always be >= 32.
This change ensures that at least one word of lock bits is always read
in order to support devices with less than 32k of flash.
Signed-off-by: Kevlar Harness <software@klystron.com>
Change-Id: I59febe2cb690c893a5057a5f72918e146cf2afe4
Reviewed-on: http://openocd.zylin.com/3806
Tested-by: jenkins
Reviewed-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Avoid special rules to generate array at compile time by shipping
the generated file. Convert to Makefile build like the other
loaders.
Change-Id: I5a05edddcfaff3d395086cd3aa33120f8a7aa9dc
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3864
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Change b0698501b0 fixed
reset for i.MX6 and TI Sitara SoCs but broke reset for
cortex-a targets that use SWD. This patch is a work-
around that forces asserting SRST when SWD is used.
Change-Id: I7e39f2a469b9b4b2b74ad48ba49f2eeb58528921
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3641
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
In support for reproducible builds, see
https://wiki.debian.org/ReproducibleBuilds
Fixes Debian bug #834316.
Change-Id: Id81ec72a87bf6dd99abfd2a0ae074658111bc9a3
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3866
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
This patch adds a Cortex-M private configuration option
that allows setting the acess point during target
creation. This circumvents situations in hybrid systems
when the correct access point can not be automatically
detected.
Change-Id: If313a5250e6e66509bb9080f3498feab7781dced
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3639
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
The Cypress CY7C65215 Dual Channel USB-Serial Bridge Controller [1]
understands the OpenJTAG protocol over a proprietary USB interface.
This patch adds support for the CY7C65215 to the openjtag interface
driver. A new configuration option, `openjtag_variant`, allows to
select the transport to use.
Libusb (1.x or 0.1) is now a hard dependency of the openjtag driver.
This should not be a big issue as libftdi also depends on it.
[1] http://www.cypress.com/?rID=82870
Change-Id: I55ffb3fd9e006eb311e405d9fb836bb119644bfd
Signed-off-by: Vianney le Clément de Saint-Marcq <vianney.leclement@essensium.com>
Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Reviewed-on: http://openocd.zylin.com/2805
Tested-by: jenkins
Reviewed-by: Jiri Kastner <cz172638@gmail.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Simplify hexify() and do not longer use 0 as special case for the
parameter 'count' to determine the string length of the binary input.
Instead, use strlen() outside of the function if needed.
Additionally, fix the return value and return the length of the
converted string. The old function always returned 2 * count.
Also, use more appropriate data types for the function parameters and
add a small documentation.
Change-Id: I133a8ab786b8f7c1296afcaf9c0a0b43881e5112
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3793
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Both the drive strength and slew rate are currently set to very high
values. This causes the waveforms to overshoot and be less reliable
when operating at high speed.
This patch lowers the slew rate and sets the drive strength to 4ma,
improving the waveform output.
Change-Id: I761d35cd64bc54a9e94043904ef00a003b056af0
Signed-off-by: Sean Cross <sean@xobs.io>
Reviewed-on: http://openocd.zylin.com/3707
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Philipp Guehring <pg@futureware.at>
This patch adds support for the qXfer:threads:read packet. In addition
to providing a more efficient method of updating thread state, recent
versions of GDB (7.11.1 and up) can also report remote thread names.
While thread names are not enabled in this patch due to its limited
applicability at the moment, it can be enabled at a later date with
little effort.
As a part of revamping how threads are presented to GDB, extra info
strings for each of the supported RTOSes were updated to match
conventions present in the GDB source code. For more information, see
remote_threads_extra_info() in remote.c. This results in a much smoother
experience when interacting with GDB.
It is also worth mentioning that use of qXfer:threads:read works around
a number of regressions in older versions of GDB regarding remote thread
display. Trust me, it's great.
Change-Id: I97dd6a93c342ceb9b9d0023b6359db0e5604c6e6
Signed-off-by: Steven Stallion <stallion@squareup.com>
Reviewed-on: http://openocd.zylin.com/3559
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
This patch adds support for bridging semihosting to GDB's File-I/O
remote protocol extension. For the most part operations match up 1:1,
however some require a working area to complete successfully, namely
operations that devolve to read, stat, and gettimeofday.
A new command was added to enable support for fileio named `arm
semihosting_fileio`, which ensures that the default behavior remains
intact for those that prefer it.
Finally, redundant logging was removed from the target_arch_state
function; this permits ARM targets to quiesce log output when polling
for a fileio reply. This prevents filling the logs with halt/resume
messages when using semihosting fileio.
Change-Id: Ifbb864fc2373336a501cc0332675b887b552e1ee
Signed-off-by: Steven Stallion <stallion@squareup.com>
Reviewed-on: http://openocd.zylin.com/3566
Tested-by: jenkins
Reviewed-by: Steven Stallion <sstallion@gmail.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Add missing CHIPID values for all SAM4S parts listed in revision K of
Atmel-11100-32-bit Cortex-M4-Microcontroller-SAM4S_Datasheet.pdf. I have
also removed the FWS=6 workaround, as this appears to be a copy-paste error
from the SAM3X family.
Change-Id: I1ce1d82911f39d6fcb8f04034f5c9c9bf2818466
Signed-off-by: Owen Kirby <oskirby@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3837
Tested-by: jenkins
Chip ID and flash layout taken from
Atmel-11102F-ATARM-SAM4C32-SAM4C16-SAM4C8-SAM4C4-Datasheet_27-Mar-15
and tested on a SAM4C32-EK (rev A).
Change-Id: I68aae5b60994c0b5964ea9031d40bc76ba025675
Signed-off-by: Owen Kirby <oskirby@gmail.com>
Reviewed-on: http://openocd.zylin.com/3527
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
This patch introduces RTOS support for uC/OS-III. Currently, only
FPU-less ARM Cortex-M targets are supported. Due to the configurability
of the RTOS, an OpenOCD-specific file must be linked along with the
project to determine the correct offsets within the OS_TCB structure.
In addition to the above, a crash was fixed in rtos_get_gdb_reg_list
such that RTOS support could be used between resets without restarting
OpenOCD and support for the Hg packet was cleaned up.
Change-Id: Ide004a689e6b886185df665c00fb644629eb31d1
Signed-off-by: Steven Stallion <stallion@squareup.com>
Reviewed-on: http://openocd.zylin.com/3556
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
This avoids the secondary binary search if the checksum is different
Change-Id: I986ba7687cea76f30e37a6bca58aabde18198263
Signed-off-by: Evan Hunter <ehunter@broadcom.com>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/2869
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
XMC4300 can reuse the existing XMC4700/XMC4800 sectors support.
Add support for XMC4300 AA to the info command.
Change-Id: Id929a51d20c73bd869a4457ffedc48ad5fa3f2df
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3875
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
current loop sounds to me like 'we don't know what we do, let's do it ten times, maybe we will have luck'.
should be enough to 'ping' debug port using reading CRTL_STAT.
tested on cortex-a8, snapdragon, jetson k1, cortex-r5, cortex-r4
Change-Id: Ibc62ac1eca06c141f4fccd5de7b11350ca1f35fd
Signed-off-by: Jiri Kastner <cz172638@gmail.com>
Tested-by: Jiri Kastner <cz172638@gmail.com>
Reviewed-on: http://openocd.zylin.com/3193
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Liviu Dudau <liviu@dudau.co.uk>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Depending on the Debug implementation the "OS Lock" feature might be
implemented or not. It is not actually depending on the part number of the
implemented ARM core but on the DBGOSLSR.OSLM bits. This patch removes
querying the part number and implements proper parsing of OSLM. Result is
a more generic approach that will work out-of-box on more devices.
Change-Id: I79e052869c2f9af1d7fdedef42faddb7292e7332
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3213
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
The '-defer-examine' option to target create allows declaring targets
that are present on the chain, but not fully functional. They will
be skipped by the initial arp_examine as well as arp_examine after
reset.
Manual examine using 'arp_examine' is needed to examine them, with the
idea that some kind of actions is neeed to bring them to a state where
examine will succeed (if at all possible).
In order to allow value less options to target command, I had to relax
the goi.argc check in jim_target_configure().
Change-Id: I9bf4e8d27eb6476dd9353d15f48965a8cfd5c122
Signed-off-by: Esben Haabendal <esben@haabendal.dk>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3076
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Flash protection set on a device with MANW=1 was lost after reset.
Since #2903 the driver honored MANW bit and issued Write Page command just
for main flash write. This change adds similar technique to
samd_modify_user_row().
Minor code improvements:
samd_check_error() returns error code corresponding to error type
instead of bool.
samd_check_error() does not clear STATUS register if no error bit is set.
Eliminated double error check in call sequence samd_issue_nvmctrl_command()
folowed by samd_check_error().
Missing error code ERROR_FLASH_PROTECTED added to src/flash/common.h.
Change-Id: Icf59ab8803305d0cb3170c8a5089b8f9828b99f8
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3550
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
The target may have already configured its clock to run at a higher frequency and would have set SCKDIV and other dividers at that time. Don't restore the SCKDIV to its default or the flash interface may run too fast and programming will fail.
Otherwise, the default value is fine and there is no need to write SCKDIV.
If the working area is large enough, every fespi_write() results in just
a single algorithm execution.
Change-Id: I87a12e29f50ef6ea1f46fbd1edf440f9e54a2162
Purge all legacy interface configurations so there's no more confusion
over which one to use.
Also remove doc/INSTALL.txt which mentions ft2232 but otherwise just
duplicates what INSTALL says.
Change-Id: Ic94f808f123d4917e600b79309f1272c78a7bb11
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3236
Tested-by: jenkins
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Include libjaylink in DIST_SUBDIRS only if J-Link driver is enabled.
Change-Id: Ib32bb6a5d8fe9bb6e93d968802733eb4973f2c25
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3529
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Do not configure internal libjaylink if libusb-1.0 is not available or
if J-Link driver is disabled (--disable-jlink).
Change-Id: I021bca91dbbc33888a997c664f7836225306c3ef
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3528
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Since OpenOCD doesn't fit most common definitions of the word "daemon",
using it in the documentation is confusing.
Reported by IRC user ohsix.
Change-Id: I688d722771b084b17c2a7af8e83fd64bab6141b8
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3634
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
Since merge of #3149 OpenOCD start with an unresponsive SAMD or SAM4L
resulted in segfaults. First was in cortex_m_assert_reset
(fixed by #3552), second was in samd_handle_reset_deassert()
/sam4l_handle_reset_deassert().
The change replaces mem_ap_write_u32/8 by target_write_u32/8.
It also takes better care about examining and polling target before
debug control registers are set. It prevents lockup when 'reset halt'
is issued on unresponsive cpu.
Change-Id: I2516489f4771aebfc1118d174f527497b8a201ad
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3603
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
The MDR parts have two kinds of memory: main (regular memory-mapped
memory for code and data) and "info" (not memory-mapped). When OpenOCD
is requested to erase the info memory block, it should do just that,
instead of erasing everything including main memory.
Change-Id: I498142ca50d4a7b669b7776180b0dbcea63a5328
Reported-by: Eldar Khayrullin <eldar.khayrullin@mail.ru>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3853
Tested-by: jenkins
Reviewed-by: Eldar Khayrullin <eldar.khayrullin@mail.ru>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
On multi-core systems, with some cores in power-down state, examination
will fail for these cores. Make sure assert- and deassert_reset functions
don't crash due to uninitialized variables.
Change-Id: I472f8d19af2cd3c770c05f3e57a31b35a863b687
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3552
Tested-by: jenkins
Reviewed-by: Jiri Kastner <cz172638@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Add semihosting support for ARMv7-A based processors.
Tested with custom Vybrid VF610 based board
and Pandaboard ES (Rev. B1) board (Cortex-A9).
Change-Id: I6b896a61c1c6a1c5dcf89de834486f82dd6c80a2
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Tsung-Han Lin <tsunghan.tw@gmail.com>
Reviewed-on: http://openocd.zylin.com/2908
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
Nand write command :
nand_fileio_cleanup() always returns ERROR_OK. Due to this,
handle_nand_write_command() retuns ERROR_OK in the case
of nand failure. ERROR_FAIL should be returned.
Flash erase_sector command :
handle_flash_erase_command() always returns ERROR_OK even if
the erase functionality of actual driver implementation fails.
retval value should be returned.
Flash write_bank command :
handle_flash_write_bank_command() returns ERROR_OK even if
fileio_open() and fileio_read fails. ERROR_FAIL should be
returned.
Load_image command :
handle_load_image_command() retuns ERROR_OK even if image_open()
fails. ERROR_FAIL should be returned.
When the buffer is null, breaking the loop without setting
retval = ERROR_FAIL would cause load_image to return ERROR_OK.
Change-Id: Ice32f6036971ab5e8e4dd65edf54b394b001c80c
Signed-off-by: HarishKumar <harishpresent@gmail.com>
Reviewed-on: http://openocd.zylin.com/2431
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
With -Og gcc doesn't perform as many optimizations, and as a result
warns about some code that it wouldn't otherwise warn about.
These fixes all assign values to otherwise uninitialized variables.
Change-Id: I9a6ea5eadd73673891ecfec568b8b00d78b596a5
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: http://openocd.zylin.com/3779
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
To speed up downloads, OpenOCD sends gdb OK when a write is received,
even before the write has actually occurred. The failure is then
returned for the next write. That leads to the following confusing
behavior:
```
(gdb) p/x *((int*)0xdeadbeef)=8675309
$2 = 0x845fed
(gdb) p/x *((int*)0x80000000)=6874742
Cannot access memory at address 0x80000000
```
While it's actually the first write that failed.
This change hacks around this problem by not sending OK for small writes
(len<8) until the write has actually occurred. This does not impact
download speed, since during downloads (almost) all writes will have
much larger length.
Change-Id: I1f8b9bb19b0707487f840df6871e372e4ba228dd
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: http://openocd.zylin.com/3803
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Known big flash parts such as LPC11u68/e68 have a non-uniform memory
organisation, the first 24 sectors are 4k, the rest are 32k.
Change-Id: Icf515152dfc54ec0ca187561d2d63088b9640f14
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3802
Tested-by: jenkins
Reviewed-by: akaWolf
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
struct flash_driver has a default_padded_value field that is similar,
but it can be changed by the user for the specific purpose of padding.
Add a new erased_value field and initialize it for all targets,
particularly stm32lx, xmc4xxx and virtual.
Use this value in core.c:default_flash_mem_blank_check(), the slow path.
Extend the target API to pass erased_value down to target code.
Adding an argument ensures that we catch all callers.
This allows us to merge xmc4xxx.c:xmc4xxx_blank_check_memory() into
armv7m:armv7m_blank_check_memory().
It further allows us to use default_flash_blank_check() in place of
xmc4xxx.c:xmc4xxx_flash_blank_check(), adding a potential slow path
fallback, as well as stm32lx:stm32lx_erase_check(), adding the potential
armv7m fast path with fallback to default_flash_mem_blank_check().
Fix a mips32 code comment while at it (zeroed -> erased).
The armv4_5 and mips32 target implementations will now error out if an
erase value other than 0xff is used, causing default_flash_blank_check()
to fall back to the default_flank_mem_blank_check() slow path.
Change-Id: I39323fbbc4b71c256cd567e439896d0245d4745f
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3497
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Halting didn't work right in slow targets, because some code assumed the
register cache is valid before it was guaranteed to be.
Also made dbus_busy_delay and interrupt_high_delay grow faster, so that
on slow targets it takes less time to learn the correct values.
Change-Id: I948a49d4e3cd0638f5449ab94994406319fd5f42
The current implementation is not suitable for user provided data
because it does not detect invalid inputs in many cases. For example,
the string "aa0xbb" is successfully converted to the 3 bytes: 0xaa,
0x00 and 0xbb. An other example is "aabi" which is successfully
converted to the 2 bytes: 0xaa and 0x0b. Both are obviously incorrect.
Make unhexify() robust on invalid data and use more appropriate data
types for its parameters. Also, add a small documentation for the
function.
Change-Id: Idb799beb86fc608b066c8a76365021ed44c7f890
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3792
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Clean up some type casts and misuses of format specifiers in preparation
for target address type changes.
Change-Id: Idf08286f41bca636e35a09e8ddc1d71af3d6e151
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3717
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Insert a space before parenthesis in logs that we will need to touch
for 64-bit target addresses.
While at it, do a couple more surrounding whitespace fixes.
Change-Id: I1080c0470aab51cf7bd56e67e934344d0bf4c5c1
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3716
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
A space after the format specifier was missing.
Change-Id: Ib67eb0fb0d6e05d765206d30d5e4a74cb41bb47b
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3715
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
working_area_phys_spec clearly refers to the physical, not virtual address.
Change-Id: I639ea00bb5d05e845b8a56815a571375849f1225
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3714
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
This makes it possible to run OpenOCD as unprivileged user on FreeBSD.
Change-Id: If1182d09ad2d51f370ae7e6da02f19c7a21c66c9
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3800
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Even when TRST and SRST are not present in reset_config we still should
set them appropriately (to 1) as we can't tristate them anyhow.
Change-Id: Iec5bcf09340136f5e6ccfb05fa2697c53fa6609f
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3798
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Commit 6d5b4d709c causes failed assert
when JTAG transport is selected:
src/target/arm_adi_v5.h:346: dap_queue_ap_read:
Assertion `ap->dap->ops != ((void *)0)' failed.
As check_security runs early in examine-start event, dap->ops must
be checked.
Change-Id: Ibd8312a3c668fbce834eed9790eabeed794117aa
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3712
Tested-by: jenkins
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
As per the documentation, used "disabled" as the value to disable, as this
is the same value to disable the telnet and tcl server.
Change-Id: Idc4a8580098ec1107dcc6e1f59e817ecdebc38ac
Signed-off-by: Sandeep Mistry <s.mistry@arduino.cc>
Reviewed-on: http://openocd.zylin.com/3175
Tested-by: jenkins
Reviewed-by: Cristian Maglie
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Update to latest libjaylink version and incorporate API changes.
The major change in libjaylink is a rework of the device discovery.
Please test device discovery extensively, especially with multiple
devices connected. All other changes in libjaylink are of minor
importance for OpenOCD.
Change-Id: I9a50e83f59557505ce29809c7762c5df1cec10eb
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3735
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Steven Stallion <stallion@squareup.com>
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Currently, the log verbosity of libjaylink is not accessible from the
user interface. Therefore, changing the log verbosity of libjaylink is
only possible from within the J-Link driver source code which is not
acceptable for end users.
Output the libjaylink log messages through the logging module of
OpenOCD rather than directly to stderr.
Change-Id: I6bf7bf8f4c8a12fb9e955eeced68224545fa0b5c
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3701
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Add log_vprintf_lf() to enable the possibility to output log messages
with a variable argument list.
Change-Id: I7fd6e93db63a7d98f662df2881a42e4d923c3848
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3709
Tested-by: jenkins
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
With -Og gcc doesn't perform as many optimizations, and as a result
warns about some code that it wouldn't otherwise warn about.
These fixes all assign values to otherwise uninitialized variables.
Change-Id: I9a6ea5eadd73673891ecfec568b8b00d78b596a5
Signed-off-by: Tim Newsome <tim@sifive.com>
Cortex-M7 has autoincrement range only 1024 bytes,
surprisingly smaller than M3, M4.
Change-Id: I35ff1f0e093aac4af79f98eb3b8058d4295942d1
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3737
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Large flash parts time out when unlocking. Mass erase time is specified
as 32 seconds worst case for some parts. Automatic mass erase is
probably not using x8 parallelism, though, but a too large timeout
shouldn't hurt.
Also, use the new define instead of hardcoded timeout when mass
erasing.
Change-Id: Ib5af60d52ed7d53277bfe7176c4c44f79d3a26bc
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3738
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The code memory size was a bug and seemed to be working by
accident since there happened to be 256 pages in the device that was
tested on which corresponded to 256kb.
Also don't fail if memory size != expected memory size based on hwid
as this hwid is unstable and should be used only for debug/diagnostics.
Change-Id: I4e98f7498a36c53fc51783eddfdaba704d30e3ca
Signed-off-by: Michael Dietz <mjdietzx@gmail.com>
Reviewed-on: http://openocd.zylin.com/3510
Tested-by: jenkins
Reviewed-by: Jiří Pinkava <j-pi@seznam.cz>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Currently if ftdi device is removed, OpenOCD will stall forever.
Only kill -9 will help in this case.
This patch makes use of libusb timeout functions and
trying to break out of while loop if some error is detected.
[andreas.fritiofson@gmail.com]: Add missing retval check
Change-Id: I97506190e376026705f14ef9fe37dc811b99b3ac
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3419
Reviewed-by: Andreas Färber <afaerber@suse.de>
Tested-by: jenkins
Tim Newsome
Karl Palsson
Megan Wachs
Matthias Welwarsky
David Ung
pierre Kuo
Dongxue Zhang
Paul Fertser
Tomas Vanek
Andreas Fritiofson
Marc Schink
kevin
Vianney le Clément de Saint-Marcq
Sean Cross
Steven Stallion
Owen Kirby
Evan Hunter
Andreas Färber
Jiri Kastner
Albert Ou
Andrey Smirnov
HarishKumar
Jiří Pinkava
Gabrielle Trotter
Sandeep Mistry
Michael Dietz