Spencer Oliver
b5a324e63c
cfg: add Fujitsu FM3 config
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Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-07-27 10:56:25 +01:00
Michael Hunold
d6c42bf312
CPU name in TMPA900 config file should obviously be TMPA900 (not TMPA910).
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Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-07-18 14:24:05 +01:00
Øyvind Harboe
e7269e32a7
stm32f2xxx: comments about frequency choice
2011-07-15 12:05:46 +02:00
Martin Schmölzer
b4bbe33d17
Add ULINK interface script
2011-06-26 17:43:51 +02:00
Dale Lukas Peterson
523c172280
Added Olimex STM32 {H,P}107.cfg board
2011-06-16 16:53:49 +02:00
rlrosa
5227ae7162
added minimodule interface
2011-06-12 11:18:27 +02:00
Laurent Charpentier
e899fcaca0
Added configuration file for STM3220G-EVAL board.
2011-06-08 07:19:43 +02:00
Laurent Charpentier
01c0ffe98f
Added configuration file for stm32f2xxx.
2011-06-08 07:19:39 +02:00
Bear
ae02a0e517
uptech2410
2011-06-02 12:17:28 +02:00
Damjan Marion
096fd6bcc0
Board definition for mini6410/tiny6410 (ARM1176)
...
The following mini6410/tiny6410 functions are available:
init_6410 - initialize clock, timer, DRAM
init_6410_flash - initializes NAND flash support
install_6410_uboot - copies u-boot image into RAM and runs it
2011-05-29 23:42:09 +02:00
Damjan Marion
ba576920cf
SMDK6410 is not target, move file to board
2011-05-29 20:05:01 +02:00
Rodrigo L. Rosa
129f099ef1
flash support (only full erase/write) for 568013 and 568037
2011-05-18 18:47:55 +02:00
Rodrigo L. Rosa
9d4aec6bda
partial support for 568013 and 568037, target integration.
2011-05-18 18:47:50 +02:00
Øyvind Harboe
289cecebf0
beagleboard: add support for various icepick versions
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The beagleboard icepick jtag tap id's vary.
2011-05-05 15:47:12 +02:00
Jonas Hoerberg
2889471b58
at91rm9200-ek: add low default communication speed
2011-05-05 15:43:37 +02:00
Alexandre Pereira da Silva
522d5b84e2
Add support for the lpc2460 target
2011-05-03 22:07:01 +02:00
Alexandre Pereira da Silva
743fada06a
Make the lpc2xxx generic driver support romless parts
2011-05-03 22:06:57 +02:00
Michel Jaouen
d2911627d2
u8500.cfg : ste u8500 support
2011-04-28 12:22:47 +02:00
Luca Ellero
041953f3b1
Add preliminary support for Freescale iMX53
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Signed-off-by: Luca Ellero <lroluk@gmail.com>
2011-04-13 21:32:00 +02:00
Alexandre Pereira da Silva
5cc83a880a
Add the REV A tap id to the LPC3250 configuration
2011-04-13 21:28:44 +02:00
Jean-Christophe PLAGNIOL-VILLARD
d6027ca6a8
at91: add at91sam9263 chip register definition
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-04-09 19:19:36 +02:00
Jean-Christophe PLAGNIOL-VILLARD
ba71e8c521
at91: add chip register definition and generic init support
...
for
- pio
- pmc
- rstc
- wdt
- sdramc
- smc
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-04-09 19:18:03 +02:00
Jean-Christophe PLAGNIOL-VILLARD
28e6dcee85
add at91sam9263-ek support
...
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-04-09 10:16:28 +02:00
Jean-Christophe PLAGNIOL-VILLARD
22437fac28
add at91sam9261-ek support
...
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-04-09 10:14:46 +02:00
Jean-Christophe PLAGNIOL-VILLARD
5d538084be
at91: add at91sam9261 chip register definition
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-04-09 10:13:59 +02:00
Øyvind Harboe
3fea99097e
pandaboard: use new -dbgbase option to workaround broken ROM table
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Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-04-02 09:00:01 +02:00
Øyvind Harboe
6c5e1781a1
omap4430: cortex a9 and a8 are now merged again
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Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-03-22 09:10:21 +01:00
Aaron Carroll
59a6380a17
omap4430: add Blaze config
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Signed-off-by: Aaron Carroll <aaronc@ok-labs.com>
2011-03-13 14:59:39 +01:00
Aaron Carroll
cc9939879c
omap4430: force hardware breakpoints for GDB
...
Soft breakpoints are currently broken if the MMU is enabled due to incorrect
cache flushing. Until this is fixed, force the use of hardware breakpoints.
Signed-off-by: Aaron Carroll <aaronc@ok-labs.com>
2011-03-13 14:58:57 +01:00
Jean-Christophe PLAGNIOL-VILLARD
df500c5a04
at91: add at91sam9g45 support
...
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-03-03 22:49:47 +01:00
Jean-Christophe PLAGNIOL-VILLARD
a4bf71386b
at91: add at91sam9g10 support
...
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-03-03 22:49:47 +01:00
Jean-Christophe PLAGNIOL-VILLARD
aebc0d5556
at91sam9260: update sram information
...
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-03-03 22:49:47 +01:00
Jean-Christophe PLAGNIOL-VILLARD
f6783d4465
at91: add at91sam9263 support
...
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-03-03 22:49:47 +01:00
Jean-Christophe PLAGNIOL-VILLARD
26db0a6bef
at91: add at91sam9261 support
...
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-03-03 22:49:46 +01:00
Jean-Christophe PLAGNIOL-VILLARD
e941805713
at91sam9: factorise cpu support
...
all at91sam9 are nearly the same except sram and soc name
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-03-03 22:49:46 +01:00
Jean-Christophe PLAGNIOL-VILLARD
f26cd96740
add at91rm9200-ek board support
...
tested with jlink sam-ice v5 while loading barebox
(gdb) load
Loading section .text, size 0x2f190 lma 0x21f00000
Loading section .rodata, size 0x931c lma 0x21f2f190
Loading section .data, size 0x29e8 lma 0x21f384ac
Loading section .barebox_cmd, size 0x78c lma 0x21f3ae94
Loading section .barebox_initcalls, size 0x80 lma 0x21f3b620
Start address 0x21f00000, load size 243360
Transfer rate: 26 KB/sec, 13520 bytes/write.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-02-23 08:13:59 +01:00
Luca Ellero
578294dbdd
stm32: add ID for medium density device Rev Z
...
stm32-discovery evaluation board (STM32F100RBTB6):
reading device id register (0xE0042000) returns 0x10010420
Signed-off-by: Luca Ellero <lroluk@gmail.com>
2011-02-18 08:08:31 +01:00
Luca Ellero
6684b35346
omap4430: Add JRC TAPID for PandaBoard REV EA1 (PEAP platforms)
...
PandaBoard REV EA1 (Panda Early Adopter Program) has a different ID.
This patch add alternate REV EA1 TAP id to configuration file
Signed-off-by: Luca Ellero <lroluk@gmail.com>
2011-02-08 09:51:54 +01:00
Aaron Carroll
aaf145c422
omap4430: fix reset sequence
...
* Write to the PRM reset control register should have been 'phys';
* Setup empty reset-assert handlers for the M3's, since the board-level reset
takes care of them;
* Remove the dbginit cruft, because it gets called implicitly on reset.
Signed-off-by: Aaron Carroll <aaronc@cse.unsw.edu.au>
2011-02-02 08:32:10 +01:00
Aaron Carroll
4592506b8e
TCL configs for OMAP4430 and Pandaboard
...
Signed-off-by: Aaron Carroll <aaronc@cse.unsw.edu.au>
2011-01-31 08:57:50 +01:00
Mathias K
6df10184f6
- add xds100v2 configuaration file
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Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-01-27 10:32:39 +00:00
Freddie Chopin
61e1e525c1
Add another level of procedures to LPC2xxx initialization - procedures for specific targets (setup_lpc<number>) take core clock and adapter clock as parameters. This way "constant" parameters (flash size and type, CPUTAPID, etc.) do not need to be copied if one wishes to change the "variable" parameters - like the core clock or adapter clock - in a board config file or somewhere else.
...
Signed-off-by: Freddie Chopin <freddie_chopin@op.pl>
2011-01-09 21:34:02 +01:00
Freddie Chopin
94fa8fd30a
Add common LPC2xxx setup procedure, use in all LPC2xxx files.
...
Signed-off-by: Freddie Chopin <freddie_chopin@op.pl>
2011-01-07 16:09:31 +01:00
Michael Schwingen
1795239cfd
actux3.cfg: add function to setup for u-boot debugging
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Signed-off-by: Michael Schwingen <michael@schwingen.org>
2011-01-02 21:17:57 +01:00
Spencer Oliver
3d834bdab7
stm32: add stm32 xl family flash support
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Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-12-23 12:11:14 +00:00
Øyvind Harboe
8b41812da3
lpc2148: redo to the new target configuration scheme
...
Define a proc which PCBs can easily override.
Also demonstrates how to add multiple TAP exepcted-id's
using arguments.
Added 0x3f0f0f0f as expected TAP-id. Old LPC2148 silicon
I happened to have on my desk?
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-12-22 17:44:22 +01:00
Tormod Volden
29d2d15f3f
tcl/interface/flashlink.cfg: Fix broken ST URL
2010-12-20 07:52:29 +01:00
Tormod Volden
d33f4a2ad5
tcl/board: Clean up STM32 EVAL boards configurations
...
Make consistent use of hex memory size for flashing.
Delete stm32f10x_128k_eval.cfg. It has no product reference
nor any settings in it.
2010-12-20 07:52:28 +01:00
Tormod Volden
9f18afc39e
tcl/board: Fix ST URLs in stm32* eval board configuration files
...
ST recently rewamped (screwed up) their web site and broke all links.
Also match the chip names with those on the web site product
descriptions.
2010-12-20 07:52:26 +01:00
Michael Schwingen
23bf724e04
update IXP42x target / XBA board config
2010-12-19 22:16:31 +01:00