Commit Graph

7740 Commits (b42bc76e2ebe1525895440ffccffa59b5921cda2)

Author SHA1 Message Date
Palmer Dabbelt bcf2a16b0d Shim back in some old interfaces for now 2017-05-11 10:41:13 -07:00
Moritz Fischer 16655c1dd5 tcl/cpld: add config file for Altera 5M570Z CPLD (MAXV family)
Change-Id: I229c746be27b7c4fa01f48a6ed54ab2679b50ab1
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Reviewed-on: http://openocd.zylin.com/4109
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-05-09 21:41:46 +01:00
Palmer Dabbelt 563f6acc3c Allow all harts to be reset 2017-05-09 13:33:20 -07:00
Juha Niskanen 753cf12700 stm32l4: support flashing L45x/46x devices
Also fixes incorrect comment about MSI range.

Change-Id: If1339a00e50db44195dfcd5c767ba3f5d9035451
Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com>
Reviewed-on: http://openocd.zylin.com/4122
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-05-08 18:07:41 +01:00
Salvador Arroyo f22b89d9fb mips32, use scan32 function for reading impcode/idcode.
There is no need to implement scan code in functions
mips_ejtag_get_idcode/impcode(), use mips_ejtag_drscan_32().
Impcode/idcode saved in ejtag.info.
Reorder the code in the callers of this functions.

Change-Id: Ia829c783a0b24c6a65cade736113fa6f67b0a170
Signed-off-by: Salvador Arroyo <salvador@telecable.es>
Reviewed-on: http://openocd.zylin.com/4003
Tested-by: jenkins
Reviewed-by: Peter Mamonov <pmamonov@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-05-08 18:05:58 +01:00
Salvador Arroyo b702b16dc2 mips32: add micromips breakpoints support
Breakpoint setting based on length (kind) only.
Added 16bit aligned 32bit software breakpoints
support and same filtering before setting
breakpoint.
Set the required isa bit in hardware breakpoints.
Drop the isa bit in software breakpoints.

Change-Id: I7020f27be16015194b76f385d9b8e5af496d0dfc
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4124
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-05-08 18:05:26 +01:00
Salvador Arroyo 4831ce4433 mips32: add micromips isa handling
Read and save configuration registers, up to 4.
Config3 holds the micromips implementation info.
Added isa implementation info to mips32_common.
Added isa filter to avoid common mistakes, but only
if one isa mode is implemented.
When resuming the isa requested is set if more than
one isa mode is implemented.

Change-Id: I1d6526c5525bffac8d75e031b842b2edc6310e28
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4123
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-05-08 18:04:56 +01:00
Salvador Arroyo f5151b6d46 mips32, convert miniprograms with code definition
Needed to run in micromips mode. Seems that if an isa
is supported in debug mode it also supported in kernel
mode. The contrary is not true.

Change-Id: I1feb8e2c376f4db97089f05c20bc0cd177208fb3
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4033
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-05-08 18:03:58 +01:00
Salvador Arroyo 2279c23cde mips32, add support for micromips in debug mode
Micromips is 16bit oriented, branch and jumps are
16 bit based. The upper half 16bits of a 32bit instruction
with the major opcode, must go first in the instruction
stream, hence the SWAP16 macro and swap16 array function,
needed if the code is written as 32 bit word in little endian
cores. Endianess info added to ejtag_iinfo. Pointer to
ejtag_info and isa field added to pracc context.
MIPS32 code are renamed to MIPS32_ISA_...
To select the isa, the new code has an additional isa parameter
(1 for micromips, 0 for mips32).
In JR instruction the isa bit must be set to execute
micromips code.
The suffix u is added to the OP codes to avoid signed/unsigned
comparison errors and to make sure the right shift is
performed logically.
The isa in debug mode is updated in the poll function.
Code for miniprograms, in kernel mode, need to be converted.
CFI code only for mips32.

Change-Id: I79a8b637d49b0e2d92b6dd5eb5aa8aa0520bf938
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4032
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-05-08 18:03:28 +01:00
Salvador Arroyo 6012a87d44 mips32, add microMips instruction subset
Only reencoded MIPS32 instructions. Added some instructions
for crc code. Micromips isa in debug mode is only needed for
pic32mm cores. Pic32mz seems that only works with MIPS32
isa when in debug mode.

Change-Id: I07059e153a7000ea9204f20b6b37edf6a7623455
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4022
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-05-08 18:00:46 +01:00
Salvador Arroyo e320588117 mips32, add option to avoid check in last instruction
This option is needed, for example, when exiting
debug mode in bmips targets. The last instruction
is a NOP, not a DERET. When working in async mode
this check is not done, mips32_pracc_queue_exec() pass
the parameter to mips32_pracc_exec() and never use it.

Change-Id: I4c7ed4feb1588b62e2645b955b501b6671113b36
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4021
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-05-08 18:00:09 +01:00
Salvador Arroyo 1392c27cf9 mips32, add realloc code
If max_code is reached realloc memory. If fails to realloc
the error is propagated and every call to pracc_add() returns
immediately. The exec function logs the error.

Change-Id: Idd4ed9d9b8b19b7d6842d0bc5ebb05f943726705
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4020
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-05-08 17:59:15 +01:00
Salvador Arroyo c8b31aaa15 mips32, change in pracc_list for dynamic allocation
pracc_list points to an array with code in the lower half
and addr in the upper half. Change it to a struct with
an instruction field and an address field.
Requiered to make reallocation easier.
As a side effect the code is less quirky.

Change-Id: Ibf904a33a2f35a7f69284d2a2114f4b4ae79219f
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4019
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-05-08 17:57:30 +01:00
Megan Wachs fa8d7adf33 Avoid accessing null target->reg_cache
GDB might request registers even if target was not successfully initialized.
2017-05-05 11:05:28 -07:00
Megan Wachs 325f17f6ec Merge pull request #43 from riscv/read-from-0
Read from 0
2017-05-05 09:30:24 -07:00
Matthias Welwarsky 3414daed26 Fix compile failure on MacOSX
MacOSX tool chain defines __unused in "sys/cdefs.h", causing a collision.
Remove the local define to avoid polluting the compilers internal 
symbol namespace.

Change-Id: I16370c4518e6aeec482dd689e7db80628f846ee3
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4118
Reviewed-by: Steven Stallion <sstallion@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
2017-05-02 16:43:20 +01:00
Megan Wachs 95a2eb157a riscv-013: more consistent parens 2017-05-01 09:42:11 -07:00
Megan Wachs 458bb20699 riscv-013: Correct sign extension of address on read_memory for lower bits as well 2017-05-01 09:39:59 -07:00
Megan Wachs 8462750357 riscv-013: Correct sign extension of address on read_memory 2017-05-01 09:37:48 -07:00
Megan Wachs ad1cf13ef4 Correct debugging print in read_memory 2017-05-01 08:35:10 -07:00
Palmer Dabbelt 16de5044d4 Fix an assertion when reading from 0 2017-05-01 08:33:01 -07:00
Palmer Dabbelt ba3a56937b Correct previous hart caching logic 2017-05-01 08:32:43 -07:00
Palmer Dabbelt 1ec607c726 Clean up unused read_memory code 2017-04-27 12:56:01 -07:00
Palmer Dabbelt 4116b97d6e Correct an off-by-one in argument parsing 2017-04-26 15:17:11 -07:00
Palmer Dabbelt 17d04aded3 Keep calling the old poll on v0.11 targets
This is another thing that should be fixed correctly.  Essentially this
just uses the old codepath, which works for v0.11.
2017-04-26 15:16:39 -07:00
Palmer Dabbelt 9d4df3420c Initialize all registers in examine
I'm not sure why this is necessary, but for some reason GDB is asking
for registers before OpenOCD thinks there's been a halt.  This is really
just a workaround, but I need to refactor the v0.11 stuff anyway so I
don't want to figure it out.
2017-04-26 15:09:24 -07:00
Megan Wachs da66be0161 riscv: Fix some blocking compile warnings 2017-04-26 10:23:53 -07:00
Megan Wachs 1ab5d7b497 fespi: Allow the ctrl_base address specified as a parameter 2017-04-26 09:10:49 -07:00
Palmer Dabbelt 8dea2908b7 Add 64-bit and multihart support
This is a major rewrite of the RISC-V v0.13 OpenOCD port.  This
shouldn't have any meaningful effect on the v0.11 support, but it does
add generic versions of many functions that will allow me to later
refactor the v0.11 support so it's easier to maintain both ports.  This
started as an emergency feature branch and went on for a long time, so
it's all been squashed down into one commit so there isn't a big set of
broken commits lying around.  The changes are:

 * You can pass "-rtos riscv" to the target in OpenOCD's configuration
   file, which enables multi-hart mode.  This uses OpenOCD's RTOS
   support to control all the harts from the debug module using commands
   like "info threads" in GDB.  This support is still expermental.

 * There is support for RV64I, but due to OpenOCD limitations we only
   support 32-bit physical addresses.  I hope to remedy this by rebasing
   onto the latest OpenOCD release, which I've heard should fix this.

 * This matches the latest draft version of the RISC-V debug spec, as of
   April 26th.  This version fixes a number of spec bugs and should be
   close to the final debug spec.
2017-04-26 09:10:49 -07:00
Salvador Arroyo cb317eabf2 mips32, write handler code in a more compact way
Less code and probably cleaner.
Don't check if it is ever ERROR_OK.

Change-Id: I1045b58fd4542ec24430332f49679364ae97b1dc
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4018
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-25 17:03:20 +01:00
Salvador Arroyo bff6205bab mips32, implement assembler li instruction
Implement it as a function, the code was already in. Added optimize
option.

Change-Id: Ib9ad3f00d6c4f0b91c4e4960a50ec8d102f4e333
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4017
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-25 17:02:14 +01:00
Salvador Arroyo 9bdc3bf0a8 mips32, in wait_for_pracc_rw() use ejtag_info->pa_ctrl
Makes code shorter
In fasdata transfer fuction declare variables locally.
Avoid cast.

Change-Id: I0367b66339560fc20521a0598488e7ff9076808e
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4011
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-25 17:00:52 +01:00
Salvador Arroyo 5fdcbbdb25 mips32, mips32_pracc_finish() queued only
In most of the cases there is no need to request execution,
the check for a new pracc access already does it.
Requesting execution if not needed makes execution slower and
code larger due the additional checks.
Reduce code in fasdata transfer function.
Call for execution when exiting debug.

Change-Id: I3b45f6d1f62da5fad3e3db84f82a9299b16e1bd9
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4010
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-25 16:59:44 +01:00
Salvador Arroyo 09ebc1afad mips32, drop unnecessary code in mips32_pracc.c
Struct mips32_pracc_context no more in use.
In current code cp0 reg/sel do not requires special handling.
In sync mode ctx.store_count not used, drop check.
In fasdata transfer function use mips32_pracc_read_ctrl_addr()
to reduce code.

Change-Id: Ibd4cfa5a44ebc106ed0db042f4e54a2e0b3d43cb
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4007
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-25 16:58:47 +01:00
Salvador Arroyo 7ccd53bdde mips32, homogenize code in the scan functions
Change-Id: I32fed3332857737048dd12da94fcaba140acb726
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4006
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-25 16:58:00 +01:00
Marc Schink 3421b89c98 server/telnet: Remove exit() call
Change-Id: I8ce99d7d62dfe3cad63cf6bc68f2faf2234e395c
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3224
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-25 16:56:49 +01:00
Marc Schink b43b95e460 server/server: Remove all exit() calls
With this patch OpenOCD shuts down properly when errors occur in the
server instead of just calling exit().

Change-Id: I2ae1a6153dafc88667951cab9152941cb487be85
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3223
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2017-04-25 16:56:35 +01:00
Juha Niskanen 99db18a995 stm32l4: support flashing L496 devices
Change-Id: I3effc5b675c853433170391c5eaf46edc067b6e7
Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com>
Reviewed-on: http://openocd.zylin.com/4108
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-25 07:55:43 +01:00
Salvador Arroyo d81fc78d9b mips32, add generic scan 32 function
Will be used later, allow queuing all needed scans in a pracc
access. This makes faster execution with ftdi based adapters
working in sync with pracc.
Added now because the overall code is shorter.

Change-Id: Ib32b89307b75785f88870db8d7c9255dc5bbd426
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4005
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-24 23:07:29 +01:00
Salvador Arroyo 832f5974f2 mips32, pic32 use uint8_t in 8 bit scan function
Makes code shorter.

Change-Id: I6cc01adffbea063ccb071ddf3a3e3d81727b29ce
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4004
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-24 23:06:54 +01:00
Marc Schink 3fe9929511 tcl/board: Add STMicroelectronics STM32F7 Nucleo config
Tested with STM32F746ZG Nucleo development board.

Change-Id: Ia97b774b996a3be03e8e84342b93659c3632c18f
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3516
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-24 22:46:38 +01:00
Karl Palsson 68e204f1e9 udev: Add rules for Ambiq Micro EVK's.
Udev rules for Ambiq Micro ftdi based EVK's.
Two new vid:pid's: 2AEC:6010, and 2AEC:6011.

Udev rule for multi-target Debug board 2AEC:1106

Change-Id: Id7430d0c70647752375230f4024be9f7a2ba95ce
Signed-off-by: Rick Foos <rfoos@solengtech.com>
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-on: http://openocd.zylin.com/3980
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-24 22:43:14 +01:00
Byron Kubert e683ff2ac7 Added 512K flashing support for em3587
The Silicon Labs EM3587 and EM3588 may have 512K of flash.
This fix allows for 512K to be specifiied on the command line
when flashing a device.

Change-Id: I18cc4bd0d14e1f2069066734a7396bcccf3de941
Signed-off-by: Byron Kubert <byronk@google.com>
Reviewed-on: http://openocd.zylin.com/3795
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-24 22:32:24 +01:00
Hellosun Wu 8f3d16f4ae libusb: Add transfer type filter to get correct ep
The need for this due to AICE having 3 interfaces
(EP1 IN-Interrupt, EP2 OUT-Bulk, EP6 IN-Bulk).
Without it, the function will choose first two endpoint as
read_ep/write_ep. This filter will check transfer types
when get endpoint-id. Without this patch, AICE will not
get correct endpoint.

Change-Id: I4da93c7de41cd19e5095b4bfb42078b21f40b678
Signed-off-by: Hellosun Wu <wujiheng.tw@gmail.com>
Reviewed-on: http://openocd.zylin.com/3218
Tested-by: jenkins
Reviewed-by: Hsiangkai Wang <hsiangkai@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-24 22:31:41 +01:00
Marc Schink 45f0e6d062 flash/nor/tcl: Make verify_bank parameter optional
Make the 'offset' parameter optional, if omitted simply start at the
beginning of the flash bank.

Additionally, check if the argument is out of bounds of the flash bank.

Change-Id: Id1959eee5c395666c35f26342c3c50134dd564e5
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3858
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2017-04-24 22:15:14 +01:00
Marc Schink 790a7b2a8d flash/nor/tcl: Fix some format specifiers
Change-Id: I2255aede9713cb7ef538d7433dd900d8da7a51ad
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3857
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-24 22:10:19 +01:00
Jan Čapek b375052c58 tcl STM32L0xx - add support for dual banked targets and for Nucleo-64 STM32L073
- stm32l0_dual_bank.cfg - implement dual bank configuration

- st_nucleo_l073rz.cfg - implement new board script

Change-Id: Ie8063e5bec45069a63d414d81b2068fe3cc7e4d7
Signed-off-by: Jan Čapek <jan.capek@braiins.cz>
Reviewed-on: http://openocd.zylin.com/3957
Reviewed-by: Cezary Gapiński <cezary.gapinski@gmail.com>
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
Tested-by: jenkins
Reviewed-by: Aurelio Lucchesi <me@0rel.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-24 21:57:57 +01:00
CezaryGapinski e916bcda64 stm32lx: fix dual-bank configuration for Cat.5 and Cat.6 devices
Default values for .first_bank_size_kb and .has_dual_banks fields
described in stm32lx_parts[] do not fully describe
the real device memory layouts.

Basing on:
STM32L0x1 RM0377
STM32L0x2 RM0376
STM32L0x3 RM0367
STM32Lxxxx RM0038

correct values for memory layouts were selected:
id = 0x447 STM32L0xx (Cat.5) <- dual bank flash
for size 192 or 128 KBytes, single bank for 64 KBytes
id = 0x436 STM32L1xx (Cat.4 / Cat.3 - Medium + /
High Density) <- only one size of the bank,
default values are correct
id = 0x437 STM32L1xx (Cat.5 / Cat.6) <- always dual bank,
but size of the bank can be different

For that reason .part_info field in struct stm32lx_flash_bank
is a dynamic field with fields copied from stm32lx_parts[]
and overwriten to correct values
for specific chips and memory sizes.

Change-Id: If638cb0a9916097bfd4eda77d64feaf1ef2d2147
Signed-off-by: Cezary Gapiński <cezary.gapinski@gmail.com>
Reviewed-on: http://openocd.zylin.com/4074
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2017-04-24 21:56:53 +01:00
Armin van der Togt ca9dcc86d7 Fix flash writing on stm32l0
Fix "couldn't use loader, falling back to page memory writes" error on
stm32l0 which was caused by the use of cortex-m3 instructions in the
flash loader code. The loader is rewritten using cortex-m0 compatible
instructions

Signed-off-by: Armin van der Togt <armin@otheruse.nl>
Change-Id: If23027b8e09f74e45129e1f8452a04bb994c424e
Reviewed-on: http://openocd.zylin.com/4036
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-24 07:03:59 +01:00
Tomas Vanek 2e0e6c5634 flash/nor/at91samd: fix chip erase of a secured device
'at91samd chip-erase' command did not work on secured device.

Fix it changing address of DSU.CTRL register
(see Atmel SAM D21 datasheet, 13.9. Intellectual Property Protection).

While on it check error return of DSU.CTRL write.

Change-Id: I83155a634a5458cdc0cc16c99c0e155eb1d8b3d6
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reported-by: Thomas Irmen <tirmen@gmx.net>
Reviewed-on: http://openocd.zylin.com/4043
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-24 06:31:37 +01:00