Commit Graph

6610 Commits (aef488824917caa31d8b611192e816d2fc28f54f)

Author SHA1 Message Date
Tim Newsome 1e43d32e01 Use %ll instead of %L instead of scanf.
Mac build barfs on L, and the manpage says they're equivalent.

Hopefully fixes #147

Change-Id: I3aa57775731f3f5ceb03097cae2a9dc6fd426dcd
2017-12-15 15:31:36 -08:00
Tim Newsome 6aff46adcc Fix cut and paste bug.
Now reading 64-bit FPRs on 32-bit harts using scratch memory might work.

Change-Id: Ie8c0fc689386c6e724ecab5e8c855e725fa8dd97
2017-12-14 13:51:13 -08:00
Tim Newsome 7eceac758c Use abstraction because Windows is not POSIX
Fixes #138

Change-Id: I4d9b49762e318fe91f1561ed315829b43daefef4
2017-12-14 12:36:42 -08:00
Tomas Vanek 19f8f58c0d target: remove unused event definitions
Events reset-halt-pre, reset-halt-post, reset-wait-pre and
reset-wait-post are not used anywhere.

Change-Id: I9a0f94875b102d9b08f6c2fd9d73a9f05f8e8e79
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4285
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2017-12-12 21:18:10 +00:00
Tomas Vanek 3f6ab8e6a6 flash/nor/stm32f2x: fix erase on STM32F413/423
Theese devices do not have a gap in sector numbering.
The driver translates sectors numbers 12 13... to 16 17... as used on dual
bank flash devices. Therefore erase of sector 12 and above fails with error
	'stm32x device protected'
on F413/423.

Drop sector number translation for devices without has_large_mem flag.

Change-Id: I65531c0dfe02e2fd0f3d68f0615e0926e9901391
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4299
Tested-by: jenkins
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-12-12 21:16:24 +00:00
Tomas Vanek 90a6245eec flash/nor/stm32f2x: fix protection block size for F767 in dual bank mode
A protection block comprises two adjacent sectors in dual bank mode.
As there are 64 and 128kB sectors joined in blocks 2 and 8, block size
should be computed as a sum of sector sizes.

Change-Id: Ie915df8cf7ca232c4565d7e0c514c8933e71fdfe
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4271
Tested-by: jenkins
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-12-12 21:16:21 +00:00
Paul Fertser 31c58c139d jtag: drivers: stlink: handle all versions with single config
Extend HLA interface to allow multiple VID/PID pairs and use it to
autodetect the connected stlink version.

Change-Id: I35cd895b2260e23cf0e8fcb1fc11a78c2b99c69b
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3961
Tested-by: jenkins
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-12-12 21:13:55 +00:00
Tim Newsome 0a65a6527d Fix build.
Change-Id: I4e3a36fac77fefa271ae9facbaa990fa330501ae
2017-12-11 12:58:20 -08:00
Tim Newsome e50ee46a6f
Merge pull request #131 from riscv/small_progbuf
Support program buffers that are just 2 instructions large
2017-12-11 12:52:31 -08:00
Ake Rehnman 020cb12077 stm8 : new target
New STM8 target based mostly on mips4k. Target communication
through STLINK/SWIM. No flash driver yet but it is still possible
to program flash through load_image command. The usual target debug
methods are implemented.

Change-Id: I7216f231d3ac7c70cae20f1cd8463c2ed864a329
Signed-off-by: Ake Rehnman <ake.rehnman@gmail.com>
Reviewed-on: http://openocd.zylin.com/3953
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-12-07 07:53:13 +00:00
Alexandre Torgue 6a66cccbad flash: Add new stm32h7x driver support
Add basic support for:
     -STM32H7x (Embedded flash 2M)

Erase and write tested on stm32h743.

Change-Id: Ie8d8786227cdeee39fcf5663167a053ad8dcef4c
Signed-off-by: Rémi Prud'homme <remi.prudhomme@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
Reviewed-on: http://openocd.zylin.com/4181
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2017-12-06 21:29:10 +00:00
Bas Vermeulen 06aebfacda Only call cmsis_dap_cmd_DAP_SWD_Configure when swd_mode is enabled
The CMSIS-DAP used by NXP's LS1012ARDB board only supports JTAG,
and not SWD. Calling cmsis_dap_cmd_DAP_SWD_Configure returns with an
error (and doesn't actually do anything in the debugger).

Wrap the call to cmsis_dap_cmd_DAP_SWD_Configure in a check for
swd_mode, to make sure initialisation doesn't fail needlessly.

Change-Id: Id7e568cb6e36886bd7c5b3699d198a77a51c28c9
Signed-off-by: Bas Vermeulen <bas@daedalean.ai>
Reviewed-on: http://openocd.zylin.com/4294
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2017-12-06 21:07:10 +00:00
Robert Jordens 5d6bf8704c spi: add n25q256 flash
* 256 MBit SPI flash
* https://www.micron.com/~/media/documents/products/data-sheet/nor-flash/serial-nor/mt25q/die-rev-a/mt25q_qljs_l_256_aba_0.pdf spells out the entire zoo of IDs
* used e.g. on Xilinx KCU105

Change-Id: I18b19292b4869627adb9071266271962fec68fb4
Signed-off-by: Robert Jordens <jordens@gmail.com>
Reviewed-on: http://openocd.zylin.com/4186
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2017-12-06 21:06:00 +00:00
Marc Schink 5679dc657c server/gdb: Use 'bool' instead of 'int' for boolean values
Change-Id: I71c2f2553a29e9ef167ff3313cc06c7b31c64190
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4278
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2017-12-06 21:01:39 +00:00
Marc Schink 8bb7021ca8 server/gdb: Use get_target_from_connection()
Change-Id: I2c66bf6da734a3b71e358553943e9fc3c6578c39
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4277
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2017-12-06 21:01:33 +00:00
Marc Schink 2fcbe3b8f7 target: Constify parameter of is_armv7m()
Change-Id: Ieea1b0dec88818e9e8d5c8c5d54aa8959556d77b
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4275
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2017-12-06 21:01:19 +00:00
Marc Schink dba9293a89 rtos: Use 'bool' as return type for detect_rtos()
Change-Id: I91ad0431d44ed94f48d20c4690f8642d66f52a9b
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4274
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2017-12-06 21:01:12 +00:00
Jonas Norling 7e64451097 adi_v5_swd: Add error message when SWD fails to connect
Error message instead of failing silently.

Change-Id: Ie54a5bf68459d3c0e96cc38080ffad8de0a4b5ce
Signed-off-by: Jonas Norling <jonas.norling@cyanconnode.com>
Reviewed-on: http://openocd.zylin.com/4269
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2017-12-06 20:55:14 +00:00
Tim Newsome 4d5f74fbe6 Update encoding.h.
Change-Id: Id653500aa525746e8824ff5fd2850c62c8c21c08
2017-11-27 13:23:33 -08:00
Tim Newsome 52cdf286ca Add missing return.
Change-Id: Ida32482903cdfd8eeb043088e84bb1f4f5ac673c
2017-11-16 15:58:08 -08:00
Tim Newsome 9b4628c9fc
Merge pull request #127 from riscv/jtag_debug
Clean up this JTAG debug code.
2017-11-14 09:59:25 -08:00
Megan Wachs 9f56a9643d riscv-compliance: remove some compile warnings 2017-11-02 09:34:43 -07:00
Megan Wachs e435011713 Merge commit '8304e1b' into HEAD 2017-11-01 13:44:51 -07:00
Tim Newsome e28abf7c9e Merge branch 'riscv' into small_progbuf
Change-Id: I1d48cb1f8448ebbf98c8bb369928d1e7a7a78c75
2017-11-01 13:38:17 -07:00
Tim Newsome 6a1690d2ec Fix compile warning with new gcc.
Change-Id: I14ebf597f41429c0fc3ebac8da9c9f62c78fb1ae
2017-10-27 13:42:39 -07:00
Tim Newsome db754536e8 Support 64-bit FPRs on RV32.
Because there is no instruction that moves just half of a 64-bit FPR
to/from a GPR, we need to use scratch memory for this operation. This
code can theoretically use:
1. DMI_DATA, if it is memory mapped in the target.
2. DMI_PROGBUF, if it is writable in the target.
3. A user-configured address.

I have only tested this code very lightly. One reason is that gdb thinks
that on RV32 harts every register is 32 bits wide. Another is that this
is mostly proof-of-concept to satisfy the small program buffer code
review, which I don't want to drag out forever.

Existing tests don't realize that floating support was broken with
RV32D, and don't realize that it still doesn't work because of the gdb
problem mentioned above.

This change improves Issue #110 but there's more work to be done.

Change-Id: I99b8a36e5fea26f1d9e16e36cf99adc7be26b944
2017-10-27 13:15:22 -07:00
Jonas Norling 41092636d1 ftdi: Enable SWDIO output before sending data on it
The SWDIO buffer has to be enabled, by setting SWDIO_OE, for data on
SWDIO to reach the target. Explicitly do this before sending the
switch sequences for JTAG-to-SWD, etc.

This makes the code insensitive to the state of SWDIO_OE specified in
ftdi_layout_init. It used to work only on adapters with a non-inverted
SWDIO_OE inited to 1, or inverted SWDIO_OE inited to 0.

Change-Id: I4b9e520ac1c7ce2a437251a05fc036bc68de718e
Signed-off-by: Jonas Norling <jonas.norling@cyanconnode.com>
Reviewed-on: http://openocd.zylin.com/4270
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2017-10-27 11:48:36 +01:00
Christopher Head bca67d107f Cortex-M: Delete an unnecessary local variable
The dhcsr_save variable was used to save the value of
cortex_m->dcb_dhcsr so it could be restored later. However, all writes
in between the save and the restore use mem_ap_write_atomic_u32, not
cortex_m_write_debug_halt_mask, which means cortex_m->dcb_dhcsr isn’t
changed anyway. Delete the unnecessary local.

Change-Id: I064a3134e21398e1ecfc9f1fa7efd7b020b52341
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4240
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2017-10-27 11:47:22 +01:00
Christopher Head 02df0abb54 Cortex-M: fix stale DHCSR cache values
In cortex_m_assert_reset, in two locations, DHCSR is written directly
using mem_ap_write_u32. This means that the cached version,
target_to_cm(target)->dcb_dhcsr, is not updated when these writes are
performed, so subsequent writes to DHCSR that use
cortex_m_write_debug_halt_mask will change those bits back to their old
values which, unless modified in that particular invocation, come from
the cache. This causes an actual, observable bug on an STM32F7 in which
running “reset run” immediately after “program” can in some cases result
in execution proceeding with C_MASKINTS set (it is cleared on line 1021
but is then set immediately afterward in cortex_m_clear_halt), causing
failure of the application. Replace these mem_ap_write_u32 calls with
cortex_m_write_debug_halt_mask calls to do the same jobs.

Change-Id: Id35ca7f6057c2df2ba9cd67c53a73b50816d0b71
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4239
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2017-10-27 11:47:16 +01:00
Megan Wachs 1672f9a60d Merge remote-tracking branch 'origin/riscv' into riscv-compliance 2017-10-25 15:41:41 -07:00
Tim Newsome 1acb128290 Remove unused variables.
Change-Id: I678d0a65c22792895375dc6916381f81af8f83e4
2017-10-25 13:37:56 -07:00
Tim Newsome 23bd6d08c9 Remove more unused functionality.
Change-Id: I43283b9556c959f891a587fb39bdd1ab9206e8af
2017-10-24 15:11:33 -07:00
Tim Newsome dbecbfee99 Add a fence after memory writes.
Change-Id: I5137479b685f735aa573cec5d40170016c40f597
2017-10-24 12:15:25 -07:00
Tim Newsome 59a0340261 Remove more unused code.
Change-Id: I962660f58d948f85df6e073065e15e5d8f4a02b6
2017-10-24 11:38:39 -07:00
Tim Newsome 8432b7cf3d Remove more unused code.
Change-Id: Id91237c163d86e8f4d039503ca33b4ad7571ecd1
2017-10-24 11:34:48 -07:00
Tim Newsome 3ba6d46fc2 Remove unused functionality.
Change-Id: Ic70cebd62bbd04f7ae5566504fbb279a11de57f0
2017-10-23 14:45:58 -07:00
Tim Newsome 5425c871c9 Properly fix memory read when encountering busy.
Change-Id: I377054495e860076edc2f38d1cc0f11c23f98d3b
2017-10-23 14:13:46 -07:00
Freddie Chopin 079d78f7de Fix GCC7 warnings about string truncation
GCC7 with -Wall warns about possible string truncation with
snprint()-type functions with "directive output may be truncated writing
1 byte into a region of size between 0 and 9
[-Werror=format-truncation=]" + "note: ‘snprintf’ output between 5 and
14 bytes into a destination of size 12" (or similar). Fix this by
increasing sizes of buffers.

See https://gcc.gnu.org/gcc-7/changes.html

Change-Id: Ib848f2a56dd658783534158947ae1be7c0e99d45
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-on: http://openocd.zylin.com/4175
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
2017-10-23 10:54:24 +01:00
Freddie Chopin 9364b0dba4 Fix GCC7 warnings about switch-case fallthroughs
GCC7 with -Wextra warns about switch-case blocks which fallthrough with
"this statement may fall through [-Werror=implicit-fallthrough=]". This
can be fixed by adding "special" comments: "/* fallthrough */".

See https://gcc.gnu.org/gcc-7/changes.html

Change-Id: Iba0be791dbdd86984489b2d9a0592bb59828da1e
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-on: http://openocd.zylin.com/4174
Tested-by: jenkins
2017-10-23 10:54:16 +01:00
Andreas Fritiofson ef49b34b2a arm: semihosting: set command line arguments
Add "arm semihosting_cmdline [argv0 argv1 ...]" for setting the
command line arguments for the debuggee.

[andreas.fritiofson@gmail.com]: Dynamic allocation, empty default

Change-Id: I831ddd161d602f251940e29608a154e9590fdee1
Signed-off-by: Christian Groessler <chris@groessler.org>
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3106
Tested-by: jenkins
2017-10-22 23:06:09 +01:00
Tim Newsome a3a137062d Pay attention to impebreak.
This required updating debug_defines.h, which caused a few other small
cleanups as well.

Change-Id: I3c2cb418d7eff3093d7664c5563b2af5e8b530eb
2017-10-18 14:21:23 -07:00
Tim Newsome 85bfab36ad Remove unused functionality.
Change-Id: I0c1464e2e6aa12d0cb1025ed0a7c1c483e7403b7
2017-10-18 12:47:07 -07:00
Tim Newsome 5d3f5c35d2 Still restore registers if an access failed.
Change-Id: I11571f0926f69a34f95b4929f633fdecd3a4e810
2017-10-18 12:32:41 -07:00
Tim Newsome 7edd9b1786 Fix FPR access.
Change-Id: I1379de87904f1cf40b45d1a5490249e3ba90d7d0
2017-10-18 11:47:15 -07:00
Tim Newsome 1662508911 Differentiate "target not halted" messages.
Change-Id: I8728fa007289d7af5c6791142e76eb5777c83ca4
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: http://openocd.zylin.com/4244
Tested-by: jenkins
Reviewed-by: Liviu Ionescu <ilg@livius.net>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2017-10-18 08:38:18 +01:00
Tim Newsome 1356be121e Document `struct reg` fields.
Change-Id: I286316079e2e4d4f09427a4ffbecadb48c5dc9d9
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: http://openocd.zylin.com/4250
Tested-by: jenkins
Reviewed-by: Liviu Ionescu <ilg@livius.net>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2017-10-18 08:35:42 +01:00
Tim Newsome a0623b2fa8 Don't crash when encountering RV64.
Change-Id: Ie915ce830c3499919e4918ad443a5e225cf8c4d9
2017-10-17 11:58:51 -07:00
Tim Newsome 65be0776d8 Memory read/write works if the core can keep up.
Change-Id: Ieca50ece266fbc9d2ff16a5cc2e6b4b926ad5e6f
2017-10-17 11:52:07 -07:00
Tim Newsome fbe2980eb7 MemTest64 passes.
Change-Id: I75996b71c3f31025c89ef596a08e01d191405336
2017-10-17 11:15:51 -07:00
Tim Newsome d94b38279a Memtest{16,32} pass.
Change-Id: I15c2a4fd2bb9a7b30762d07f3b3a74d2f477746b
2017-10-16 21:08:59 -07:00
Tim Newsome 7ec7bc32fe At least some memory writes work.
Change-Id: I6fcf261341f10ec34df01bb844744439d02471a8
2017-10-13 12:50:02 -07:00
Tim Newsome e7bb815e87 Register read/write might be working.
Change-Id: I6c51d6157dde56d8cd666b4d30ec7bbc7a4bef9f
2017-10-12 14:38:52 -07:00
Tim Newsome 94e8250713 WIP; doesn't work.
Change-Id: Ia407e82ccbd2044ad61e0845d285dd5765154476
2017-10-12 11:45:52 -07:00
Tim Newsome 77802af655 Remove duplicate progbuf size variable.
Change-Id: I662ff84d13ecfc7faae51406a4df57a3643116f0
2017-10-10 16:27:51 -07:00
Tim Newsome f06aaa9058 Merge pull request #123 from riscv/fast_rbb
Add read buffer to bitbang, improving performance.
2017-10-09 11:06:20 -07:00
Tim Newsome 2da7820833 Revert this LOG_INFO to LOG_DEBUG.
Change-Id: I75dd7667a542aa1c6ea10f97fe1e00dd1ecba69d
2017-10-08 11:41:55 -07:00
Tim Newsome 7aafd61953 Clean up this JTAG debug code.
Change-Id: Ie7c773b98271d11085d5e50c40b64990710de387
2017-10-06 13:55:52 -07:00
Tim Newsome d5836dceff Merge pull request #126 from riscv/compile
Fix compile warnings.
2017-10-04 16:07:40 -07:00
Tim Newsome 24658db50e Fix compile warnings.
Partly fixes #124.

Change-Id: I3a7fd65c643e40b142709806cb9fb4cc62bb955f
2017-10-04 16:02:30 -07:00
Tim Newsome 916759e0de Revert ae74097f (extra ftdi debug).
Instead it makes more sense to push the debug changes to jtag/core.c.

Change-Id: I73bafa2a054e1f72b7752cfbce9ffc14303fc4c4
2017-10-04 15:44:07 -07:00
Tim Newsome 28eb10f43d Ensure the buffer doesn't overflow.
Tested with a variety of prime buffer sizes.

Change-Id: I2b4835d46adf4c971111da88e8de4b46eb8dad41
2017-10-04 15:23:38 -07:00
Tim Newsome abe7eba25a Merge pull request #118 from riscv/priv
Fix priv access
2017-10-04 12:52:21 -07:00
Tim Newsome 1b11d579ea Add read buffer to bitbang, improving performance.
This reduces the time for one testcase where OpenOCD connects to a
simulator from 12.30s to 5.35s!

Running all our tests went from 13m13s to 3m55s.

Change-Id: I7dc774e1e0f5752905ac4318fd9b85b930374a05
2017-10-03 15:38:31 -07:00
Tim Newsome a3c26250bf Merge pull request #116 from riscv/multigdb
Fix trigger code to work with multi-gdb mode instead of RTOS mode
2017-10-03 11:53:58 -07:00
Tim Newsome e94c809ce4 Merge pull request #120 from gnu-mcu-eclipse/riscv-warnings
Silence some clang warnings
2017-10-03 11:27:57 -07:00
Slowcoder 2168c475ff nrf5: Add nRF52832-QFAA support
Change-Id: Ica9e34e873cac182662b1e32a9b3164dbc0c935f
Signed-off-by: Slowcoder <slowcoder@gmail.com>
Reviewed-on: http://openocd.zylin.com/4210
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-10-03 11:28:20 +01:00
Slowcoder d43308af75 nrf51: Rename to nrf5
Renaming of all nrf51 NOR flash code to nrf5, as to prepare the
code for being able to flash nrf51 and nrf52 chips.

The nrf51 command is retained for backwards compatability.

"nRF5" is also the name Nordic Semiconductor uses to describe
both the nrf51 and nrf52 chips.

Change-Id: I5f4e3f1ec780184b28ad44f735a746e68908c502
Signed-off-by: Slowcoder <slowcoder@gmail.com>
Reviewed-on: http://openocd.zylin.com/4209
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-10-03 11:28:13 +01:00
Slowcoder 52885d2b53 nrf51: Refactor device-list
This cleans up the list of supported nrf51 chips considerably.

Change-Id: Ic74685657bb72a8703c0a49df4c48c54604ec2a7
Signed-off-by: Slowcoder <slowcoder@gmail.com>
Reviewed-on: http://openocd.zylin.com/4208
Tested-by: jenkins
Reviewed-by: Fredrik Hederstierna <fredrik@hederstierna.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-10-03 11:28:03 +01:00
Uwe Bonnes 9bbe299b35 stm32lx.c: Read IDcode at appropriate address.
Trying to read the L0 idcode at the L1 idcode address 0xE0042000 often
resulted in an uncatched error. Reading at the right L0 address 0x40015800
afterwards results in reading 0. So access to the device is denied..

Change-Id: I6de92cf99a5d5d46c72f9ba055613cbc5753a951
Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Reviewed-on: http://openocd.zylin.com/3883
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-10-03 11:25:27 +01:00
Robert Foss f712098323 server: Add port number to socket bind error
Make this error message more useful by providing the port number
that we tried to bind to.

Change-Id: Ieb18adf0725a6ae99c77ebfaadc49d64ed407bbe
Signed-off-by: Robert Foss <robert.foss@collabora.com>
Reviewed-on: http://openocd.zylin.com/4157
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-10-03 11:23:15 +01:00
Andrea Merello 10a3b24daf flash: efm32: add support for EFR-familty (e.g. bluegecko)
This patch adds support for Blue Gecko and Mighty Gecko chips from
Silabs.

They have different EFM32_MSC_REGBASE and LOCK register offset.

Based on the original patch from Andreas Kemnade.

Change-Id: I166c14960ced7c880b68083badd1b31372fefabe
Cc: Andreas Kemnade <andreas@kemnade.info>
Signed-off-by: Andrea Merello <andrea.merello@gmail.com>
Reviewed-on: http://openocd.zylin.com/4034
Reviewed-by: Jonas Norling <jonas.norling@cyanconnode.com>
Tested-by: jenkins
Reviewed-by: Fredrik Hederstierna <fredrik@hederstierna.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: chrysn <chrysn@fsfe.org>
2017-10-03 11:22:18 +01:00
Fabio Utzig e8b6aaa8e5 Add missing break
Change-Id: Ie1de679fe6ab5ace05fc3e156c71f34b296b3d3b
Signed-off-by: Fabio Utzig <utzig@apache.org>
Reviewed-on: http://openocd.zylin.com/4200
Tested-by: jenkins
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Esben Haabendal <esbenhaabendal@gmail.com>
2017-10-03 11:19:58 +01:00
Marc Schink 5fd8eaadf9 stm32f2x: Fix left shift of negative value
Use unsigned constant for left shift operation in order to avoid the
following error with GCC >= 6.0:

../src/flash/nor/stm32f2x.c: In function ‘stm32x_handle_unlock_command’:
../src/flash/nor/stm32f2x.c:1324:67: error: left shift of negative value [-Werror=shift-negative-value]
   stm32x_info->option_bytes.optcr2_pcrop = OPTCR2_PCROP_RDP | (~1 << bank->num_sectors);

Change-Id: I0ac082bd0dbb8dc2f61ffff8fdf486ab7962d2e0
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4207
Tested-by: jenkins
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Anton Fosselius <anton.fosselius@gmail.com>
Reviewed-by: Esben Haabendal <esbenhaabendal@gmail.com>
2017-10-03 11:19:45 +01:00
Tim Newsome 18a94a1a8a Fix typo in comment.
Change-Id: I6567f85f399315e1dac98881765dfaa6eab5facb
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: http://openocd.zylin.com/4238
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-10-03 11:19:26 +01:00
Marc Schink b0dcff5e34 jlink: Disable TCP/IP discovery
If no serial number is specified, disable TCP/IP device discovery to
ensure that a user does not unintentionally operate on a remote device.

Change-Id: I6a7e913b8b679fae003825468cd86d2014849b29
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4214
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-10-03 11:19:10 +01:00
Marc Schink 98e63cdc86 jlink: Disable automatic device selection
If multiple devices are attached, do not automatically use the first
device found. Otherwise, a user may unintentionally operate on the
wrong device.

Change-Id: I08c4110b82e911e9e3e744d41830ffc6c56c44bf
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4213
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-10-03 11:18:52 +01:00
Marc Schink f981730fe7 jlink: Use error description in log messages
Use a human-readable error description rather than just the error name
in log messages.

Change-Id: Iab4ff7a7e4d9993983a07eab9f462820d4ee8190
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4212
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-10-03 11:18:46 +01:00
Marc Schink 7d8d2654e6 jlink: Make libusb optional
libusb is now optional for libjaylink because support for TCP/IP
devices is always available.

Change-Id: I03f2566f8e1703276671ac0f353f72394d21f2f0
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4204
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-10-03 11:18:40 +01:00
Marc Schink ba24c1fc05 jlink: Make use of debug level for I/O messages
Change-Id: Iba08c119a80041f9c1b4c9bd7e83bb4f9bbb7199
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4203
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-10-03 11:18:32 +01:00
Marc Schink 4dc09d98d0 libjaylink: Update to latest Git version
Update to latest Git version and bump required libjaylink package
version to 0.2.0.

This version introduces support for devices with TCP/IP interface (e.g.
SEGGER Flasher ARM) and an additional debug level for I/O messages.

Change-Id: I030236aa704a91d1bb1843dd30010865947747e0
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4202
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-10-03 11:18:26 +01:00
Marc Schink 1ab0303dbc helper/options: Add missing #include for MinGW and MSYS2
Change-Id: I3bb295f52706b641661241e3e047306811ca915e
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4201
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-10-03 11:18:20 +01:00
Karl Palsson bf5258d876 telnet_server: increase buffer sizes to allow longer commands.
A common use case seen in the wild is echoing a string of commands to an
existing openocd instance via netcat.  The sequence of ; separated
commands can easily run over the line limit of only 256 chars.

Increasing this dramatically reduces surprises, at the expense of a tiny
amount of extra ram usage.

Change-Id: I2389d99d316a96b5fa03f0894b43c412308e12c4
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-on: http://openocd.zylin.com/4132
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-10-03 11:16:48 +01:00
Karl Palsson e78b33e3ca telnet_server: drop unused options
They're never used, so just drop them.

Change-Id: Ie137deed3e7258f9d6af7e0cb508e73df0f53ee0
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-on: http://openocd.zylin.com/4131
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-10-03 11:16:36 +01:00
Liviu Ionescu 066ce338d8 flash/nor/Makefile.am: lexicographical order 2017-10-03 00:48:15 +03:00
Liviu Ionescu f9f303923e target/riscv/asm.h: use tab for indentation 2017-10-03 00:36:22 +03:00
Liviu Ionescu f5a69e547f target/riscv/program.c: fix clang warning
- I'm not sure I understand the logic behind the original statement,
but on macOS it fails to compile.
2017-10-03 00:23:14 +03:00
Liviu Ionescu 728a617bd4 target/riscv: Silence -Werror=return-type
- clang compains about the functions not returning a value
2017-10-03 00:17:57 +03:00
Tim Newsome 12bb3a4fd4 Merge pull request #119 from gnu-mcu-eclipse/riscv-upd
Update to master (Aug 10, 2017)
2017-10-02 11:56:19 -07:00
Liviu Ionescu 7dc04d7d0a Merge commit '7719e9618e753ac41a46a2488dfba549ac578891' into riscv-upd 2017-10-01 01:57:46 +03:00
Tim Newsome e64bb8c44a Fix priv access on 0.13. 2017-09-30 14:15:37 -07:00
Tim Newsome 6795270a8e Make priv readable in 0.11. 2017-09-30 13:31:57 -07:00
Tim Newsome 1083352576 Share register numbers between 0.11 and 0.13. 2017-09-30 13:13:03 -07:00
Tim Newsome 51f73a6769 Fix triggers for multi-gdb mode. 2017-09-26 15:40:49 -07:00
Tim Newsome 744894e965 Better debug messages. 2017-09-26 15:40:41 -07:00
Tim Newsome f0195868d3 Fall back on ndmreset if hartreset is unsupported. 2017-09-21 14:53:12 -07:00
Tim Newsome fe36097ff8 Fix reset for multicore. 2017-09-21 12:42:40 -07:00
Tim Newsome 848fe0ffcf Cleaning up single-hart reset. 2017-09-19 17:41:52 -07:00
Tim Newsome 4e701669b7 Merge pull request #113 from riscv/macos_build
Add clang build
2017-09-19 14:11:10 -07:00
Tim Newsome 60354cbea2 clang fix, don't allow unaligned uint64_t pointers 2017-09-18 14:56:46 -07:00
Tim Newsome ed9a04bde9 Remove unnecessary abs(). 2017-09-18 14:35:47 -07:00
Tim Newsome 0abd94b50c Make constants unsigned for clang. 2017-09-18 14:23:59 -07:00
Tim Newsome 604dfa0dcc Try to fix some clang warnings. 2017-09-18 14:03:33 -07:00
Tim Newsome 157a67a98a Be more clear in multi-core systems without -rtos
Don't print out there's a hart with XLEN of 0.
2017-09-18 11:29:14 -07:00
Tim Newsome ce20be3d78 Add support for F extension. 2017-09-14 16:23:47 -07:00
Tim Newsome f9b2549e20 Tell user how to increase timeout. 2017-09-11 12:11:24 -07:00
Tim Newsome a6ec1a0e68 Add timeout to another infinite loop. 2017-09-11 11:35:47 -07:00
Tim Newsome ce740d02d6 Properly show XLEN for each thread. 2017-09-01 11:29:15 -07:00
Tim Newsome 12aca4ab7e Merge branch 'riscv' into keepalive 2017-08-30 12:09:51 -07:00
Tim Newsome 3c25b9a0c4 Merge pull request #105 from riscv/memread
memory read is now completely stable even on intermittently slow targets
2017-08-29 17:33:51 -07:00
Tim Newsome 6721988ce3 Ensure read_memory() only reads each address once.
Previously it might read an address multiple times if an abstract
command took longer to execute than expected.

The new implementations reads from the target how far it has gotten
along reading memory, and resumes from there if cmderr=busy.

This ended up being a bigger change than I envisioned, but in the end it
deleted more lines than it added, so I'm happy. :-)
2017-08-29 17:25:04 -07:00
Tim Newsome 2efc415db4 Finally nailed memory read on slow targets
The downloaded program now post-increments, and there's no longer an
attempt to read the current address from the target. This made it easier
to fix the problem where at the start of the loop the current address
was already read (in regular entry) or has not yet been read (when the
first round through the loop encountered busy more than once, or busy
was encountered at least once later on).
2017-08-28 11:17:55 -07:00
Tim Newsome 5f53655e65 Fix off-by-one error. 2017-08-26 18:25:10 -07:00
Tim Newsome eef9442aa7 Remove redundant code. 2017-08-26 17:50:05 -07:00
Tim Newsome 5bdee8bc66 Fix off-by-3 error on 64-bit targets.
This caused everything to fall apart when debugging slow 64-bit targets.
2017-08-26 17:49:13 -07:00
Tim Newsome 8bcec87cc1 Remove unnecessary \n 2017-08-26 16:53:00 -07:00
Tim Newsome 92ef328161 Don't reset DMI when an abstract command is busy. 2017-08-25 18:14:08 -07:00
Tim Newsome a9bcc48064 Remove unnecessary newlines. 2017-08-25 18:14:08 -07:00
Palmer Dabbelt 322669ca98 Merge pull request #95 from riscv/memread
Fix block memory reads on slow targets.
2017-08-25 16:57:07 -07:00
Tim Newsome 4d0e88d887 Merge pull request #100 from riscv/riscv_timeout_commands
riscv: Add commands for setting timeouts
2017-08-25 09:49:15 -07:00
Liviu Ionescu b42bc76e2e server.c: fix clang warning
/Users/ilg/Work/openocd/openocd.git/src/server/server.c:305:22: error:
incompatible pointer types passing 'struct sockaddr_in *' to
parameter of type 'struct sockaddr *'
[-Werror,-Wincompatible-pointer-types]
getsockname(c->fd, &addr_in, &addr_in_size);
^~~~~~~~
/usr/include/sys/socket.h:687:50: note: passing argument to parameter
here
int     getsockname(int, struct sockaddr * __restrict, socklen_t *
__restrict)
2017-08-25 14:53:45 +03:00
Megan Wachs 6e16ef2bd4 Merge remote-tracking branch 'origin/riscv' into riscv-compliance 2017-08-15 17:22:48 -07:00
Megan Wachs 6200d9a180 Merge branch 'riscv_timeout_commands' into riscv-compliance 2017-08-15 17:22:08 -07:00
Megan Wachs 94de39c221 riscv: Put commandd_handlers before they are needed. Tabs vs spaces. 2017-08-15 17:04:59 -07:00
Megan Wachs 879c274cb9 riscv: Add commands for setting timeouts 2017-08-15 15:59:40 -07:00
Megan Wachs 3ec1772c96 riscv: Add commands for setting timeouts 2017-08-15 15:55:09 -07:00
Tim Newsome 0ff4103a26 Reset address if target was busy during bust write
Improve Issue #98.

DebugCompareSections is still failing for me (with an instrumented
sometimes-slow spike), but MemTestBlock now passes reliably.
2017-08-15 15:47:35 -07:00
Tim Newsome 5c39079a62 Remove some unnecessary casts. 2017-08-15 14:29:24 -07:00
Tim Newsome 5092f96105 Add some keep_alive()s for use with slow targets. 2017-08-15 13:31:06 -07:00
Tim Newsome 0d74c8689d Fix block memory reads on slow targets.
The interesting new code concerns ignore_prev_addr and
this_is_last_read.

Additionally, I tweaked some debug output, and optimized
riscv_batch_run() when the batch is empty.
2017-08-14 15:02:19 -07:00
Megan Wachs 25eedb94a5 Merge remote-tracking branch 'origin/riscv' into riscv-compliance 2017-08-14 12:08:58 -07:00
Tim Newsome 2706df0ec3 Fix a corner case in block memory read. 2017-08-13 14:14:23 -07:00
Gleb Gagarin 3109da7dfd Force actual read from prog buffer for the last transaction in read_memory() 2017-08-12 14:51:12 -07:00
Gleb Gagarin e676d3dae6 Fixed off-by-one error in previous commit 2017-08-11 17:46:35 -07:00
Gleb Gagarin 39b01259fa fixed memory leak introduced by previous commit 2017-08-10 16:37:50 -07:00
Gleb Gagarin b5692585de Fix reads beyond requested memory range 2017-08-10 14:27:11 -07:00
Andreas Bolsch 7719e9618e Support for STM32F722, F723, F413 and F423
IDs for STM32F722, F723, F413 and F423 added, handling of PCROP
for F722/723 and additional nWPRT bits for F413/423 implemented.
The additional protection bit positions for F413/423 conflict
with other options bits for the F7xx variants, additionally the
last two sectors share a common bit.

Protection for F413 and F767/777 now use protection blocks
rather sectors for dealing with protections bits.

Checking for halted state in 'lock' and 'unlock' removed: When
PCROP is activated in F723, halted state is not detected properly,
but lock/unlock sequence is required to disable PCROP.

Tested with STM32F723E-Disco, STM32F413ZH-Nucleo.

Change-Id: Ie6ddab47a9ae8461087d369b4f289b7f9d1e031c
Signed-off-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-on: http://openocd.zylin.com/4045
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-08-10 09:35:47 +01:00
Andreas Fritiofson 3ee81fd787 log: Add a new debug level (4) for verbose I/O debug
Change ftdi SWD driver and CMSIS-DAP to use it instead of LOG_DEBUG().

Change-Id: I17ba3de2086c7159209db61fba3faf067dfc5023
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3805
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2017-08-10 09:29:06 +01:00
Karl Palsson 04b23ef502 stm32l1: Devid 0x429 only has 8bit flash size register
A footnote in RM0038r14.

Change-Id: Ic31894d846fbbe917a7290b2b7ff8fb582bb65da
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-on: http://openocd.zylin.com/4198
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-08-10 09:20:39 +01:00
Tim Newsome efcfcf555f Fix assertion failure when reading from address 0. 2017-08-09 12:42:17 -07:00
Tim Newsome b897807224 When gdb_port is 0, don't increment it.
Usually incrementing to get the next port is a good idea, but when set
to 0 the idea is to find an arbitrary unallocated port. 1 is almost
certainly not helpful.
2017-08-07 13:55:37 -07:00
Tim Newsome 46b5f913c7 Display register numbers in a more usable format. 2017-07-27 13:45:26 -07:00
Tim Newsome 753d15e22c Print out which port OpenOCD is listening on.
This is essential when a test environment asks OpenOCD to listen on port
0, so that the environment can easily discover which port is actually
being used.
2017-07-25 14:08:10 -07:00
Tomas Vanek 02bc718d1a flash Kinetis: fix probe for FlexNVM partitioned as EEPROM backup
If a MCU has FlexNVM partitioned as EEPROM backup only
(no data flash), kinetis_probe_chip() detects zero fcfg2_maxaddr1
and adjusts flash banks count to 1, what is obviously wrong.

The change limits the test to devices without FlexNVM.

Computation of program flash/FlexNVM blocks is now more robust.

Missing case 0x07 is added to switch (fcfg1_depart)

Change-Id: I0bd6030a0fe1ab62aeb0223bbdf2aee1505bf6a0
Reported-by: simon.haines@scalardata.com
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4180
Tested-by: jenkins
Reviewed-by: Simon Haines <simon.haines@scalardata.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-07-24 13:11:06 +01:00
Tomas Vanek dbd0d90af9 flash Kinetis: fix devices with smallest program flash (8 and 16 kB)
Change-Id: I2692b9877a7f877104528f279a69e8cc1cfbcdbf
Reported-by: David Miller Lowe <milhead@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4173
Tested-by: jenkins
Reviewed-by: Miller Lowe <miller.lowe@trailtech.net>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-07-24 13:09:37 +01:00
Tim Newsome b032eb1bcc Use a wall clock timeout to complete reset. 2017-07-16 11:48:12 -07:00
Tim Newsome f0f1df1061 Fix infinite loop in reset. 2017-07-14 12:50:11 -07:00
Megan Wachs c8015e8dc1 riscv compliance: More post-test cleanup 2017-07-13 08:00:22 -07:00
Tim Newsome d60dbd60e8 Share trigger code between 0.11 and 0.13 code.
The actual implementation of triggers didn't change between those two
versions, so there's no need to duplicate the code.

In the process, I also fixed a minor multicore bug where tselect didn't
always get written on all harts.
2017-07-12 19:54:40 -07:00
Megan Wachs 20d46b8bf0 Merge remote-tracking branch 'origin/riscv' into riscv-compliance 2017-07-12 18:46:26 -07:00
Megan Wachs 66fa38add7 riscv-compliance: Halt harts again at the end of the test. 2017-07-12 18:44:41 -07:00
Tim Newsome 2deb02695e Forgot to commit this follow up to PR #79 2017-07-12 17:51:38 -07:00
Tim Newsome 09bf86e31a Keep around cmderr for callers to inspect.
Use this to only change abstract register access behavior when cmderr
explicitly says the requested operation is unsupported.
2017-07-12 14:36:09 -07:00
Tim Newsome 856f70fe44 Try abstract register writes as well. 2017-07-12 14:13:31 -07:00
Tim Newsome f37e93bbc0 Try using abstract commands to read registers
This is the only way the spec guarantees that GPRs are accessible, and
depending on the implementation this might be the only way that CSRs are
accessible.

Also changed the debug code that parses out DMI fields to be simpler to
maintain (albeit a little slower).

riscv013_execute_debug_buffer() now automatically clears cmderr if the
command fails. That feels like the right behavior. (It does return the
error to its caller.)
2017-07-12 14:13:31 -07:00
Tim Newsome da74f511b9 Merge pull request #80 from riscv/triggers
Disable debugger-set triggers on connect
2017-07-11 12:13:56 -07:00
Palmer Dabbelt 10a61000b5 Use LL for 64-bit defines, as Windows is LLP64
This should also fix bugs on ILP32 systems.
2017-07-10 13:45:42 -07:00
Tim Newsome 4072fa493b Disable debugger-set triggers on connect
When first connecting to a target, have the debugger disable any
hardware triggers that are set by a previously connected debugger.
The 0.11 code already did this, but 0.13 did not.

To achieve this I decided to share the code to enumerate triggers
between 0.11 and 0.13, which required me to implement get_register() and
set_register() for 0.11, which made the whole change a lot larger than
you might have guessed.

Hopefully this sets us up to in the future share the code to set/remove
triggers as well.
2017-07-10 10:26:24 -07:00
Andreas Fritiofson 29cfe9c5ee mips32: inline functions in headers must be static
Change-Id: If1d0fc6766cadc2db33408ae5c0968de6b7a1b94
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/4178
Tested-by: jenkins
Reviewed-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-by: Stian Skjelstad <stian@nixia.no>
2017-07-07 09:54:35 +01:00
Tim Newsome 21e06e1d89 Fix 32-bit build.
Code taken from http://openocd.zylin.com/#/c/4178/
2017-07-06 14:53:28 -07:00
Tim Newsome 31e5b53a46 Merge pull request #74 from riscv/build32
Fix 32-bit build errors.
2017-07-06 13:41:47 -07:00
mwachs5 6842fd2c10 riscv: Add more TODO compliance comments 2017-07-05 17:59:30 -07:00
mwachs5 bdc38561c0 riscv: Clean up reset/dmactive/step compliance test 2017-07-05 17:54:55 -07:00
mwachs5 2b94888100 riscv: Add single-step, reset, and dmactive to the compliance test. 2017-07-05 15:11:40 -07:00
mwachs5 87abbe4a51 Merge remote-tracking branch 'origin/riscv' into riscv-compliance 2017-07-05 11:02:30 -07:00
Tim Newsome 321619946b Merge pull request #73 from riscv/old_triggers
Add back support for type 1 triggers
2017-07-03 13:52:16 -07:00
Palmer Dabbelt 3cff4213a4 Merge pull request #69 from riscv/multi-gdb
Fix the multi-GDB mode bugs
2017-07-03 13:18:06 -07:00
Tim Newsome 450307b66f Fix 32-bit build errors.
I only compiled the source. Didn't have the tooling installed to link.
Hopefully that's good enough.
Fixes #71.
2017-07-03 12:17:07 -07:00
Tim Newsome f18fd83ac7 Fix trigger set/clear bug. 2017-07-03 11:52:35 -07:00
Tim Newsome 6c627e9ea9 Add back support for type 1 triggers.
They were implemented, and people want to keep using them.
Also make OpenOCD tolerate cores that have $misa at 0xf10 instead of the
current address of 0x301.
Actually return an error when we fail to read a CSR.
Tweak cache_set32() debug output.
2017-07-03 11:01:10 -07:00
Dmitry Ryzhov 99a3673507 Fix comment about saving the temporary register in examine procedure. 2017-07-01 15:09:23 +03:00
Steven Stallion 0e4fbfba03 rtos: better sanity checking for uCOS-III
This patch improves the OSRunning check. If the rtos_running check
fails, update_threads will return an error rather than attempt to update
the thread list using bad values.

Change-Id: I8614c325504d3a9ab19aebb6862b1fe445a0c8e7
Signed-off-by: Steven Stallion <stallion@squareup.com>
Reviewed-on: http://openocd.zylin.com/4166
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2017-06-30 21:23:47 +01:00
Steven Stallion e6fe4dddb9 rtos: style corrections for uCOS-III
This patch corrects a number of style infractions in RTOS support for
uC/OS-III. These were missed during initial review last year prior to
the 0.10.0 release.

Change-Id: Ia2139f6ca381d4087fd8ee989f7a03ac474d7440
Signed-off-by: Steven Stallion <stallion@squareup.com>
Reviewed-on: http://openocd.zylin.com/4120
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2017-06-30 21:23:15 +01:00
Dmitry Ryzhov 7d451e00f5 Restore value of temporary register (s0) in examine OpenOCD procedure in case of core can not execute 64 bit instruction. 2017-06-30 19:15:58 +03:00
Richard Watts b3cf9a665c flash/nor/efm32: Support EZR32HG devices.
Recognise the family number for Silicon Labs EZR32HG devices and
select the correct flash page size.

Change-Id: I876e930f3a9f679557fa0d0acac33e9bbfb28c46
Signed-off-by: Richard Watts <rrw@kynesim.co.uk>
Reviewed-on: http://openocd.zylin.com/3934
Tested-by: jenkins
Reviewed-by: Fredrik Hederstierna <fredrik@hederstierna.com>
Reviewed-by: Jonas Norling <jonas.norling@cyanconnode.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-06-30 10:57:20 +01:00
Andreas Fritiofson 868a100143 target: Fix snprintf format string and argument mismatch in md output
Commit 47b8cf842 changed the fixed type of the value argument to snprint
but didn't change the format string to match for sizes != 64 bit.

Change-Id: I908b06f49ab69d04224282949190a0de883048e0
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/4167
Tested-by: jenkins
Reviewed-by: Stian Skjelstad <stian@nixia.no>
Reviewed-by: Philipp Guehring <pg@futureware.at>
2017-06-30 10:06:32 +01:00
Megan Wachs 8dc3c0a55c riscv: correct libjaylink version 2017-06-28 19:44:18 -07:00
Megan Wachs 7bc23c7776 riscv: Add some comments on what else compliance test needs 2017-06-28 19:36:22 -07:00
Megan Wachs 434fb3708a riscv: Correct DPC masking in compliance test. 2017-06-28 19:36:22 -07:00
Megan Wachs e32a8c911d riscv: Fix AUTOEXEC test for 32-bit cores 2017-06-28 19:36:22 -07:00
mwachs5 4101740928 riscv: add compliance tests for DPC and DCSR 2017-06-28 19:36:22 -07:00
mwachs5 e17ca3a31d riscv: More compliance tests for core registers. 2017-06-28 19:36:22 -07:00
mwachs5 222850df55 debug: add a 'wfi' to compliance test. 2017-06-28 19:36:22 -07:00
mwachs5 9e76ec1779 riscv: Compliance test for HALTREQ/RESUMEREQ R/W 2017-06-28 19:36:22 -07:00
mwachs5 ccc605158a riscv: Added several compliance test items 2017-06-28 19:32:38 -07:00
mwachs5 95ee7975ea riscv: Add skeleton of RISC-V v013 compliance 2017-06-28 19:32:38 -07:00
Megan Wachs 7a4948c126 riscv: initial checkin of a 'compliance test' command. 2017-06-28 19:32:38 -07:00
Tim Newsome b6f8efbf44 Check for errors in read_csr().
Also slightly improve debugging output.
2017-06-27 15:11:06 -07:00
Palmer Dabbelt d77c4a953c Don't set breakpoints on disabled harts 2017-06-21 12:25:20 -07:00
Palmer Dabbelt 689d0fcaf6 No longer hard-code the non-RTOS hart to 0
I was just being lazy here.
2017-06-21 12:25:19 -07:00
Palmer Dabbelt 4bdb042224 Allow memory writes to proceed on all harts 2017-06-21 12:25:19 -07:00
Palmer Dabbelt a277416a39 Refactor examine, to avoid some assertions
Now that we're supporting non-RTOS multi-hart mode there's some more
assertions that you're running on the right hart.  Those assertions
aren't sane very early in examine, so I avoid them.
2017-06-21 12:25:19 -07:00
Palmer Dabbelt 788908fcf0 Factor out checking if harts should be used
Rather than having a bunch of "if rtos" stuff, I now just check "if
hart_enabled".  This makes some code paths cleaner, all of which were
buggy in the non-RTOS multi-hart mode.
2017-06-21 10:09:16 -07:00
Palmer Dabbelt 9f4cac5a38 Set current_hartid from coreid
This avoids a bunch of RTOS special cases.
2017-06-20 17:19:05 -07:00
Tim Newsome 9cd98058a0 Set hardware triggers on all harts.
Right now we're using "threads" to represent harts. gdb/OpenOCD assume
there's only one set of hardware breakpoints among all threads. Make it
so.
2017-06-20 13:10:35 -07:00
Tim Newsome 10518351bb Don't immediately segfault with -rtos on v0.11. 2017-06-20 11:32:42 -07:00
Tim Newsome ccdd26e3ef Comment curious code. 2017-06-20 11:32:42 -07:00
Tim Newsome 927f9d8873 Update list of "threads" when harts are discovered.
This ensures that "info threads" is accurate as soon as gdb connects.
Also print out number of triggers that is discovered in examine().
2017-06-20 11:32:42 -07:00
Tim Newsome 4d264b3579 Put early DEBUG notice of XLEN back. 2017-06-19 08:46:02 -07:00
Marc Schink 1725abc3c0 flash/nor/tcl: Make read_bank parameters optional
Make 'offset' and 'length' parameters optional, if both are omitted
simply read the whole flash bank.

Additionally, check if the 'offset' and 'length' arguments are out of
bounds of the flash bank.

Change-Id: Ib9c1b0538a2c78ebcf702e2da11468dff407f8ff
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3862
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2017-06-17 12:45:56 +01:00
Marc Schink 7112e5f57a flash/nor/tcl: Respect flash bank boundary in write_bank
Respect the flash bank boundary and write only to the remaining part of
the bank even if the file content is larger.

Change-Id: I8f4c1b161c103a77bdb30c6bf052293b5ed48c41
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3861
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2017-06-17 12:45:11 +01:00
Marc Schink bdc71c5252 flash/nor/tcl: Make write_bank parameter optional
Make the 'offset' parameter optional, if omitted simply start at the
beginning of the flash bank.

Additionally, check if the argument is out of bounds of the flash bank.

Change-Id: I8e9632b539ad9e83211e1ac6a06da4c8109cbc60
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3860
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2017-06-17 12:44:25 +01:00
Marc Schink 2de82d39a2 flash/nor/tcl: Respect flash bank boundary in verify_bank
Respect the flash bank boundary and compare only the remaining content
of the bank even if the file content is larger.

Change-Id: I4d75979c7893fdd4d18372fa6b0321a0486b4fa9
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3859
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2017-06-17 12:43:29 +01:00
Joakim Nohlgård 2c8602ed9f flash Kinetis: Add support for newer KW series
Add support for flashing newer members of the NXP Kinetis KW family

Supported devices:
 - KW20Z
 - KW30Z
 - KW40Z
 - KW21Z
 - KW31Z
 - KW41Z

The earlier KW2xD and KW01Z devices are already supported by the code
for the older K-series.

Verified working on the FRDM-KW41Z development board.
Tested flashing both via GDB `load` and directly via OpenOCD flash
write commands.

Change-Id: I73eae477127a8b54a33005b3b526b5439450a808
Signed-off-by: Joakim Nohlgård <joakim.nohlgard@eistec.se>
Reviewed-on: http://openocd.zylin.com/4104
Tested-by: jenkins
Reviewed-by: Johann Fischer <johann_fischer@posteo.de>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2017-06-17 12:02:31 +01:00
Tomas Vanek 8dcb91fb83 flash Kinetis: add KL28 device
This device differs a lot from others in KL series.

Unfortunately the System Integration Module, where device
identification resides, moved to a new address so probe now have
to try both addresses of SIM_SDID.

Introduce a new bank creation option: -sim-base to ensure error free probe.

WDOG32 is slightly different from KE1x and on different address.
System Mode Controler changed layout to word aligned.

Change-Id: I2c9dca0c4ad4228fcc941d6078d15f5e394833ff
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4059
Tested-by: jenkins
Reviewed-by: Joakim Nohlgård <joakim.nohlgard@eistec.se>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-06-17 12:02:07 +01:00
Tomas Vanek 5a2608bbbc flash Kinetis: handle all types of watchdog, disable in reset-init
Active watchdog forces reset during armv7m_checksum_memory()
in verify_image command if run just after reset init.

COP watchdog in KL series and WDOG32 in KE1 series
have longer timeout however they need to be disabled too.

The change extends 'kinetis disable_wdog' command to optionally
probe the chip and use appropriate algorithm to disable watchdog.

Setting of cache type is also split from flash_support flags.

Tcl command 'kinetis disable_wdog' is called in reset-init event.

Change-Id: I3191e230f38b679ed74f2a97fe323ef8fb3fe22e
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3901
Tested-by: jenkins
Reviewed-by: Joakim Nohlgård <joakim.nohlgard@eistec.se>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-06-17 12:01:55 +01:00
Tomas Vanek c4d4c32a50 flash Kinetis: implement automatic bank creation based on device probe
Kinetis flash driver services huge number of MCU types. They have
one, two or four flash banks with option of FlexNVM. It would
require ~36 config files just for Kx series, more for KLx, KVx and KE1x.

The change implements alternative approach:
- configuration file creates just one pflash bank (common for all devices)
- when a device is probed, additional pflash or flexnvm banks are created
based on flash layout of the connected MCU
- created banks have names with optional numbering e.g. kx.pflash0 kx.pflash1
kx.flexnvm0 kx.flexnvm1
- the first bank gets renamed if numbering is used

Automatic bank creation is enabled by tcl command 'kinetis create_banks'.

Used solution has a drawback: other banks than pflash0 are not accessible
until pflash0 is probed. Fortunately gdb attach and standard programming
accesses banks in right sequence.

Change-Id: I5b9037cbefdb8a4176b7715fbcc3af4da4c1ab60
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3925
Tested-by: jenkins
Reviewed-by: Joakim Nohlgård <joakim.nohlgard@eistec.se>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-06-17 12:01:45 +01:00
Tomas Vanek 1fdc62ef65 flash Kinetis: split kinetis_chip from kinetis_flash_bank
Kinetis flash driver probed and decoded chip repeatedly for each flash
bank. Bank ordering used global bank number so multi-target
configuration was broken.

The change introduces kinetis_probe_chip() which reads SIM SDID
and SIM FCFG registers, decodes Kinetis series and family
and fills struct kinetis_chip. This probe runs once for all banks.

struct kinetis_chip contains pointers to all flash banks embeded
in the MCU. It simplifies iteration over all or specific MCU banks.

kinetis_probe_chip() generates MCU name and some informational messages
are improved.

Change-Id: I990db5c63ba490667eec0e5459086d83936662fb
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3924
Tested-by: jenkins
Reviewed-by: Joakim Nohlgård <joakim.nohlgard@eistec.se>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-06-17 12:01:24 +01:00
Tomas Vanek 16f364a591 flash Kinetis: add KV5x family
Real time control MCU has a Cortex-M7 and numerous changes in flash layout.
Introduced a new ID of MDM-AP.

While on it a LOG_DEBUG format error fixed.

Change-Id: I1018660ce0c3dd63ac5e2563408fabff3c3daef7
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3900
Tested-by: jenkins
Reviewed-by: Joakim Nohlgård <joakim.nohlgard@eistec.se>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-06-17 12:01:04 +01:00
Tomas Vanek 97d296637e flash Kinetis: add KL8x family, fix erase check
Secure devices KL81Z7 and KL82Z7 have no SERIESID field in ID register
so they have to be decoded in Kx branch (not KLx).

The flash controller in KL8x and also in K8x devices does not implement
FTFx_CMD_BLOCKSTAT command. Fix kinetis_blank_check() to work properly
using FTFx_CMD_SECTSTAT command only.
Introduce a new flag FS_NO_CMD_BLOCKSTAT to avoid use of FTFx_CMD_BLOCKSTAT
on these devices.

Change-Id: I3ff58718480acd8cce69f618f71667b6b1d9c4f3
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3898
Tested-by: jenkins
Reviewed-by: Joakim Nohlgård <joakim.nohlgard@eistec.se>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-06-17 12:00:53 +01:00
Tomas Vanek a0a504569b flash Kinetis: add KE1xZ and KE1xF families
The new Kinetis KE1x families use FTFE flash controller unlike KE0x.
Also SDID coding corresponds to new K, KL and KV families.
That's why KE1x is handled by kinetis driver instead of kinetis_ke

Change-Id: Ibb73e28e41dfbb086e761e1f006b089825dab854
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3896
Tested-by: jenkins
Reviewed-by: Joakim Nohlgård <joakim.nohlgard@eistec.se>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-06-17 11:59:36 +01:00
Tomas Vanek 278f63174d flash/nor: at91samd modified to use real erase sector size
Before this change SAMD driver defined "sector" equal to a flash
protection block. Oversize sectors (16kB for the biggest flash size)
made problems for flashing firmware split to two or more parts.

Removed superfluous test of sector protection before erase.

Change-Id: I8e6a6bda6ccd91eda2df67ec48270c69faa1bdd1
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3546
Tested-by: jenkins
Reviewed-by: Stian Skjelstad <stian@nixia.no>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-06-17 11:58:26 +01:00
Tomas Vanek 24c302752e flash/nor/at91sam4: remove FWS=6, rename at91samg to atsamg
FWS=6 workaround removed, as this appears to be a copy-paste error
from the SAM3X family. Originally addressed in http://openocd.zylin.com/3837
but not all occurences were removed.

Atmel changed chip naming and removed 91 prefix for atsamg, samd...

Change-Id: Ia2b43da82b2ff9b1c85fdb456a0a198ab095243d
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3926
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-06-17 11:56:54 +01:00
Tim Newsome 6082f35a55 Update debug_defines. Clarify debug output.
Update debug_defines from the spec, commit 920ec9a690.
Decode dmstatus scans in the debug output.
2017-06-16 14:02:25 -07:00
Tim Newsome fd81f7fcac Fix comment. 2017-06-16 14:02:25 -07:00
Tim Newsome 851849a295 Tell the user about detected harts. 2017-06-16 14:02:25 -07:00
Tim Newsome 3abb347bd9 Tighten up debug output.
Assuming the program allocating code works, we don't need its output.
Only output parts of the debug RAM that are actually doing something.
2017-06-16 14:02:25 -07:00
Tim Newsome ac2da40f74 Fix indentation to match OpenOCD style.
This change is just in the whitespace. There are no code changes.

See http://openocd.org/doc-release/doxygen/stylec.html
2017-06-15 12:44:50 -07:00
Tim Newsome 363a0a2bf2 Merge pull request #64 from riscv/release-fixes
Two fixes from the release branch
2017-06-15 12:43:46 -07:00
Tim Newsome 50a223ef9a Fix print statements to work with 64-bit addresses 2017-06-15 12:24:37 -07:00
Palmer Dabbelt afc9eb6c47 Jump to the RTOS hartid after halting
When I disappeared the polls everywhere I forgot to sanitize the hartid
after halting.  This is an invariant that GDB expects: when you return
from a halt whatever thread is marked as currently selected is the
thread that the next register accesses reference.
2017-06-15 12:16:33 -07:00
Palmer Dabbelt 099a3020d2 Clear abstract errors from register_read_direct 2017-06-15 12:16:24 -07:00
Tim Newsome 503da094e8 Accept 64-bit addresses in CRC requests. 2017-06-15 10:44:37 -07:00
Tim Newsome 64af052911 Fix the build.
Main change is to make riscv_addr_t be unsigned. The rest is mechanical
fixing of types, print statements, and a few signed/unsigned compares.

Smoketest indicates everything is working more or less as before.
2017-06-13 12:33:01 -07:00
Tim Newsome 845c2f6b69 Merge branch 'remotes/openocd/master' into riscv64
Merged 1025be363e

Conflicts:
	src/flash/nor/Makefile.am
	src/rtos/Makefile.am
	src/rtos/rtos.c
	src/target/Makefile.am
	src/target/target.c
	src/target/target_type.h

Doesn't build yet, but I fixed the conflicts that git pointed out.
2017-06-13 11:52:50 -07:00
Tim Newsome 6be600318c Fix dmi_read() indentation; remove \n in LOG_ERROR 2017-06-08 12:31:08 -07:00
Megan Wachs c3b344d1c0 riscv: Move the initialization of the field inside the structure for consistency 2017-06-07 21:06:33 -07:00
Megan Wachs 459b39ec67 riscv: v13 -- dmi_write must still check for the OP result 2017-06-07 21:06:33 -07:00
Tim Newsome 11008baee3 %p already includes 0x (on gcc) 2017-06-06 11:51:15 -07:00
Tim Newsome 83afb93004 Don't leave fd undefined.
When gcc isn't optimizing well, it might not realize that it's not
possible to return fd without initializing it, and then the build fails
due to -Werror.
2017-06-06 11:51:15 -07:00
Paul Fertser 1025be363e flash: nor: ath79: fix build failure due to recent MIPS changes
Change-Id: I7139b0658f048afea2d16216c93e8946356a630d
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4151
Tested-by: jenkins
Reviewed-by: Salvador Arroyo <sarroyofdez@yahoo.es>
2017-06-02 20:20:26 +01:00
Tobias Diedrich 6b9d19d367 flash: Add support for Atheros (ath79) SPI interface
Supported SoCs: AR71xx, AR724x, AR91xx, AR93xx, QCA9558

Extended and revised version of my original patch submitted by Dmytro
here: http://openocd.zylin.com/#/c/3390

This driver is using pure SPI mode, so the flash base address is not
used except some flash commands (e.g. "flash program") need it to
distinguish the banks.

Example config with all 3 chip selects:
flash bank flash0 ath79 0 0 0 0 $_TARGETNAME cs0
flash bank flash1 ath79 0x10000000 0 0 0 $_TARGETNAME cs1
flash bank flash2 ath79 0x20000000 0 0 0 $_TARGETNAME cs2

Example usage:
> flash probe flash0
Found flash device 'win w25q128fv' (ID 0x001840ef)
flash 'ath79' found at 0x00000000
> flash probe flash1
No SPI flash found
> flash probe flash2
No SPI flash found
> flash banks
> flash read_bank flash0 /tmp/test.bin 0x00000000 0x1000
reading 4096 bytes from flash @0x00000000
wrote 4096 bytes to file /tmp/test.bin from flash bank 0 at offset
0x00000000 in 28.688066s (0.139 KiB/s)

Change-Id: I5feb697722c07e83a9c1b361a9db7b06bc699aa8
Signed-off-by: Tobias Diedrich <ranma+openocd@tdiedrich.de>
Reviewed-on: http://openocd.zylin.com/3612
Tested-by: jenkins
Reviewed-by: Dmytro <dioptimizer@hotmail.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-05-31 08:18:29 +01:00
Grzegorz Kostka 83c67b7ac7 imx_gpio: add mmap based jtag interface for IMX processors
For some targets (like nrf51) sysfs driver is too slow. This
patch implements memory maped driver for IMX processors.
Mostly based on bcm2835gpio. Tested on imx6ul CPU. However, it should
work on any NXP IMX CPU.

Change-Id: Idace4c98181c6e9c64dd158bfa52631204b5c4a7
Signed-off-by: Grzegorz Kostka <kostka.grzegorz@gmail.com>
Reviewed-on: http://openocd.zylin.com/4106
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-05-31 08:16:17 +01:00
Palmer Dabbelt 51ab5a0c8b Return 5 (SIGBREAK) not 2 (SIGINT) after a step
GDB seems to just go off the rails if I return a SIGINT.
2017-05-25 18:31:58 -07:00
Palmer Dabbelt f0969e7c71 Pass EVENT_RESUMED in the RTOS
I missed this event.  It appears to do nothing.
2017-05-25 13:14:31 -07:00
Palmer Dabbelt ab77c5d792 Invalidate the register cache when rtos_hartid==-1
This means I don't know what hart to look at, so I might as well
invalidate the register cache.  Without this, you might get stale
registers the first time you ask for them.
2017-05-25 13:14:31 -07:00
Palmer Dabbelt faa6123e36 Invalidate the register cache on step, resume, reset
I thought OpenOCD did this, but it looks like that doesn't happen when
runningi in RTOS mode.  With this I can get to the end of most of the
RTOS tests, but they SIGINT instead of exiting.
2017-05-25 13:14:31 -07:00
Megan Wachs e12f5575ef riscv-v11: Don't perform unexpected operation in cache_write 2017-05-22 22:02:01 -07:00
Palmer Dabbelt c431c0eb25 Check for abstractcs.busy, not just CMDERR_BUSY
This fixes a race condition when reading/writing memory.
2017-05-15 17:40:28 -07:00
Palmer Dabbelt a8cf04b839 Go back to 32-word read/write buffers
The larger buffers are really slow on Spike.
2017-05-15 16:57:25 -07:00
Palmer Dabbelt e31761df64 Don't re-read registers after they're written
This was just a sanity check.
2017-05-15 16:57:08 -07:00
Palmer Dabbelt 9d308db2bc Print out the actual CSR that's read 2017-05-15 16:56:50 -07:00
Palmer Dabbelt 8252b9d36c Build fixes 2017-05-15 13:39:58 -07:00
Megan Wachs af6e04d5c0 riscv: Remove some compile warnings 2017-05-15 13:36:05 -07:00
Forest Crossman f6449a7cba jtag/drivers: Add Cypress KitProg driver
This patch adds a driver for the SWD-only Cypress KitProg
programmer/debugger.

Change-Id: I3a9a8011a762781d560ebb305597e782a4f9a8e5
Signed-off-by: Forest Crossman <cyrozap@gmail.com>
Reviewed-on: http://openocd.zylin.com/3221
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2017-05-12 10:08:43 +01:00
Palmer Dabbelt bcf2a16b0d Shim back in some old interfaces for now 2017-05-11 10:41:13 -07:00
Palmer Dabbelt 563f6acc3c Allow all harts to be reset 2017-05-09 13:33:20 -07:00
Juha Niskanen 753cf12700 stm32l4: support flashing L45x/46x devices
Also fixes incorrect comment about MSI range.

Change-Id: If1339a00e50db44195dfcd5c767ba3f5d9035451
Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com>
Reviewed-on: http://openocd.zylin.com/4122
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-05-08 18:07:41 +01:00
Salvador Arroyo f22b89d9fb mips32, use scan32 function for reading impcode/idcode.
There is no need to implement scan code in functions
mips_ejtag_get_idcode/impcode(), use mips_ejtag_drscan_32().
Impcode/idcode saved in ejtag.info.
Reorder the code in the callers of this functions.

Change-Id: Ia829c783a0b24c6a65cade736113fa6f67b0a170
Signed-off-by: Salvador Arroyo <salvador@telecable.es>
Reviewed-on: http://openocd.zylin.com/4003
Tested-by: jenkins
Reviewed-by: Peter Mamonov <pmamonov@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-05-08 18:05:58 +01:00
Salvador Arroyo b702b16dc2 mips32: add micromips breakpoints support
Breakpoint setting based on length (kind) only.
Added 16bit aligned 32bit software breakpoints
support and same filtering before setting
breakpoint.
Set the required isa bit in hardware breakpoints.
Drop the isa bit in software breakpoints.

Change-Id: I7020f27be16015194b76f385d9b8e5af496d0dfc
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4124
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-05-08 18:05:26 +01:00
Salvador Arroyo 4831ce4433 mips32: add micromips isa handling
Read and save configuration registers, up to 4.
Config3 holds the micromips implementation info.
Added isa implementation info to mips32_common.
Added isa filter to avoid common mistakes, but only
if one isa mode is implemented.
When resuming the isa requested is set if more than
one isa mode is implemented.

Change-Id: I1d6526c5525bffac8d75e031b842b2edc6310e28
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4123
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-05-08 18:04:56 +01:00
Salvador Arroyo f5151b6d46 mips32, convert miniprograms with code definition
Needed to run in micromips mode. Seems that if an isa
is supported in debug mode it also supported in kernel
mode. The contrary is not true.

Change-Id: I1feb8e2c376f4db97089f05c20bc0cd177208fb3
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4033
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-05-08 18:03:58 +01:00
Salvador Arroyo 2279c23cde mips32, add support for micromips in debug mode
Micromips is 16bit oriented, branch and jumps are
16 bit based. The upper half 16bits of a 32bit instruction
with the major opcode, must go first in the instruction
stream, hence the SWAP16 macro and swap16 array function,
needed if the code is written as 32 bit word in little endian
cores. Endianess info added to ejtag_iinfo. Pointer to
ejtag_info and isa field added to pracc context.
MIPS32 code are renamed to MIPS32_ISA_...
To select the isa, the new code has an additional isa parameter
(1 for micromips, 0 for mips32).
In JR instruction the isa bit must be set to execute
micromips code.
The suffix u is added to the OP codes to avoid signed/unsigned
comparison errors and to make sure the right shift is
performed logically.
The isa in debug mode is updated in the poll function.
Code for miniprograms, in kernel mode, need to be converted.
CFI code only for mips32.

Change-Id: I79a8b637d49b0e2d92b6dd5eb5aa8aa0520bf938
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4032
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-05-08 18:03:28 +01:00
Salvador Arroyo 6012a87d44 mips32, add microMips instruction subset
Only reencoded MIPS32 instructions. Added some instructions
for crc code. Micromips isa in debug mode is only needed for
pic32mm cores. Pic32mz seems that only works with MIPS32
isa when in debug mode.

Change-Id: I07059e153a7000ea9204f20b6b37edf6a7623455
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4022
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-05-08 18:00:46 +01:00
Salvador Arroyo e320588117 mips32, add option to avoid check in last instruction
This option is needed, for example, when exiting
debug mode in bmips targets. The last instruction
is a NOP, not a DERET. When working in async mode
this check is not done, mips32_pracc_queue_exec() pass
the parameter to mips32_pracc_exec() and never use it.

Change-Id: I4c7ed4feb1588b62e2645b955b501b6671113b36
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4021
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-05-08 18:00:09 +01:00
Salvador Arroyo 1392c27cf9 mips32, add realloc code
If max_code is reached realloc memory. If fails to realloc
the error is propagated and every call to pracc_add() returns
immediately. The exec function logs the error.

Change-Id: Idd4ed9d9b8b19b7d6842d0bc5ebb05f943726705
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4020
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-05-08 17:59:15 +01:00
Salvador Arroyo c8b31aaa15 mips32, change in pracc_list for dynamic allocation
pracc_list points to an array with code in the lower half
and addr in the upper half. Change it to a struct with
an instruction field and an address field.
Requiered to make reallocation easier.
As a side effect the code is less quirky.

Change-Id: Ibf904a33a2f35a7f69284d2a2114f4b4ae79219f
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4019
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-05-08 17:57:30 +01:00
Megan Wachs fa8d7adf33 Avoid accessing null target->reg_cache
GDB might request registers even if target was not successfully initialized.
2017-05-05 11:05:28 -07:00
Matthias Welwarsky 3414daed26 Fix compile failure on MacOSX
MacOSX tool chain defines __unused in "sys/cdefs.h", causing a collision.
Remove the local define to avoid polluting the compilers internal 
symbol namespace.

Change-Id: I16370c4518e6aeec482dd689e7db80628f846ee3
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4118
Reviewed-by: Steven Stallion <sstallion@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
2017-05-02 16:43:20 +01:00
Megan Wachs 95a2eb157a riscv-013: more consistent parens 2017-05-01 09:42:11 -07:00
Megan Wachs 458bb20699 riscv-013: Correct sign extension of address on read_memory for lower bits as well 2017-05-01 09:39:59 -07:00
Megan Wachs 8462750357 riscv-013: Correct sign extension of address on read_memory 2017-05-01 09:37:48 -07:00
Megan Wachs ad1cf13ef4 Correct debugging print in read_memory 2017-05-01 08:35:10 -07:00
Palmer Dabbelt 16de5044d4 Fix an assertion when reading from 0 2017-05-01 08:33:01 -07:00
Palmer Dabbelt ba3a56937b Correct previous hart caching logic 2017-05-01 08:32:43 -07:00
Palmer Dabbelt 1ec607c726 Clean up unused read_memory code 2017-04-27 12:56:01 -07:00
Palmer Dabbelt 4116b97d6e Correct an off-by-one in argument parsing 2017-04-26 15:17:11 -07:00
Palmer Dabbelt 17d04aded3 Keep calling the old poll on v0.11 targets
This is another thing that should be fixed correctly.  Essentially this
just uses the old codepath, which works for v0.11.
2017-04-26 15:16:39 -07:00
Palmer Dabbelt 9d4df3420c Initialize all registers in examine
I'm not sure why this is necessary, but for some reason GDB is asking
for registers before OpenOCD thinks there's been a halt.  This is really
just a workaround, but I need to refactor the v0.11 stuff anyway so I
don't want to figure it out.
2017-04-26 15:09:24 -07:00
Megan Wachs da66be0161 riscv: Fix some blocking compile warnings 2017-04-26 10:23:53 -07:00
Megan Wachs 1ab5d7b497 fespi: Allow the ctrl_base address specified as a parameter 2017-04-26 09:10:49 -07:00
Palmer Dabbelt 8dea2908b7 Add 64-bit and multihart support
This is a major rewrite of the RISC-V v0.13 OpenOCD port.  This
shouldn't have any meaningful effect on the v0.11 support, but it does
add generic versions of many functions that will allow me to later
refactor the v0.11 support so it's easier to maintain both ports.  This
started as an emergency feature branch and went on for a long time, so
it's all been squashed down into one commit so there isn't a big set of
broken commits lying around.  The changes are:

 * You can pass "-rtos riscv" to the target in OpenOCD's configuration
   file, which enables multi-hart mode.  This uses OpenOCD's RTOS
   support to control all the harts from the debug module using commands
   like "info threads" in GDB.  This support is still expermental.

 * There is support for RV64I, but due to OpenOCD limitations we only
   support 32-bit physical addresses.  I hope to remedy this by rebasing
   onto the latest OpenOCD release, which I've heard should fix this.

 * This matches the latest draft version of the RISC-V debug spec, as of
   April 26th.  This version fixes a number of spec bugs and should be
   close to the final debug spec.
2017-04-26 09:10:49 -07:00
Salvador Arroyo cb317eabf2 mips32, write handler code in a more compact way
Less code and probably cleaner.
Don't check if it is ever ERROR_OK.

Change-Id: I1045b58fd4542ec24430332f49679364ae97b1dc
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4018
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-25 17:03:20 +01:00
Salvador Arroyo bff6205bab mips32, implement assembler li instruction
Implement it as a function, the code was already in. Added optimize
option.

Change-Id: Ib9ad3f00d6c4f0b91c4e4960a50ec8d102f4e333
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4017
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-25 17:02:14 +01:00
Salvador Arroyo 9bdc3bf0a8 mips32, in wait_for_pracc_rw() use ejtag_info->pa_ctrl
Makes code shorter
In fasdata transfer fuction declare variables locally.
Avoid cast.

Change-Id: I0367b66339560fc20521a0598488e7ff9076808e
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4011
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-25 17:00:52 +01:00
Salvador Arroyo 5fdcbbdb25 mips32, mips32_pracc_finish() queued only
In most of the cases there is no need to request execution,
the check for a new pracc access already does it.
Requesting execution if not needed makes execution slower and
code larger due the additional checks.
Reduce code in fasdata transfer function.
Call for execution when exiting debug.

Change-Id: I3b45f6d1f62da5fad3e3db84f82a9299b16e1bd9
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4010
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-25 16:59:44 +01:00
Salvador Arroyo 09ebc1afad mips32, drop unnecessary code in mips32_pracc.c
Struct mips32_pracc_context no more in use.
In current code cp0 reg/sel do not requires special handling.
In sync mode ctx.store_count not used, drop check.
In fasdata transfer function use mips32_pracc_read_ctrl_addr()
to reduce code.

Change-Id: Ibd4cfa5a44ebc106ed0db042f4e54a2e0b3d43cb
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4007
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-25 16:58:47 +01:00
Salvador Arroyo 7ccd53bdde mips32, homogenize code in the scan functions
Change-Id: I32fed3332857737048dd12da94fcaba140acb726
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4006
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-25 16:58:00 +01:00
Marc Schink 3421b89c98 server/telnet: Remove exit() call
Change-Id: I8ce99d7d62dfe3cad63cf6bc68f2faf2234e395c
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3224
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-25 16:56:49 +01:00
Marc Schink b43b95e460 server/server: Remove all exit() calls
With this patch OpenOCD shuts down properly when errors occur in the
server instead of just calling exit().

Change-Id: I2ae1a6153dafc88667951cab9152941cb487be85
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3223
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2017-04-25 16:56:35 +01:00
Juha Niskanen 99db18a995 stm32l4: support flashing L496 devices
Change-Id: I3effc5b675c853433170391c5eaf46edc067b6e7
Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com>
Reviewed-on: http://openocd.zylin.com/4108
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-25 07:55:43 +01:00
Salvador Arroyo d81fc78d9b mips32, add generic scan 32 function
Will be used later, allow queuing all needed scans in a pracc
access. This makes faster execution with ftdi based adapters
working in sync with pracc.
Added now because the overall code is shorter.

Change-Id: Ib32b89307b75785f88870db8d7c9255dc5bbd426
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4005
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-24 23:07:29 +01:00
Salvador Arroyo 832f5974f2 mips32, pic32 use uint8_t in 8 bit scan function
Makes code shorter.

Change-Id: I6cc01adffbea063ccb071ddf3a3e3d81727b29ce
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4004
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-24 23:06:54 +01:00
Byron Kubert e683ff2ac7 Added 512K flashing support for em3587
The Silicon Labs EM3587 and EM3588 may have 512K of flash.
This fix allows for 512K to be specifiied on the command line
when flashing a device.

Change-Id: I18cc4bd0d14e1f2069066734a7396bcccf3de941
Signed-off-by: Byron Kubert <byronk@google.com>
Reviewed-on: http://openocd.zylin.com/3795
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-24 22:32:24 +01:00
Hellosun Wu 8f3d16f4ae libusb: Add transfer type filter to get correct ep
The need for this due to AICE having 3 interfaces
(EP1 IN-Interrupt, EP2 OUT-Bulk, EP6 IN-Bulk).
Without it, the function will choose first two endpoint as
read_ep/write_ep. This filter will check transfer types
when get endpoint-id. Without this patch, AICE will not
get correct endpoint.

Change-Id: I4da93c7de41cd19e5095b4bfb42078b21f40b678
Signed-off-by: Hellosun Wu <wujiheng.tw@gmail.com>
Reviewed-on: http://openocd.zylin.com/3218
Tested-by: jenkins
Reviewed-by: Hsiangkai Wang <hsiangkai@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-24 22:31:41 +01:00
Marc Schink 45f0e6d062 flash/nor/tcl: Make verify_bank parameter optional
Make the 'offset' parameter optional, if omitted simply start at the
beginning of the flash bank.

Additionally, check if the argument is out of bounds of the flash bank.

Change-Id: Id1959eee5c395666c35f26342c3c50134dd564e5
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3858
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2017-04-24 22:15:14 +01:00
Marc Schink 790a7b2a8d flash/nor/tcl: Fix some format specifiers
Change-Id: I2255aede9713cb7ef538d7433dd900d8da7a51ad
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3857
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-24 22:10:19 +01:00
CezaryGapinski e916bcda64 stm32lx: fix dual-bank configuration for Cat.5 and Cat.6 devices
Default values for .first_bank_size_kb and .has_dual_banks fields
described in stm32lx_parts[] do not fully describe
the real device memory layouts.

Basing on:
STM32L0x1 RM0377
STM32L0x2 RM0376
STM32L0x3 RM0367
STM32Lxxxx RM0038

correct values for memory layouts were selected:
id = 0x447 STM32L0xx (Cat.5) <- dual bank flash
for size 192 or 128 KBytes, single bank for 64 KBytes
id = 0x436 STM32L1xx (Cat.4 / Cat.3 - Medium + /
High Density) <- only one size of the bank,
default values are correct
id = 0x437 STM32L1xx (Cat.5 / Cat.6) <- always dual bank,
but size of the bank can be different

For that reason .part_info field in struct stm32lx_flash_bank
is a dynamic field with fields copied from stm32lx_parts[]
and overwriten to correct values
for specific chips and memory sizes.

Change-Id: If638cb0a9916097bfd4eda77d64feaf1ef2d2147
Signed-off-by: Cezary Gapiński <cezary.gapinski@gmail.com>
Reviewed-on: http://openocd.zylin.com/4074
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2017-04-24 21:56:53 +01:00
Armin van der Togt ca9dcc86d7 Fix flash writing on stm32l0
Fix "couldn't use loader, falling back to page memory writes" error on
stm32l0 which was caused by the use of cortex-m3 instructions in the
flash loader code. The loader is rewritten using cortex-m0 compatible
instructions

Signed-off-by: Armin van der Togt <armin@otheruse.nl>
Change-Id: If23027b8e09f74e45129e1f8452a04bb994c424e
Reviewed-on: http://openocd.zylin.com/4036
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-24 07:03:59 +01:00
Tomas Vanek 2e0e6c5634 flash/nor/at91samd: fix chip erase of a secured device
'at91samd chip-erase' command did not work on secured device.

Fix it changing address of DSU.CTRL register
(see Atmel SAM D21 datasheet, 13.9. Intellectual Property Protection).

While on it check error return of DSU.CTRL write.

Change-Id: I83155a634a5458cdc0cc16c99c0e155eb1d8b3d6
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reported-by: Thomas Irmen <tirmen@gmx.net>
Reviewed-on: http://openocd.zylin.com/4043
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-24 06:31:37 +01:00
Tomas Vanek 44ad4fdcb0 jtag/drivers cmsis-dap: do not limit speed so strictly
Adapter clock frequency is set by 32-bit number and most adapters
limit the highest speed safely. There is no reason to impose strict
limit of 5000 kHz if some adapters can do more.

While on it give informative error message in case of zero adapter_khz.

Change-Id: I45c9804678e24496ea769ea9ca6036701b04dde9
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3945
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-24 06:28:28 +01:00
Jerome Lambourg 73a9464960 Add support for the ATMEL SAM G55 Xplained Pro board and CPU.
Change-Id: Iffe59dcf9f2cb1f5949c37d11fe0d2141a47f8da
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3922
Tested-by: jenkins
Reviewed-by: Leo Zhang <liang.zhang@microchip.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-24 06:25:13 +01:00
Girts 8addd9503e help/log.c: better error handling for "log_output"
* Close previous log file if one was opened before.
* Return error if opening file fails.

Change-Id: I103025cd86bcac785fe39e13bc7d5f79d78e38e7
Signed-off-by: Girts Folkmanis <opensource@girts.me>
Reviewed-on: http://openocd.zylin.com/3878
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-23 22:38:42 +01:00
Girts b90d58db07 helper/options.c: fail if unexpected cmdline arguments are present
Previously openocd would silently ignore any incorrect arguments.

Change-Id: Ibb40b57b8a9e07d191215486f3b3c4920a9963c7
Signed-off-by: Girts Folkmanis <opensource@girts.me>
Reviewed-on: http://openocd.zylin.com/3879
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2017-04-23 21:38:41 +01:00
Girts f63af76466 help/options.c: add error handling for -d arg
Fail if we fail to set debug level. Also, clarify in usage string that
-d<n> doesn't accept spaces.

Change-Id: I9ea9945dc068e3e7cfd18b16ffa2a29366d6e4d1
Signed-off-by: Girts Folkmanis <opensource@girts.me>
Reviewed-on: http://openocd.zylin.com/3880
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2017-04-23 21:37:59 +01:00
Damyan Mitev 7829f31a6d nrf51: Add new HWID 0x008F
Add new entry in nrf51_known_devices_table for nRF51822 chip found on
chinese Core51822 dev board. The chp has markings N51822 / QFAAH1 / 1630FW
Nordic Semiconductor nRF51 Series Compatibility matrix confirms that this chip
has 256K Flash and 16K RAM.

Change-Id: I571d15913c6f6e02a6f09c883d7dfc5a66b57c28
Signed-off-by: Damyan Mitev <damyan_mitev@mail.bg>
Reviewed-on: http://openocd.zylin.com/4091
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-23 21:33:05 +01:00
Tomas Vanek 34eb2933d4 jtag/drivers cmsis-dap: fix speed setting on Atmel EDBG
Without the change Atmel EDBG uses default clock freq about 168 kHz
instead adapter_khz configured before interface init.
Changing adapter speed after init works as expected.

Testing shows the EDBG firmware resets speed to default during DAP_SWJ_Sequence.
Tested with fw versions 03.1F.01AE and 02.09.0169

This change repeats the DAP_SWJ_Clock command after sending a SWJ sequence.

Change-Id: Ic70457c5df635f47cad5e70b0dc83a083ea1b3a3
Reported-by: Ladislav Laska <laska@kam.mff.cuni.cz>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3944
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-23 21:11:09 +01:00
Joakim Nohlgård 668347e824 flash Kinetis: reduce a flash write message severity to info
There is nothing the user can do if their device does not support sector
programming, there is no reason to have this message at warning level.

Change-Id: Ic9b7386e59b64fece7fbfdc543bdfeeed3eae73d
Signed-off-by: Joakim Nohlgård <joakim.nohlgard@eistec.se>
Reviewed-on: http://openocd.zylin.com/4105
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2017-04-23 20:49:22 +01:00
Marc Schink 518fcd3883 target: Fix memory leak
Change-Id: Ib23dfd653d8edacb890a46179e9d437c027d58e8
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4048
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Chengyu Zheng <chengyu.zheng@polimi.it>
Reviewed-by: Andreas Färber <afaerber@suse.de>
2017-04-23 20:48:45 +01:00
Austin Morton 568e84236b stlink: increase trace buffer size to maximum allowed on st-link v2 firmware
Increasing the trace buffer size on the st-link itself gives openocd a greater
chance of avoiding trace data overflowing within the st-link between polls
when there is a large amount of data being sent over the trace port

The st-link appears to split the given buffer size in half
while one half is awaiting transfer over USB, the other half is being
filled by DMA transfer.  If you do not poll frequently enough, the DMA
transfer will overflow back to the start of its current buffer, resulting in
corrupted output

Buffer size of 4096 bytes is the maximum allowed by the st-link v2

Change-Id: I169189b021c34f8d18de1601d78b8c5890367d68
Signed-off-by: Austin Morton <austinpmorton@gmail.com>
Reviewed-on: http://openocd.zylin.com/4085
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-23 20:46:32 +01:00
Megan Wachs 3dc066382b Properly consider 'reset halt' and do halt or resume as needed 2017-04-10 12:03:15 -07:00