This combination is known to work properly with 2MHz JTAG clock.
Change-Id: Ie5ec3d3b415efbb13faee7d34e0c7f862b78350c
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2266
Tested-by: jenkins
Without this SheevaPlug debugging interface can't be matched.
Change-Id: Ifca149130d03c1aa165ed1123e8540e49485f023
Reported-by: Andreas Schneider <schneider.andi@gmail.com>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2265
Tested-by: jenkins
Since now auto-detection for flash size works nicely, there's no
reason to keep numerous configs around.
Change-Id: If0cbc37985abf17ef7c1f7d0688e76500fac228f
Signed-off-by: Vanya Sergeev <vsergeev@gmail.com>
Reviewed-on: http://openocd.zylin.com/1960
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This adds config to allow JTAG debugging of an ARM core of a modern
hybrid SoC by Research Centre "Module"
(http://www.module.ru/en/company/). К1879ХБ1Я is targetted at set-top
boxes and other multimedia equipment, the official SDK is Linux-based.
Change-Id: Ib2ae5784d25699f952682e66b025a3f677a76d5d
Signed-off-by: Бурага Александр <dtp-avb@yandex.ru>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2272
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
According to the research by Eldar, TINY-H adapter has nTRST connected
to ACBUS0 directly via a 100 Ohms series resistor. I think it's safe
to assume the older TINY adapter does the same.
See high-res photos at [1].
This patch should fix issues with JTAG for the case when nTRST is
actually connected but is missing from the config.
[1] https://wikidevi.com/wiki/Olimex_ARM-USB-TINY-H
Change-Id: Iaaee7be30536ebb502802d38b82cd9573408f854
Reported-by: Хайруллин Эльдар <eldar.khayrullin@mail.ru>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2247
Tested-by: jenkins
Reviewed-by: demokmail <demokmail@gmail.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
This is for mx6q TO1.1.
Change-Id: Id6af2ed232fc19be9bf49eb6d2df0004c6668698
Reported-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2253
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
When you source a JTAG-SWD converter config, any other transport
doesn't make any sense, so just autoselect it right there.
Change-Id: I6c098740905a0d4007473fc19cc07e11cbcc9369
Suggested-by: Хайруллин Эльдар <eldar.khayrullin@mail.ru>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2248
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Eldar Khayrullin <eldar.khayrullin@mail.ru>
According to Nordic Semiconductor Product Anomaly Notice (document
NRF51822-PAN), item 16, some revisions of nRF51822 sometimes reset
without all RAM blocks enabled. This was noted on NRF51822-QFAA rev
CA/C0, only 8KiB of memory was accessible.
This patch turns on all RAM following a debugger induced reset
(matches specified behaviour.)
Change-Id: I4f8be4ec3d1271da7fe5bc9a084fdcb2968535bb
Signed-off-by: Angus Gratton <gus@projectgus.com>
Reviewed-on: http://openocd.zylin.com/2202
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
This should allow to share common configs for both regular access and
high-level adapters.
Use the newly-added functionality in stlink and icdi drivers, amend
the configs accordingly.
Runtime-tested with a TI tm4c123g board.
Change-Id: Ibb88266a4ca25f06f6c073e916c963f017447bad
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
[gus@projectgus.com: context-specific deprecation warnings]
Signed-off-by: Angus Gratton <gus@projectgus.com>
[andrew.smirnov@gmail.com: additional nrf51.cfg mods]
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Tested-by: Andrey Skvortsov <andrej.skvortzov@gmail.com>
Reviewed-on: http://openocd.zylin.com/1664
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
The Atmel SAMR21 is a Atmel SAMD21 with an Atmel RF233 in one package (two
dies). Tested with the SAMR21 Xplained Pro eval kit.
Change-Id: I1d79ea05834b925d7ec810527206fe86854e684b
Signed-off-by: Thomas Schmid <thomas@rfranging.com>
Reviewed-on: http://openocd.zylin.com/2194
Tested-by: jenkins
Reviewed-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Resistor hack is runtime-tested, other configs are based on
schematics.
Change-Id: I8daffa0434cd41d142fbec7c230a302284f7aa31
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2184
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Use a special signal instead of a dedicated swd mask. Amend
jtag-lock-pick_tiny_2 config accordingly.
Change-Id: Ifb007a0b5434b590c52f936efd5f5458e913e2e4
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2183
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
I looked through all the target configs after stripping comments and
such from them with sed to see what jtag-specific commands can appear
first, and it looks like all the meaningful combinations should be
covered.
Change-Id: I8d543407b7f4ac8aca7354ecd50e841c8a04d5f3
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2179
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
SAM4L requires additional steps to be taken right after SYSRESETREQ is
issued in order to function robustly:
- CMSIS-DAP DAP driver needs to explicitly check for sticky bit
errors since it is possible for adapter to perform successful
write opration, report no errors and then, under the hood, do
some other things that will result in sticky bit being set.
- Debugger needs to wait for security system to finish
intialization and assert CDBGPWRUPACK before proceeding
This change is related to commit http://openocd.zylin.com/#/c/1995/
Change-Id: I741c95a809bfd60d930cec9482239e4796a62326
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Reviewed-on: http://openocd.zylin.com/2088
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Andrey Yurovsky <yurovsky@gmail.com>
fm3 flash driver needs to know which chip variant is used.
This fixes "unknown fm3 variant: mb9bf500.cpu" error if the config is
used as is.
Change-Id: I500fcfb413f23ee246678cec5bd19d14139a28e2
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2160
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This isn't needed nor a recommended practice now, was a simple
copy/paste from amdm37x.cfg anyhow.
Change-Id: I064226dc859d7563cfad945b577279fc37448645
Signed-off-by: Tom Rini <trini@ti.com>
Reviewed-on: http://openocd.zylin.com/2068
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Maximum frequency wasn't tested on hardware but the docs seem to be
quite explicit and do not mention any restrictions for that.
Change-Id: Idcf58df5358d06525e683f07c76eedad8f0b292d
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2120
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
This patch adds Micrel's KS869x target. The configuration was taken from
http://www.mmnt.net/db/0/0/www.micrel.com/ethernet/8695 - Micrel's
FTP server i.e. their OpenOCD 7.0 package.
The only change compared to the original file is the removal of
reset configuration, as it belongs to the board configuration.
Change-Id: Ic8509aa5fe5ce3166a3129e1c055280a3b2b9312
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Reviewed-on: http://openocd.zylin.com/2125
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Old version of the code had several problems, among them are:
* Located in a generic ADI source file instead of some Kinetis
specific location
* Incorrect MCU detection code that would read generic ARM ID
registers
* Presence of SRST line was mandatory
* There didn't seem to be any place where after SRST line assertion
it would be de-asserted.
* Reset was asserted after waiting for "Flash Controller Ready" bit
to be set, which contradicts official programming guide AN4835
* Mass erase algorithm implemented by that code was very strange:
** After mass erase was initiated instead of just polling for the
state of "Mass Erase Acknowledged" bit the code would repeatedly
initiate mass erase AND poll the state of the "Mass Erase
Acknowledged"
** Instead of just polling for the state of "Flash Mass Erase in
Progress"(bit 0 in Control register) to wait for the end of the
mass erase operation the code would: write 0 to Control
register, read out Status register ignoring the result and then
read Control register again and see if it is zero.
* dap_syssec_kinetis_mdmap assumed that previously selected(before
it was called) AP was 0.
This commit moves all of the code to kinetis flash driver and
introduces three new commands:
o "kinetis mdm check_security" -- the intent of that function is to be used as
'examine-end' hook for any Kinetis target that has that kind of
JTAG/SWD security mechanism.
o "kinetis mdm mass_erase"" -- This function removes secure status from
MCU be performing special version of flash mass erase.
o "kinetis mdm test_securing" -- Function that allows to test securing
fucntionality. All it does is erase the page with flash security settings thus
making MCU 'secured'.
New version of the code implements the algorithms specified in AN4835
"Production Flash Programming Best Practices for Kinetis K-
and L-series MCUs", specifically sections 4.1.1 and 4.2.1.
It also adds KL26 MCU to the list of devices for which this security
check is performed. Implementing that algorithm also allowed to simplify
mass command in kinetis driver, since we no longer need to write security
bytes. The result that the old version of mass erase code can now be
acheived using 'kinetis mdm mass_erase'
Tested on accidentally locked FRDM-KL26Z with KL26 Kinetis MCU.
Change-Id: Ic085195edfd963dda9d3d4d8acd1e40cc366b16b
Signed-off-by: Andrey Smrinov <andrew.smirnov@gmail.com>
Reviewed-on: http://openocd.zylin.com/2034
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Add configuration file for General Plus GP326XXXA series. Tested on
GP326833A on GPC-1737B board.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Change-Id: I1ad0e22598b01317bbc823870a7a262e9192c595
Reviewed-on: http://openocd.zylin.com/2058
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The Gumstix AeroCore board [1] contains a STM32F427 microcontroller.
Schematics for this board will also be made available [2].
The JTAG interface for this chip can be accessed via a USB connection
provided by an FTDI chip (0403:6011).
[1] https://store.gumstix.com/index.php/products/585/
[2] https://pubs.gumstix.com/boards/AEROCORE
Change-Id: I0bf3bb525f51528bedd807b1f7210b09ef2e1015
Signed-off-by: Ash Charles <ashcharles@gmail.com>
Reviewed-on: http://openocd.zylin.com/2117
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The TI TMS470 and TMS570 series of processors are BE-32 processors,
despite BE-32 not being supported by ARM in the Cortex-R4 core. TI
hacked in BE-32 support, which requires odd swizzling in OpenOCD to
make memory reads and writes function correctly. In particular,
without this change, OpenOCD word reads and writes had the bytes
reversed, and halfword and byte packed reads were reading garbage.
In my testing, this change fixes these problems.
Change-Id: I21dd30f4b9003f20fcc85f674ab833407bb61f74
Signed-off-by: Seth LaForge <sethml@google.com>
Reviewed-on: http://openocd.zylin.com/2064
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Also add the board to the firmware recovery script.
Change-Id: I4f9c895dae171df7249e3b1c0563b288518b9fe0
Signed-off-by: Lee Bowyer <lee@sodnpoo.com>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2097
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
SoftDevice stack ihex binary, provided by Nordic expects being able to
write data necessary for its correct operation at the adresses inside UICR.
This patch exposes UICR region of flash as a second bank on the MCU to
facilitate that.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Change-Id: Idbc140b8de027f60655f78043877b7c054eb06f9
Reviewed-on: http://openocd.zylin.com/2013
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
This patch allows users to specify TAP_TYPE from
the command line when using or1k_generic.cfg.
Change-Id: I9f4b7d8e4867658fa34bb4e92fc3a5f25227df11
Signed-off-by: Franck Jullien <franck.jullien@gmail.com>
Reviewed-on: http://openocd.zylin.com/2056
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
This adds support for the am43xx SoC and the AM437x GP EVM and AM438x
ePOS EVM.
Change-Id: I09cbb09072f38e0e08fdd520dedb6e67d45056be
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
Reviewed-on: http://openocd.zylin.com/2047
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
instead of replicating icepick_d_tapenable in many of TI's newer
platforms, we can move to icepick.cfg and just call it from board TCL
configuration file. This is similar to the C but has a few changes we
need to make.
Change-Id: I0ab48005ccd66cd5b67b919fb5e3b462288f211d
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
Reviewed-on: http://openocd.zylin.com/2030
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Tested on ZedBoard by Tim Sander.
Change-Id: I4316d9b4d36f01bbe91a46c78ea8bca22efb1a5a
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2029
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
From testing this target does not seem to support using SYSRESETREQ, change
the default to the safe VECTRESET.
This target also has other reset issues (srst not working) that will be
addressed in another patch.
Change-Id: Icfc78347dc71aa3a062ddea63190a818d7fbc760
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1995
Tested-by: jenkins
Reviewed-by: Angus Gratton <gus@projectgus.com>
Atmel's SAM3 and SAM4 processor families are very close to each other
in many respects. However, so far, only the SAM4 target script
contained the magic to allow using SWD, while SAM3 was tied to JTAG
only. This e.g. prevented the CMSIS-DAP driver from accessing SAM3
devices as it only uses SWD transport (by now).
The patch pulls all the things from the SAM4 target script that are
also applicable to SAM3 devices. With the patch, an Atmel CMSIS-DAP
debugger (Atmel-ICE) was proven to be able to successfully attach to a
SAM3S-EK evaluation kit. I also cross-checked that accessing through
a SAM-ICE (Segger J-Link) still works with the patch.
Change-Id: I20dafbff8e1e9f967da950e48a56205586eeef8d
Signed-off-by: Jörg Wunsch <openocd@uriah.heep.sax.de>
Reviewed-on: http://openocd.zylin.com/2046
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reported and tested by Gracana on IRC.
Change-Id: If0524d2d627d566e8b5e1d00784dd7556f44b125
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2036
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
The new version of STLink (V2-1) has a different USB endpoint layout.
As the PID of the device also changed it's possible to change EPs used
by OpenOCD in runtime. The patch adds three new fields to stlink_usb_handle_s
and assigns right EP numbers in stlink_usb_open().
Parts of the code inspired by and used with consent of Jens Hoffmann.
Change-Id: I93b69fb889f15317e9bf864905f435905db39745
Signed-off-by: Bartosz Bielawski <bartosz.bielawski@gmail.com>
Reviewed-on: http://openocd.zylin.com/2019
Tested-by: jenkins
Reviewed-by: Nemui Trinomius <nemuisan_kawausogasuki@live.jp>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Add support for Broadcom's dual A9 mobile SoC and its reference board.
Change-Id: Ia145b120043bddc89c44726066023154ae390788
Signed-off-by: Tim Kryger <tim.kryger@linaro.org>
Reviewed-on: http://openocd.zylin.com/1926
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
The XDS100v2 is often embedded in a number of platforms using the
VID/PID of 0x0403/0x6010 and a generic FTDI device description. Add
this VID/PID combination and remove the description line.
Change-Id: I370e6199ac24f802426e9541e19ee38f18f1209a
Signed-off-by: Tom Rini <trini@ti.com>
Reviewed-on: http://openocd.zylin.com/2016
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
flash: at91sam4: add support for the SAMG53 family (this also covers the
SAMG51). The SAMG5x parts have an EEFC (enhanced embedded flash controller)
which seems to be identical to the EFC that the sam4 driver supports.
Add a script for the Xplained Pro G53 board, this has the onboard CMSIS-DAP
debugger and a SAMG53N19. Tested on this board and chip combination.
Change-Id: I12af50402cd2069b3c7380d92e6fe54816d6c045
Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-on: http://openocd.zylin.com/1974
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Intel Quark X10xx SoC debug support added
Lakemont version 1 (LMT1) is the x86 core in Quark X10xx SoC
Generic x86 32-bit code is in x86_32_common.c/h
Change-Id: If2bf77275cd0277a82558cd9895b4c66155cf368
Signed-off-by: adrian.burns@intel.com
Reviewed-on: http://openocd.zylin.com/1829
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
This adapter is special and needs a reset sequence to be performed
before operation. Since there're no suitable hooks to do that, we have
no choice but to ask the user to manually add the necessary commands
to his or her config file.
Change-Id: I48fb4276e77529768266840221b68c3ae26801e1
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1884
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
TUMPA Lite is a cheap FT232H-based breakout board, without any
buffering. It also lacks series resistors so for some targets
(especially when not using ridiculously short wires) one needs to add
about 47 Ohms in series on every high-speed line.
The SRST line is connected directly to the FT232H too.
Real-life tested (including SRST and TRST).
Change-Id: I5ed4f88d8d20384e9c52efe2ff0c290e2650d43e
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1918
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Originally the LPC17xx user guide (UM10360 Rev 2) stated that SYSRESETREQ
was not supported, so this was the default cortex_m reset mode.
Rev 3 of the same user guide states that it is now supported.
This has been verified on a LPC1768 mbed platform, previously I have not
tested this functionality.
Change-Id: I4858248903981a1c93ce75016e67c9e02702fcc5
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1892
Tested-by: jenkins
Reviewed-by: Jörg Fischer <turboj@gmx.de>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
This patchs adds a new access driver for the existing
USB-Blaster interface driver.
This interface (as it is build-in on the sockit development
board) is composed of a Cypress EZ-USB plus a CPLD.
The Cypress chip as an embedded 8051 microcontroller.
When it's powered up, the firmware is downloaded to the
chip then the device is disconnected and reconnected with
the new firmware.
The USB-Blaster II protocol is almost identicial to
the old one. The only difference is that you need to
send a 0x5F before read TDO back. This command
seems to copy TDO buffer datas to the endpoint buffer.
Driver will be auto enabled if libusb-1.0 is detected.
Change-Id: I562a720a68cb4dcabeab791947d5d38776cb70fa
Signed-off-by: Franck Jullien <franck.jullien@gmail.com>
Reviewed-on: http://openocd.zylin.com/1791
Tested-by: jenkins
Reviewed-by: Robert Jarzmik <robert.jarzmik@free.fr>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested with SAMD21J18A on the SAMD21 Xplained Pro board.
Change-Id: Ice9ebcd229ed038b3193baf92d910f9256d7ce91
Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-on: http://openocd.zylin.com/1873
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This adds a new NOR Flash driver, "at91samd", which supports the
built-in Flash on Atmel's D-series Cortex M MCUs, starting with the D20.
Parts and their geometry are detected automatically using the DSU and
lookup schemes described in the D20 document, 42129F–SAM–10/2013.
Future D-series variants and families should presumably use this
controller as well (possibly with minor changes and improvements).
Tested on the SAMD20 Xplained Pro board, for which we also add the
corresponding Flash configuration.
Change-Id: Id8d3dd601e9f53121682d1a1190d0be4ea3b83eb
Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-on: http://openocd.zylin.com/1684
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This adds a new NOR Flash driver, "at91sam4l", which supports the
built-in Flash on Atmel's low-power SAM4L family of Cortex M4 MCUs.
Parts and their geometry are detected automatically using the Chip ID
and lookup schemes described in document 42023E–SAM–07/2013.
Tested on AT91SAM4LC4CA via the SAM4L XPlained Pro development kit.
Change-Id: If73499dee92cc8ce231845244ea25c6984f6cecd
Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-on: http://openocd.zylin.com/1639
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
These kits feature a CMSIS-DAP compliant debugger and so have been added
as part of the pending support.
Currently the flash drivers for the L8 and D20 are wip.
One issue this implementation of CMSIS-DAP raised is that it supports
512byte HID reports, however using the current HIDAPI we have no cross platform
way of querying this info. Long term we plan to add this support to HIDAPI.
Change-Id: Ie8b7c871f58a099d963cd71a9f8a0105a38784e9
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1625
Tested-by: jenkins
This is based on work from:
https://github.com/TheShed/OpenOCD-CMSIS-DAP/tree/cmsis-dap
Main changes include moving over to using HIDAPI rather than libusb-1.0
and cleaning up to merge into master. Support for reset using srst has
also been added.
It has been tested on all the mbed boards as well as the Freedom board
from Freescale. These boards only implement SWD mode, however JTAG mode
has been tested with a Keil ULINK2 and a stm32 target - but requires a lot
more work.
Change-Id: I96d5ee1993bc9c0526219ab754c5aad3b55d812d
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-on: http://openocd.zylin.com/1542
Tested-by: jenkins
This adds a set of helper functions with the aim to make it possible
to flash mass-market devices without RTFMing altogether (i.e. to
obsolete GPL-violating proprietary tjtag and other similar software).
Real-life tested on an RT-N16 and WRT54GL.
Change-Id: I197a9b28a5f386803f081057c4b4ebf2f9c447b1
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1850
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested flashing a real v1.1 device.
Change-Id: Ie0d202b9fded8b92e731d93e0ef17be415a75fc8
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1852
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This adds the bcm47xx config with the special undocumented trick to
put it into standard EJTAG mode from the mystic "LV mode".
The RAM setup is not done as it would require considerable efforts
without much practical gain.
The only issue I noticed so far is that "reset" doesn't actually reset
the chip.
Unfortunately, it's unclear how to make it work properly with SRST as
OpenOCD asserts it in MIPS-specific code so the device will enter LV
mode again but the LV tap is already disabled by that time, so it's
not possible to send the magic command again.
Anyway, this config is more than enough to "recover" any RT-N16
provided the hardware is not damaged.
Change-Id: I0894e339763e6d20d1c93341c597382b479d039b
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1849
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
* openocd.berlios.de -> openocd.sourceforge.net
* Update link to AM/DM37x Technical Reference Manual (ver R)
* "ICEpick" is properly spelled "ICEPick" according to TI
Change-Id: Ie04458e82c97ef766ec03bd9b9f27edadf5d1cb2
Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
Reviewed-on: http://openocd.zylin.com/1856
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The set command was missing the $ prefix on the SJC_TAPID variable
and so would fail if SJC_TAPID was set
Change-Id: Ib9af58f5188bd8a2bc3f888309f203d624476c27
Signed-off-by: Alex Murray <alex.murray@cohdawireless.com>
Reviewed-on: http://openocd.zylin.com/1811
Tested-by: jenkins
Reviewed-by: Jens Bauer <jens@gpio.dk>
Reviewed-by: Vladimir Zapolskiy <vz@mleia.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Based on Nemuisan Tokusei's. Untested, but original config was reported
to work ok.
Change-Id: Ic991dce55bfca266880081fe2bbd9e6e263b0fc0
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1803
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
all other at91 cfg files already has this fix.
It also fix "No flash at address 0x...." error when JTAG chain consist of
more than one at91sam7sx cores during attempt to flash other than first mcu
in chain.
Change-Id: I7785d9103d0fc494b6a823e2c73f850373ffe112
Signed-off-by: Sergey A. Borshch <sb-sf@users.sourceforge.net>
Reviewed-on: http://openocd.zylin.com/1812
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
STM32F42xxx & STM32F43xxx series boudary scan TAP-ID are differ from
STM32F405xx/07xx & STM32F415xx/17xx.
And Section number was also fixed for RM0090 rev5.
Tested on a STM32F427IIT6 and STM32F429ZIT6.
Change-Id: Ie9c54c55b97b9c396ace752d94ea2ad916cc8479
Signed-off-by: Nemui Trinomius <nemuisan_kawausogasuki@live.jp>
Reviewed-on: http://openocd.zylin.com/1808
Tested-by: jenkins
Reviewed-by: Jens Bauer <jens@gpio.dk>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This is a Cortex-M1 controller targetting aviation appliances.
Contributed (and live-tested) by 8daemon.
Change-Id: I133d6122cf6492b51ddbdbd800c16ba121d51bf3
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1818
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Working against openmoko gta02 target, including TRST and SRST (the
stupid samsung chip fully resets under trst, so it's actually of
little use here).
Change-Id: I831124659fc12efbccef536f07d15509c2112f92
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1814
Tested-by: jenkins
Reviewed-by: Vladimir Zapolskiy <vz@mleia.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This add support to the Xilinx BSCAN_* virtual JTAG interface.
This is the Xilinx equivalent of the Altera sld_virtual_jtag interface,
it allows a user to connect to the debug unit through the main
FPGA JTAG connection.
Change-Id: Ia438e910650cff9cbc8f810b719fc1d5de5a8188
Signed-off-by: Sergio Chico <sergio.chico@gmail.com>
Reviewed-on: http://openocd.zylin.com/1806
Tested-by: jenkins
Reviewed-by: Franck Jullien <franck.jullien@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Add support for the TMS570 Cortex-R4 MCU from TI and their USB stick
development kit, TMDX570LS31USB. Tested attaching, reset/halt/run, and
reading and writing memory and registers.
Change-Id: I12d779cef0c2b834f9bcf722307f35677cc4bd8f
Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Reviewed-on: http://openocd.zylin.com/1788
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The schematics used for writing the config file were incorrect, real
hardware needs ACBUS3 _low_ as it's connected directly to the output
buffer's !OE pin.
Also apparently sometimes TUMPA comes with default FTDI IDs.
Real-life tested (including TRST and SRST) with a custom stm32f103
board, thanks to Mike Wang for the adapter sample.
Change-Id: Iab566e6d14f8392030f6ff2c8d976e1b57cf5ce6
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1789
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This is a tcl implementation of public domain tests by Michael Barr,
http://www.barrgroup.com/Embedded-Systems/How-To/Memory-Test-Suite-C
The initial porting is done by Shane Volpe and posted to the mailing
list:
http://www.mail-archive.com/openocd-development@lists.berlios.de/msg16676.html
This patch includes some cosmetic amendments plus hardcodes 32bit word
size (as the code depends on memread32/memwrite32 anyway) which fixes
original code's issue of testing only the first quarter of the
specified nBytes.
Change-Id: I5f3a66f1f16fc4082c7a5a6aba338430646ed21c
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1455
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
Some boards might have RCLK omitted from the JTAG connector and if the
interface claims support for it, OpenOCD will end up trying to use
RCLK while it's actually impossible.
This is a "cd tcl/target; sed -i s/jtag_rclk/adapter_khz/g *" patch.
Change-Id: Iee7337107bc1457966b104389ba9db75a9c860b4
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1695
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
Initial support for using the jtag interface to the Marvell Armada 370
family of SoCs.
Change-Id: Id823a567e8805ac622c3c330bc111297c1dae37e
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Reviewed-on: http://openocd.zylin.com/1690
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Almost the same as the LM4F120 LaunchPad but the chip is using the new
naming scheme (Tiva C series), supports USB OTG and has some new PWM
hardware blocks.
Change-Id: I6a7b2df76768766471f366cddaf64df3cc63f5f2
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1647
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Add support for OpenRISC target. This implementation
supports the adv_debug_sys debug unit core. The mohor
dbg_if is not supported. Support for mohor TAP core
and Altera Virtual JTAG core are also provided.
Change-Id: I3b1cfab1bbb28e497c4fca6ed1bd3a4362609b72
Signed-off-by: Franck Jullien <franck.jullien@gmail.com>
Reviewed-on: http://openocd.zylin.com/1547
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
This patch adds a driver for the jtag_vpi server [1]. This server is
now part of the ORPSoC version 3 (OpenRISC Reference Platform SoC).
The jtag_vpi server provides an interface between OpenOCD and a simulated
core.
[1] http://github.com/fjullien/jtag_vpi
Change-Id: I717b72cace4845f66c878581345074f99002e21a
Signed-off-by: Franck Jullien <franck.jullien@gmail.com>
Reviewed-on: http://openocd.zylin.com/1609
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The smallest available RAM size for this family is 2K, set this as the
default. Issue reported by quitte on IRC.
Change-Id: I3318f7f268f7681ffe2cddab61820f4b94c4e5fd
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1559
Tested-by: jenkins
Added new configuration file for gw16042 device.
Also added this to interface/ftdi examples in documentation.
Change-Id: I07bb10bfc79a5d13007288cd57f254d889075214
Signed-off-by: Pushpal Sidhu <psidhu@gateworks.com>
Reviewed-on: http://openocd.zylin.com/1563
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The end users on IRC report that actual USB device has different
information in its descriptor so it doesn't match. Remove it
altogether.
Change-Id: Id7841667390a514581e630e67b9283675803135b
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1548
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This commit adds two tcl configuration files, one for the Altera
Cyclone V SoC series, and one for the SoCkit development board.
The board configuration is able to halt and resume the cpu cores,
and dump register contents etc. It has not been fully tested, however.
Change-Id: Id3f18c3408975cf986a5f5aec410b5b13240c35e
Signed-off-by: Brad Riensche <brad.riensche@gmail.com>
Reviewed-on: http://openocd.zylin.com/1494
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This adds example config and flash driver for russian Cortex-M3
microcontroller model.
Run-time tested on MDR32F9Q2I evaluation board; the flash driver
should be compatible with MDR32F2x (Cortex-M0) too but I lack hardware
to test.
There're no status bits at all, the datasheets specifies some delays
for flash operations instead. All being in <100us range, they're hard
to violate with JTAG, I hope. There're also no flash identification
registers so the flash size and type has to be hardcoded into the
config.
The flashing is considerably complicated because the flash is split
into pages, and each page consists of 4 interleaved non-consecutive
"sectors" (on MDR32F9 only, MDR32F2 is single-sectored), so the
fastest way is to latch the page and sector address and then write
only the part that should go into the current page and current sector.
Performance testing results with adapter_khz 1000 and the chip running
on its default HSI 8MHz oscillator:
When working area is specified, a target helper algorithm is used:
wrote 131072 bytes from file testfile.bin in 3.698427s (34.609 KiB/s)
This can theoretically be sped up by ~1.4 times if the helper
algorithm is fed some kind of "loader instructions stream" to allow
sector-by-sector writing.
Pure JTAG implementation (when target memory area is not available)
flashes all the 128k memory in 49.5s.
Flashing "info" memory region is also implemented, but due to the
overlapping memory addresses (resulting in incorrect memory map
calculations for GDB) it can't be used at the same time, so OpenOCD
needs to be started this way: -c "set IMEMORY true" -f
target/mdr32f9q2i.cfg
It also can't be read/verified because it's not memory-mapped anywhere
ever, and OpenOCD NOR framework doesn't really allow to provide a
custom handler that would be used when verifying.
Change-Id: I80c0632da686d49856fdbf9e05d908846dd44316
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1532
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Austriancoder on IRC reports getting this ID on his board.
Change-Id: Ie859f0ee422e18fdb94bf817cdd2b41d15b968da
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1533
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Paul Fertser
Vanya Sergeev
Бурага Александр
Eldar Khayrullin
Andrey Smirnov
Angus Gratton
Andrey Skvortsov
Andreas Fritiofson
Fredrik Hederstierna
Thomas Schmid
Spencer Oliver
Franck Jullien
Tom Rini
Nemui Trinomius
Marco Cruz
Yegor Yefremov
Ash Charles
Seth LaForge
Lee Bowyer
Tim Sander
Felipe Balbi
Jens Hoffmann
Jörg Wunsch
Bartosz Bielawski
Tim Kryger
Andrey Yurovsky
Fatih Aşıcı
Adrian Burns
Robert P. J. Day
Alex Murray
Sergey A. Borshch
Sergio Chico
Greg Ungerer
Pushpal Sidhu
Brad Riensche
Sergey Alirzaev