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Author SHA1 Message Date
Marek Vasut d5b9c7998c CortexA8: Introduce Freescale i.MX51 variant 
This patch introduces support for Cortex A8 based Freescale i.MX51 CPU. This CPU
has the Debug Access Port located at a different address (0x60008000) than TI
OMAP3 series of CPUs.

i.MX51 configuration file based on OMAP3 configuration file and an email from
Alan Carvalho de Assis <acassis@gmail.com>.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
 2010-11-05 11:25:57 +01:00