Commit Graph

8 Commits (814c2a8f9a41a6445f131ee35474dced4bbed210)

Author SHA1 Message Date
David Brownell b559b273b5 rename jtag_nsrst_delay as adapter_nsrst_delay
Globally rename "jtag_nsrst_delay" as "adapter_nsrst_delay", and move it
out of the "jtag" command group ...  it needs to be used with non-JTAG
transports

Includes a migration aid (in jtag/startup.tcl) so that old user scripts
won't break.  That aid should Sunset in about a year.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-03-15 08:41:30 -07:00
David Brownell 3e6f9e8d1e target.cfg: remove "-work-area-virt 0"
The semantics of "-work-area-virt 0" (or phys) changed with
the patch to require specifying physical or virtrual work
area addresses.  Specifying zero was previously a NOP.  Now
it means that address zero is valid.

This patch addresses three related issues:

 - MMU-less processors should never specify work-area-virt;
   remove those specifications.  Such processors include
   ARM7TDMI, Cortex-M3, and ARM966.

 - MMU-equipped processors *can* specify work-area-virt...
   but zero won't be appropriate, except in mischievous
   contexts (which hide null pointer exceptions).

   Remove those specs from those processors too.  If any of
   those mappings is valid, someone will need to submit a
   patch adding it ... along with a comment saying what OS
   provides the mapping, and in which context.  Example,
   say "works with Linux 2.6.30+, in kernel mode".  (Note
   that ARM Linux doesn't map kernel memory to zero ...)

 - Clarify docs on that "-virt" and other work area stuff.

Seems to me work-area-virt is quite problematic; not every
operating system provides such static mappings; if they do,
they're not in every MMU context...

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-11-08 08:52:40 -08:00
David Brownell 6efaa95c44 make OMAP5912 resets more reliable
Without some extra delay after releasing SRST, we seemed to
be trying to talk to the TAP before it was ready to respond.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-10-07 23:29:18 -07:00
dbrownell c6b24fb4f0 Get rid of needless OMAP and Davinci target config options
so they provide better examples and are easier to maintain.


git-svn-id: svn://svn.berlios.de/openocd/trunk@2797 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-10-05 08:13:00 +00:00
dbrownell fbbd3066ff Don't provide invalid OMAP5912 IR capture value/mask attributes
git-svn-id: svn://svn.berlios.de/openocd/trunk@2762 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-27 07:59:10 +00:00
dbrownell 71af49ca7f Remove annoying end-of-line whitespace from tcl/* files
git-svn-id: svn://svn.berlios.de/openocd/trunk@2743 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-21 18:48:22 +00:00
zwelch 878d0cb043 David Brownell <david-b@pacbell.net>:
Split out OSK5912 board support from the omap5912 target config, and make
it pass sanity checks on my (Rev C/original) hardware:

 - Fix syntax error ("-irlen" not "irlen")
 - Provide real TAP ids for the ARM926ejs and the C55x dsp
 - Label both CPUs appropriately (DSP, ARM)
 - List both flash chips

The scan chain looks like this (note truncated DSP instruction code):

      TapName            | Enabled |   IdCode      Expected    IrLen IrCap  IrMask Instr
 ---|--------------------|---------|------------|------------|------|------|------|---------
  0 | omap5912.dsp       |    Y    | 0x03df1d81 | 0x03df1d81 | 0x26 | 0x00 | 0x00 | 0xffffffff
  1 | omap5912.arm       |    Y    | 0x0692602f | 0x0692602f | 0x04 | 0x01 | 0x00 | 0x0c
  2 | omap5912.unknown   |    Y    | 0x00000000 | 0x00000000 | 0x08 | 0x00 | 0x00 | 0xff

I still don't know what that third TAP is; maybe an early version of
an ICEpick JTAG router.


git-svn-id: svn://svn.berlios.de/openocd/trunk@1974 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-06-01 03:05:59 +00:00
zwelch dbbc9c41f7 Move TCL script files -- Step 2 of 2:
- Move src/tcl to tcl/.
- Update top Makefile.am to use new path name.


git-svn-id: svn://svn.berlios.de/openocd/trunk@1919 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-05-27 06:49:24 +00:00