zcy
/
tinyriscv-openocd
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity
9,129 Commits
46 Branches
9 Tags
21 MiB
Commit Graph

2 Commits (7cb8843794a258380b7c37509e5c693977675b2a)

Author SHA1 Message Date
Marek Vasut af952850b5 tcl/target: Fix V3M/V3H SoC chipname 
The V3M SoC is R8A77970 while the V3H SoC is R8A77980 . Update the
CHIPNAME and swap the SoCs to keep the list sorted.

Change-Id: I7e1777c0c7181e5e0beac98333f2047cb443d0df
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: http://openocd.zylin.com/5140
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
 2019-05-20 11:17:05 +01:00
Adam Bass 2f15407107 tcl/target: Add Renesas R-Car Gen3 targets 
Add configuration for the Renesas R-Car Generation 3 targets.
These are SoCs with Cortex A57s, A53s, and R7s. All cores
are supported.

Change-Id: I795233210e4f647a1a2a0adea7c058ae98b5db70
Signed-off-by: Adam Bass <adam.bass@renesas.com>
Reviewed-on: http://openocd.zylin.com/4669
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
 2018-10-01 20:59:13 +01:00