Commit Graph

51 Commits (7919694832ec989b71b93a9a9563a05c9e503d13)

Author SHA1 Message Date
Andreas Färber 81631e49a6 contrib/loaders: Enforce Little Endian ARM machine code
arm-none-eabi target triplet defaults to Little Endian, and so far any
submitted machine code snippets have been verified to be Little Endian.
However a user might override [ARM_]CROSS_COMPILE with an armeb toolchain,
potentially resulting in invalid machine code.

Let's be safe and enforce Little Endian mode for assembler and compiler.

Change-Id: I9cefe24689eaded25d60ffb1f254b254e8d76f9d
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3498
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-08-14 11:45:15 +01:00
Andreas Färber 02f17f0ba3 kinetis_ke: Switch to standard build variables
Instead of using ARM_ prefixed variables and an "arm" target,
use CROSS_COMPILE, AS, OBJCOPY. This requires to switch from ?= to =
to avoid the host assembler getting invoked.

This allows to handle kinetis_ke subdirectory like fm4 and xmc1xxx.

Change-Id: I7ea0bf119f6c4716f4d6002794004730af49eef4
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3505
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2016-08-13 09:19:43 +01:00
Andreas Färber e499502e98 contrib/loaders: Add umbrella Makefile
Add a Makefile that orchestrates the other loader Makefiles.
It assumes that the clean target can be run without cross toolchain.

at91sam7x does not successfully build and is not really needed either,
therefore left out.

Add an exception to .gitignore for any contrib/loaders Makefile.

Change-Id: I74456b768472f3190a1721bcf41a777bb8daf973
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3504
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-08-13 09:17:24 +01:00
Andreas Färber 9728ac3fba armv4_5: Integrate build of checksum code
Add rules to build armv4_5_crc.inc, and convert the code to target
endianness the least intrusive way.

Change-Id: I7452b2c7e679dae14f9cda5f89bc81c16fc12cad
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3473
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
2016-05-22 15:51:15 +01:00
Andreas Färber 18f7a2d072 armv4_5: Integrate build of erase check code
Add rules to build armv4_5_erase_check.inc, and convert the code to
target endianness the least intrusive way.

Drop an unused word from the assembler sources to make the ARM bytecode
fully match that of armv4_5.c and to not break ARMv4 assumptions.

This completes the build rules for contrib/loaders/erase_check directory.

Change-Id: I36be7a944e26142088195fa3fb072d4e577bf328
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3135
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-05-22 15:50:49 +01:00
Andreas Färber e0ba93d018 armv7m: Integrate build of checksum code
Add rules to build armv7m_crc.inc and include it via preprocessor.

Change-Id: I4482c7acb8454de28bdf210d9f06c0720ada490a
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3474
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-05-22 15:49:51 +01:00
Andreas Färber 0c8ec7c826 Fix spelling of ARM Cortex
It's Cortex-Xn, not Cortex Xn or cortex xn or cortex-xn or CORTEX-Xn
or CortexXn. Further it's Cortex-M0+, not M0plus.

Cf. http://www.arm.com/products/processors/index.php

Consistently write it the official way, so that it stops propagating.
Originally spotted in the documentation, it mainly affects code comments
but also Atmel SAM3/SAM4/SAMV, NiietCM4 and SiM3x flash driver output.

Found via:

  git grep -i "Cortex "
  git grep -i "Cortex-" | grep -v "Cortex-" | grep -v ".cpu"
  git grep -i "CortexM"

Change-Id: Ic7b6ca85253e027f6f0f751c628d1a2a391fe914
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3483
Tested-by: jenkins
Reviewed-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-05-20 21:38:03 +01:00
Andreas Färber 44d2c7b416 flash/nor: Add Infineon XMC1000 flash driver
The XMC1000 family uses a very different flash interface from XMC4000.

Tested on XMC 2Go and XMC1100 Boot Kit.

Change-Id: I3edaed420ef1c0fb89fdf221022c8b04163d41b3
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3418
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Tested-by: jenkins
2016-05-05 07:50:59 +01:00
Tomas Vanek baf08b0a1a flash Kinetis: new KVx family added
Cortex-M0+ and M4 motor control MCUs KV10, KV11, KV30, KV31,
KV42, KV44 and KV46 added to SDID identification.
Watchdog disable code changed to work on Cortex-M0+ (KV1x)
Protection size set to 1K for 16K flash devices (KV10Z16)
- cherry picked from Andrey Smirnov's change #2051

Change-Id: Ia6f4868eaf7e2cb6ad6a736210c703a67e0027be
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3235
Tested-by: jenkins
Reviewed-by: Kyle Manna <kyle.manna@fuel7.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2016-05-05 07:35:31 +01:00
Uwe Bonnes 934ed07b0d stm32l4x.c: Correct waiting for data.
Old code waited only for 7 bytes and didn't handle buffer wrap-around, but
was functional despite.

Change-Id: Iceaf7be1e51368b2ec0a8722cc9ac16d12f9aa63
Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Reviewed-on: http://openocd.zylin.com/3140
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2016-05-04 22:55:22 +01:00
Uwe Bonnes a28b94e9ab stm32l4x.c: Use explicit 64-bit flash access as reference manual implies.
Change-Id: I87b540c1ee7158a9d697e9fbc845a603c6bbe74d
Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Reviewed-on: http://openocd.zylin.com/3139
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Tested-by: jenkins
2016-05-04 22:53:23 +01:00
Ivan Meleca 5396ec5dcc flash: Added support for Freescale Kinetis KE family.
Tested with MKE04Z8VTG4, MKE02Z64VLC4 and MKE02Z64VLD2.

Change-Id: I606e32a2746a3b96d3e50f3656ba78d40c41c1ea
Signed-off-by: Ivan Meleca <ivan@artekit.eu>
Reviewed-on: http://openocd.zylin.com/3380
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2016-05-04 22:32:23 +01:00
Uwe Bonnes bfb02d5ba1 stm32l4x.c: Free r6/7 for 64-bit operations.
Use r5 instead of r7.

Change-Id: I350d00eeabe9446d64dba8f1dbffb5d4beab7dd6
Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Reviewed-on: http://openocd.zylin.com/3138
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2016-05-04 09:01:07 +01:00
Andreas Färber c3c15d2e07 armv7m: Integrate build of erase check code
Instead of documenting the file path as a comment and inline-commenting
the THUMB bytecode, include the hex array via preprocessor.

This assures the path is actually up-to-date and facilitates updating
the code.

Change-Id: Ieb0a7cd0bc14882ac96750f524616d9768a0c6f5
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3134
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-02-29 19:45:36 +00:00
Andreas Färber 7cf68a0f16 xmc4xxx: Integrate build of erase check code
Instead of pointing to the assembler sources in a comment and
inline-commenting the THUMB bytecode, place the hex array alongside the
assembler sources and include it via preprocessor.

Originally inspired by a typo in the file path during driver development,
but it also facilitates making changes to the assembler sources.

A Makefile is provided to help automate updating the bytecode. It is not
integrated with the automake system to avoid forcing an ARM cross-compiler
onto every user, i.e. after modifying the sources they need to be rebuilt
in that directory before building the usual way. ARM_CROSS_COMPILE= can
be passed on the make command line to deal with native ARM toolchains
or with varying prefixes of cross-toolchains.

Change-Id: I00ceb980a68c8554a180dd13719ac77b677a8bcd
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3133
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-02-29 19:42:21 +00:00
Andreas Färber 43ff5acd45 flash: New Spansion FM4 flash driver
The Spansion FM4 family of microcontrollers does not offer a way to
identify the chip model nor the flash size, except for Dual Flash vs.
regular layout. Therefore the family is passed as argument and
wildcard-matched - MB9BFx6x and S6E2CC families are supported.

Iterations showed that ...
1) Just doing the flash command sequence from SRAM loader code for each
half-word took 20 minutes for an 8 KB block.
2) Doing the busy-wait in the loader merely reduced the time to 19 minutes.
3) Significant performance gains were achieved by looping in loader code
rather than in OpenOCD and by maximizing the batch size across sectors,
getting us down to ~2 seconds for 8 KB and ~2.5 minutes for 1.1 MB.
(Tested with SK-FM4-176L-S6E2CC-ETH v11, CMSIS-DAP v23.)

gcc, objcopy -Obinary and bin2char.sh are used for automating the
integration of hand-written assembler snippets.

Change-Id: I092c81074662534f50b71b91d54eb8e0098fec76
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/2190
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2016-02-29 19:40:20 +00:00
Bogdan Kolbov ae2142d5a2 niietcm4: support for NIIET's Cortex-M4 microcontrollers
This adds docs, example config, flash driver.
Driver is only supports K1921VK01T model for now.

Change-Id: I135259bb055dd2df1a17de99f066e2b24eae1b0f
Signed-off-by: Bogdan Kolbov <kolbov@niiet.ru>
Reviewed-on: http://openocd.zylin.com/3011
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2015-11-26 12:17:25 +00:00
Jeff Ciesielski 33b048d456 flash: New driver for XMC4xxx microcontroller family
This is a complete flash driver for the Infineon XMC4xxx family of
microcontrollers, based on the TMS570 driver by Andrey Yurovsky.
The driver attempts to discover the particular variant of MCU via a
combination of the SCU register (to determine if this is indeed an
XMC4xxx part) and the FLASH0_ID register (to determine the variant).
If this fails, the driver will not load.
The driver has been added to the README and documentation.

Tests:
* Hardware: XMC4500 (XMC4500_relax), XMC4200 (XMC4200 enterprise)
* SWD + JTAG
* Binary: 144k, 1M

Note:
* Flash protect only partly tested. These parts only allow the flash
  protection registers (UCB) to be written 4 times total, and my devkits
  have run out of uses (more on the way)

Future Work:
* User 1/2(permalock) locking support via custom command
* In-memory flash loader bootstrap (flashing is rather slow...)

Change-Id: I1d3345d5255d8de8dc4175cf987eb4a037a8cf7f
Signed-off-by: Jeff Ciesielski <jeffciesielski@gmail.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/2488
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-11-11 12:08:35 +00:00
Uwe Bonnes ddc3317c54 Add handling for STM32L4.
Option handling not yet implemented.
Change-Id: I5a11ef3221896cb02babe4e6e71073c43aa8740b
Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Reviewed-on: http://openocd.zylin.com/2941
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-10-30 23:20:29 +00:00
Uwe Bonnes bb25049c39 stm32f2x: Add memory barrier needed for STM32F7 flashing.
Change-Id: I44fca55c46fc8f960ba46a0604692ce98909face
Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Reviewed-on: http://openocd.zylin.com/2939
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2015-10-30 17:52:50 +00:00
Robert Jordens d25355473d flash/nor/jtagspi: add JTAGSPI driver
Many FPGA board speak JTAG and have a SPI flash for their bitstream
attached to them. The SPI flash is programmed by first uploading a
proxy bitstream to the FPGA that connects the JTAG interface to the
SPI interface if the IR contains a certain USER instruction. Then the
SPI flash can be erase, written, read directly through the JTAG DR.

The JTAG and SPI signaling is compatible. Such a proxy bitstream only
needs to connect TDO-MISO, TDI-MOSI, TCK-CLK, and the activate the
chip select when the IR contains the special instruction and the JTAG
state machine is in the DR-SHIFT state.

Change-Id: Ibc21d793a83b36fa37e2704966aa5c837c4dd0d2
Signed-off-by: Robert Jordens <jordens@gmail.com>
Reviewed-on: http://openocd.zylin.com/2844
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-08-06 13:14:08 +01:00
Andreas Bomholtz bdbe78f131 sim3x: new flash driver for Silabs SiM3 microcontroller family
This is a new driver for Silicon Laboratories SiM3 microcontroller
family, based on the work of Ladislav Bábel. The driver will try to
detect the type of MCU from the device id register, and if this
fails it will use the flash size from the flash bank command.
Driver added to the documentation and to the README.
TCL script added.

Tests:
* Hardware: SiM3C166 (pre-production) and SiM3U167
* Binary: 4kb, 197kb, 256kb
* Flash protect not tested

Change-Id: I701e0cf505ca8ad99be7f83543fe5055b2f65dcc
Signed-off-by: Andreas Bomholtz <andreas@seluxit.com>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2078
Tested-by: jenkins
2015-02-11 22:05:22 +00:00
Angus Gratton 233f8859c0 nrf51 - Add async loader. Performance on nrf51822QAA/stlink-v2 from ~3.5KiB/s to ~19.5KiB/s.
Change-Id: Ib0bf41a0cec85f0bd5728551f8ad7f6255e4ea04
Signed-off-by: Angus Gratton <gus@projectgus.com>
[spamjunkeater@gmail.com: Cleanup buffer allocation, detect -1 for unknown pages]
Signed-off-by: Erdem U. Altunyurt <spamjunkeater@gmail.com>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2204
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2015-02-11 22:00:46 +00:00
Anders 1662c854e2 flash/nor/lpcspifi.c: fix bug that prevented clean reset after flash write
After SPI flash was written by the assembly language stub,
the last SPI command was not terminated by raising CS.
This left the SPI device in a hung state that prevented the
flash from being read by the M4 SPIFI controller, even after
the M4 was fully reset. To access the flash via SPIFI, it was
necessary to completely power cycle the board.

This fix adds the missing instructions to raise CS and
terminate the SPI command after the last byte. This allows
the M4 to be resumed or reset cleanly after flashing. The
SPIFI memory is now immediately accessable at address
0x1400 0000 after flashing is complete.

Change-Id: I4d5e03bded0fa00c430c2991f182dc18611d5f48
Signed-off-by: Anders <anders@openpuma.org>
Reviewed-on: http://openocd.zylin.com/2359
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2014-11-24 22:14:38 +00:00
Mahavir Jain 447fb25324 flash/nor: add mrvlqspi flash controller driver
This patch adds support for QSPI flash controller driver for
Marvell's Wireless Microcontroller platform.
For more information please refer,
https://origin-www.marvell.com/microcontrollers/wi-fi-microcontroller-platform/

Following things have been tested on 88MC200 (Winbond W25Q80BV flash chip):
1. Flash sector level erase
2. Flash chip erase
3. Flash write in normal SPI mode
4. Flash fill (write and verify) in normal SPI mode

Change-Id: If4414ae3f77ff170b84e426a35b66c44590c5e06
Signed-off-by: Mahavir Jain <mjain@marvell.com>
Reviewed-on: http://openocd.zylin.com/2280
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2014-09-22 19:37:09 +00:00
Paul Fertser 18bbffb6f7 Move ocl (at91sam7x flash loader) sources to contrib
Change-Id: Ib5c3c505a067d0e285a7b074cb6fddebfa6dda1e
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1904
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: Spencer Oliver <spen@spen-soft.co.uk>
2014-03-29 07:55:34 +00:00
Spencer Oliver 1c975fe30b cortex_m: target implementation renames cortex_m3 to cortex_m
We changed the actual target name quite a while ago.
This changes the actual target function names/defines to also match
this change.

Change-Id: I4f22fb107636db2279865b45350c9c776e608a75
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1626
Tested-by: jenkins
2013-10-10 20:51:03 +00:00
Paul Fertser fccc55225a mdr32fx: support for Milandr's MDR32Fx internal flash memory
This adds example config and flash driver for russian Cortex-M3
microcontroller model.

Run-time tested on MDR32F9Q2I evaluation board; the flash driver
should be compatible with MDR32F2x (Cortex-M0) too but I lack hardware
to test.

There're no status bits at all, the datasheets specifies some delays
for flash operations instead. All being in <100us range, they're hard
to violate with JTAG, I hope. There're also no flash identification
registers so the flash size and type has to be hardcoded into the
config.

The flashing is considerably complicated because the flash is split
into pages, and each page consists of 4 interleaved non-consecutive
"sectors" (on MDR32F9 only, MDR32F2 is single-sectored), so the
fastest way is to latch the page and sector address and then write
only the part that should go into the current page and current sector.

Performance testing results with adapter_khz 1000 and the chip running
on its default HSI 8MHz oscillator:

When working area is specified, a target helper algorithm is used:
wrote 131072 bytes from file testfile.bin in 3.698427s (34.609 KiB/s)

This can theoretically be sped up by ~1.4 times if the helper
algorithm is fed some kind of "loader instructions stream" to allow
sector-by-sector writing.

Pure JTAG implementation (when target memory area is not available)
flashes all the 128k memory in 49.5s.

Flashing "info" memory region is also implemented, but due to the
overlapping memory addresses (resulting in incorrect memory map
calculations for GDB) it can't be used at the same time, so OpenOCD
needs to be started this way: -c "set IMEMORY true" -f
target/mdr32f9q2i.cfg

It also can't be read/verified because it's not memory-mapped anywhere
ever, and OpenOCD NOR framework doesn't really allow to provide a
custom handler that would be used when verifying.

Change-Id: I80c0632da686d49856fdbf9e05d908846dd44316
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1532
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-08-07 21:02:51 +00:00
IS2T 34e8d1a50d Support for SST 39VF3201C NOR flash
* Add Thumb-2 code to write flash memories that don't support DQ5 polling
 * Make sure default values for unlock commands are set even if there is no PRI information given by the flash
 * Add a fixup to disable DQ5 polling for the SST 39VF3201C

Change-Id: Ib08cf20547d0f500d5f78241521e6b49050c3d40
Signed-off-by: IS2T development team <dev.is2t@gmail.com>
Reviewed-on: http://openocd.zylin.com/1449
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-07-01 08:39:36 +00:00
Spencer Oliver 08d4411b59 update files to correct FSF address
Change-Id: I429f7fd51f77b0e7c86d7a7f110ca31afd76c173
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1426
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2013-06-05 19:52:42 +00:00
Henrik Nilsson 70fb53f90b Added support for ARMv7-M in arm io.
Added support for ARMv7-M targets in arm_nandwrite and
arm_nandread.

Change-Id: Iab1d78d401f735e191c6a8519f3619035a300fae
Signed-off-by: Henrik Nilsson <henrik.nilsson@bytequest.se>
Reviewed-on: http://openocd.zylin.com/1188
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2013-04-02 15:11:02 +00:00
Roman D 7ae9154846 flash: EFM32 flash implementation
Limited (no page unprotect, no block writes) implementation of EFM32
flash support. Verified with EFM32 development kit and STLink V2 adapter
using SWD.

Change-Id: I3db2054d9aa628a1fe4814430425db3c9959c71c
Signed-off-by: Roman D <me@iamroman.org>
Reviewed-on: http://openocd.zylin.com/1106
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-01-14 10:25:55 +00:00
George Harris 516719b6b8 Added SPIFI flash driver, algorithms, and docs
Added a flash driver designed to allow program/erase of
memory-mapped SPI flash chips for LPC43xx/LPC18xx family
micros. This driver includes three algorithms - erase,
write, and SPIFI peripheral initialization (to allow
memory-mapped access after a reset). The driver has been
added to the flash driver table (drivers.c), and the
OpenOCD documentation has been updated to include the flash
driver configuration command.

Change-Id: I79f4ff8f1f07de4e5f2fe4f8c23aeb903f868514
Signed-off-by: George Harris <george@luminairecoffee.com>
Reviewed-on: http://openocd.zylin.com/783
Tested-by: jenkins
Reviewed-by: Aurelien Jacobs <aurel@gnuage.org>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-09-26 16:17:42 +00:00
Andreas Fritiofson 0900d5a3cd flash: don't write to FLASH_CR in stm32x_write_block
It's unnecessary and prevents reusing this function to fix
option byte writes.

Also try to disable flash writing after an error.

Change-Id: Ib5a7b768a1523e6b8da1555126fef4c1e60ab083
Signed-off-by: Szymon Modzelewski <szmodzelewski@gmail.com>
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/479
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-07-30 06:14:16 +00:00
Spencer Oliver e1e1d4742c build: add missing erase_check loader src
Change-Id: I1534c1ea1606fda9eb6ffa6a11a708f8c8a3d46a
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/605
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-05-14 09:28:03 +00:00
Spencer Oliver 1b0c22dd56 armv7m: update crc/erase_check loaders for cortex-m0
Use loaders that have been built for cortex-m0, making them usable for both
cortex-m0 and cortex-m3 families.

Change-Id: Ifd82be87eaec2cb96464290c80800cec3630d619
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/604
Tested-by: jenkins
2012-05-14 09:27:20 +00:00
Spencer Oliver 94db77a0e6 flash: add stm32f2x async flash loader
This enable the stm32f2x flash driver to use the asynchronous
algorithm support.

Speed increase is as follows:
before - wrote 1048576 bytes from file stm32f4x.bin in 30.453804s (33.625 KiB/s)
after - wrote 1048576 bytes from file stm32f4x.bin in 23.679497s (43.244 KiB/s)

This also fixes a bug that was in the old flash loader.
The old loader waited while bit16 of the status reg was 0, the new
loader waits until this bit is 0 as stated in the flash spec.
Bizarrely this bug did not effect programming on any tested parts.

Change-Id: I3efc94d42cbe81283673a8f4203700638080af6e
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/460
Tested-by: jenkins
2012-02-26 01:05:48 +00:00
Spencer Oliver 90cee35696 flash: add stellaris async flash loader
This enable the Stellaris flash driver to use the asynchronous
algorithm support.

Speed increase is as follows:
before - wrote 65536 bytes from file test.bin in 5.486040s (11.666 KiB/s)
after - wrote 65536 bytes from file test.bin in 2.274001s (28.144 KiB/s)

Change-Id: I9004c9aadffa1ae3b0cbf908e6549b5b1f794508
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/403
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2012-02-26 00:46:48 +00:00
Andreas Fritiofson 81b4ef6ee5 stm32f1x: fix bug in flash loader and restrict instruction set to armv6-m
Correct the offset to the read pointer when clearing it on error.

Also restrict the instruction set to armv6-m so the flash driver can be
used on Cortex-M0 parts with the same flash controller.

Change-Id: I380f9dabcc41fb6e4d43a7e02f355e2381913f39
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/399
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-by: Jonathan Dumaresq <jdumaresq@cimeq.qc.ca>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-01-30 20:01:42 +00:00
Spencer Oliver 6eb18b307a contrib: stm32f2x use std naming rules
Change-Id: I109297aa480b3474f1251571cb8e1a0baa1442fd
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/195
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2011-11-17 22:48:52 +00:00
Andreas Fritiofson 92b14f8ca9 stm32f1x: use async algorithm in flash programming routine
Let the target algorithm be running in the background and buffer data
continuously through a FIFO. This reduces or removes the effect of latency
because only a very small number of queue executions needs to be done per
buffer fill. Previously, the many repeated target state changes, register
accesses (really inefficient) and algorithm uploads caused the flash
programming to be latency bound in many cases. Now it should scale better
with increased throughput.

Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2011-10-09 00:00:53 +02:00
Clément Burin des Roziers da8ce5f2e1 STM32L: Added flash driver and target
Added the flash driver for the STM32L family, which highly differ from the STM32F family.
Added the TCL target file for JTAG access.
2011-10-03 18:42:39 +02:00
Øyvind Harboe 5ca7cbe2d2 stm32x: add support for STM32F20x
ready for wider testing and comments on basic erase + programming.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-02-04 10:55:43 +01:00
Spencer Oliver 7351eecf6a loader: update loader src for armv7-m arch
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-01-06 10:35:02 +00:00
Jonathan Dumaresq 9f408db29d Add the contrib file for the armv7m arch
Signed-off-by: Jonathan Dumaresq <jdumaresq@cimeq.qc.ca>
2011-01-06 08:04:58 +01:00
Spencer Oliver 83e5aaf577 stm32: add dual flash bank support
This patch adds the initial dual flash bank support for devices such
as the stm32xl family.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-12-23 12:11:13 +00:00
Spencer Oliver 921f40f62a contrib: change stm32 flash loader extension
As the stm32 flash loader now uses the preprocessor change extension
so that it used by default.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-12-23 12:11:12 +00:00
Spencer Oliver cbf48bed6a contrib: add source to the cfi flash loaders
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-12-10 19:37:39 +00:00
Spencer Oliver 9a76c68563 contrib: make sure loaders use correct arch
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-12-10 13:42:29 +00:00
Freddie Chopin 015bf55944 Add comments and tiny improvements to STM32 flash loader algorithm
Add comments to assembly flash loader for STM32. Add tiny improvement in
size of the algorithm (40 vs 48 bytes) and tiny speed improvement (~1.5%,
as time is wasted on waiting for end of operation anyway).

Signed-off-by: Freddie Chopin <freddie_chopin@op.pl>
2010-11-15 09:17:14 +01:00