Commit Graph

3 Commits (76b35638608f26cf7ea10509ecba3032eff90c9d)

Author SHA1 Message Date
Andreas Fritiofson 0900d5a3cd flash: don't write to FLASH_CR in stm32x_write_block
It's unnecessary and prevents reusing this function to fix
option byte writes.

Also try to disable flash writing after an error.

Change-Id: Ib5a7b768a1523e6b8da1555126fef4c1e60ab083
Signed-off-by: Szymon Modzelewski <szmodzelewski@gmail.com>
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/479
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-07-30 06:14:16 +00:00
Andreas Fritiofson 81b4ef6ee5 stm32f1x: fix bug in flash loader and restrict instruction set to armv6-m
Correct the offset to the read pointer when clearing it on error.

Also restrict the instruction set to armv6-m so the flash driver can be
used on Cortex-M0 parts with the same flash controller.

Change-Id: I380f9dabcc41fb6e4d43a7e02f355e2381913f39
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/399
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-by: Jonathan Dumaresq <jdumaresq@cimeq.qc.ca>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-01-30 20:01:42 +00:00
Andreas Fritiofson 92b14f8ca9 stm32f1x: use async algorithm in flash programming routine
Let the target algorithm be running in the background and buffer data
continuously through a FIFO. This reduces or removes the effect of latency
because only a very small number of queue executions needs to be done per
buffer fill. Previously, the many repeated target state changes, register
accesses (really inefficient) and algorithm uploads caused the flash
programming to be latency bound in many cases. Now it should scale better
with increased throughput.

Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2011-10-09 00:00:53 +02:00