tinyriscv-openocd

Commit Graph

Author	SHA1	Message	Date
Uwe Hermann	ca45e700b1	target config files: Fix whitespace issues. Drop useless double-space occurences, drop trailing whitespace, and fix some other minor whitespace-related issues. Change-Id: I6b4c515492e2ee94dc25ef1fe4f51015a4bba8b5 Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/137 Tested-by: jenkins	2011-11-07 16:16:33 +00:00
Marek Vasut	d5b9c7998c	CortexA8: Introduce Freescale i.MX51 variant This patch introduces support for Cortex A8 based Freescale i.MX51 CPU. This CPU has the Debug Access Port located at a different address (0x60008000) than TI OMAP3 series of CPUs. i.MX51 configuration file based on OMAP3 configuration file and an email from Alan Carvalho de Assis <acassis@gmail.com>. Signed-off-by: Marek Vasut <marek.vasut@gmail.com>	2010-11-05 11:25:57 +01:00

Author

SHA1

Message

Date

Uwe Hermann

ca45e700b1

target config files: Fix whitespace issues.

Drop useless double-space occurences, drop trailing whitespace, and fix
some other minor whitespace-related issues.

Change-Id: I6b4c515492e2ee94dc25ef1fe4f51015a4bba8b5
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/137
Tested-by: jenkins

2011-11-07 16:16:33 +00:00

Marek Vasut

d5b9c7998c

CortexA8: Introduce Freescale i.MX51 variant

This patch introduces support for Cortex A8 based Freescale i.MX51 CPU. This CPU
has the Debug Access Port located at a different address (0x60008000) than TI
OMAP3 series of CPUs.

i.MX51 configuration file based on OMAP3 configuration file and an email from
Alan Carvalho de Assis <acassis@gmail.com>.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>

2010-11-05 11:25:57 +01:00

2 Commits (5b170456f794138cec31b24ee45e2ba4389da5d5)