Make _TARGETNAME variable global so it could be used by scripts sourcing it.
Change-Id: Iaf1c3b53875734658b1b8f136c9bb958988b56bf
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-on: http://openocd.zylin.com/421
Tested-by: jenkins
Reviewed-by: Chris Morgan <chmorgan@gmail.com>
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
This patch add jtag support to the stlink driver add
two new transport types, JTAG and SWIM.
Change-Id: I7089d74250330be5c6a01c24066307641df7d11e
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/393
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This only effects the older Stellaris LM3S811 kits (rev B and below).
Change-Id: Ie068cce7748fede9e7113ea63a69c96222c809fa
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/401
Tested-by: jenkins
This affects all configurations including target/at91sam3XXX.cfg
Change-Id: I2c1e1edf0986d30e63f109604a38bf402ded369e
Signed-off-by: Ulf Samuelsson <ulf@emagii.com>
Reviewed-on: http://openocd.zylin.com/292
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Renamed all functions, enums, structs and defines from mx2/imx27 to mxc. This is in preparation of adding support for mx35 NFC(v2).
Change-Id: I92ad23f0cfab605215bbf0d5846c5c288423facf
Signed-off-by: Erik Ahlén <erik.ahlen@avalonenterprise.com>
Reviewed-on: http://openocd.zylin.com/267
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Handle default case of single DDR chip
Propagate global variable for multi DDR chip
Change-Id: I315380f91ee7fcc2976437aa5836d88a7964fc9d
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/251
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Commit 1794e5ee54 renamed the file to
have all lowercase characters according to most references to the
file, but the commit didn't change the existing reference to the
old filename.
Change-Id: I380e52e947a8091d48cf010e3919bf2caed7fdff
Signed-off-by: Peter Stuge <peter@stuge.se>
Reviewed-on: http://openocd.zylin.com/248
Tested-by: jenkins
Before this patch, at91sam3u4c.cfg includes "at91sam3uxx.cfg" which
doesn't exist - the filename was at91sam3uXX.
However, many operating systems have case sensitive file names!
Change-Id: I8b2f987f1f4214269b80ef5cba8177ce05ad90b6
Signed-off-by: Harald Welte <laforge@gnumonks.org>
Reviewed-on: http://openocd.zylin.com/247
Tested-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Fix error introduced in recent commit.
Correct the name of the board file.
Change-Id: I46bca8329812fb24bc4f8d316be9e7cba9b56496
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/234
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Initial support for SPEAr320 chip and for evaluation
board named EVAL_SPEAr320CPU.
Change-Id: I85524655769bcc610294a26db47a7a399256fbb7
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/231
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Initial support for SPEAr300 chip and for evaluation
board named EVALSPEAr300.
Currently supports only those parts in common with
SPEAr310.
Change-Id: I8075aa721cf3dfaac561ee51e5df4ce9a2992e3e
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/230
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The code to autodetect DDR was wrong and not complete.
Replaced with a parameter passed to TCL proc.
Split DDR configuration in the two cases of single and
dual DDR chip, using single chip as default.
Change-Id: If39aa518670398e8e4f207d7db6e812a49743e15
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/229
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
DDR controller activation should not be in DDR chip
specific code, but in generic DDR controller part.
Change-Id: If1b178228352b48b0097d7b9b300005fb5bb4fb6
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/228
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The support for SPEAr3xx family members does not require
dedicated files for each member.
Join the initialization scripts in a single file.
Change-Id: I45e9dc64809a6f52c4592e3e0eef5529394887c6
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/227
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The initialization of RAS enable and clock is required by
all SPEAr3xx devices
Change-Id: Iea4cd0902e4da219475d7f35b4c25fc87ec6b902
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/226
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The initialization of memory port 1 is required by
SPEAr310 only
Change-Id: I9d655da1026795f02ff2f82aed36441068cf266d
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/225
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
ST-AN was mentioned but there was no reference
Change-Id: Ie065f8faba94d63cf391a994ec895692d499394e
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/224
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Based on the K40/Kwikstik config files
Change-Id: Icb3adc7126bacea65209b712ebaa0eb3b894372e
Signed-off-by: Tomas Frydrych <tomas@sleepfive.com>
Reviewed-on: http://openocd.zylin.com/210
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This is a successor to the Flyswatter cable and is very close to the original.
The new revision is based on FT2232H.
Change-Id: Icc6efcf0e4f9d8a10b65df8679b4973f6b375a9f
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: David Anders <danders@tincantools.com>
Reviewed-on: http://openocd.zylin.com/193
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The main difference with at91sam7x256 is the declaration of the second
bank of flash.
Change-Id: I87a20dcbb639b797799139ccf46cc73934fa3b9e
Signed-off-by: Aurelien Jacobs <aurel@gnuage.org>
Reviewed-on: http://openocd.zylin.com/173
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Drop useless double-space occurences, drop trailing whitespace, and fix
some other minor whitespace-related issues.
Change-Id: I6b4c515492e2ee94dc25ef1fe4f51015a4bba8b5
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/137
Tested-by: jenkins
Also, drop author name from interface/hilscher_* files, that info is in the
git log, and none of the other files contain author names either.
Change-Id: Idf0eb4279c4bff31d15c166619c0bf8b1c5bb877
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Reviewed-on: http://openocd.zylin.com/138
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This patch adds support for a KaRo TX27 CPU module on a StarterkitV base board.
The register settings have been extracted from a RedBoot distribution
that is distributed along with the hardware by KaRo.
This setup has been tested with a JTAGKey. The testing has been focussed
on loading a program into memory and start execution.
Although the flash seems to be correctly detected, no effort has been put
in testing the NAND programming yet.
Change-Id: Ib17763f1e3ecacd0eb9b5fdc32f8cba7a5e59be5
Signed-off-by: Mark Vels <mark.vels@team-embedded.nl>
Reviewed-on: http://openocd.zylin.com/158
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
There are many "force an error till we get a good number" comments in
target/board files. This refers to the use-case where a config script
sets _CPUTAPID to 0xffffffff (which presumely gets overridden later):
if { [info exists CPUTAPID ] } {
set _CPUTAPID $CPUTAPID
} else {
# Force an error until we get a good number.
set _CPUTAPID 0xffffffff
}
However, the same comment was also copy-pasted in many files which do
_not_ set _CPUTAPID to 0xffffffff, where the comment doesn't make any
sense at all. Drop those comments. Also, add one missing comment, and
fix small whitespace and grammar issues.
Change-Id: Ic4ba3b5ccba87ed40cea0d6a7d66609fbdfa3c71
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Reviewed-on: http://openocd.zylin.com/136
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
The STM3220G-EVAL board has an STM32F207IGH6. ("...H6", not "...T6").
Change-Id: Iaf3dae6830c5c0685a1dcd1588d391434bc51be7
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
Reviewed-on: http://openocd.zylin.com/120
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The BusBlaster from Dangerous Prototypes is based on the FTDI FT2232H IC.
It has a CPLD between the FT2232H and the JTAG header allowing it to
emulate various debugger types. It comes configured as a JTAGkey compatible
device.
Change-Id: Iab56907bf67ded87001e628d93012f1e16287d90
Signed-off-by: Richard Barlow <richard@richardbarlow.co.uk>
Reviewed-on: http://openocd.zylin.com/53
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
The Toshiba TMPA900 series (TMPA900/901) only has internal RAM regions
RAM-0 (16kB) and RAM-1 (8kB) which we can use as working area.
This is probably a copy-paste error from tmpa910.cfg, which has the
correct values and sizes for the TMPA910 series (TMPA910/911/912/913):
there are RAM-0, RAM-1, and RAM-2 (each 16kB).
Also, change "built-in RAM" to "internal RAM" to match what the
datasheet uses.
Change-Id: I993cd6b7fadc28cf34e5cc18426bb2bb42597670
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Reviewed-on: http://openocd.zylin.com/34
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
Using the ICEPick reset seems to allow the processor to be halted sooner
and the halt on gdb connection makes the connect process more robust.
Change-Id: I0586f6e6becc60a729030509ef58907a19d545ec
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/23
Tested-by: Øyvind Harboe <oyvindharboe@gmail.com>
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
This sets up simple functions that can later be used to provide additional
ICEPick Operations.
Change-Id: I313b8679267696fad87d23f3692963e513f2fe21
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/22
Tested-by: Øyvind Harboe <oyvindharboe@gmail.com>
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
The DLP Design DLP-USB1232H UART/SPI/JTAG module is based on an FTDI FT2232H
chip. Among other things, it can used as JTAG programmer if connected to
the JTAG target properly. I have successfully wired the module to an
Olimex STM32-H103 eval board and flashed a firmware onto that using OpenOCD.
The setup details and schematics are documented at:
http://randomprojects.org/wiki/DLP-USB1232H_and_OpenOCD_based_JTAG_adapter
Change-Id: I5eb9255a61eeece233009bee77d7dc3b5d1afb8b
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Reviewed-on: http://openocd.zylin.com/20
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: Spencer Oliver <spen@spen-soft.co.uk>
This is a Toshiba TMPA900CMXBG (ARM9) based SO-DIMM CPU module with 64MB
DDR SDRAM, 256MB NAND flash, and on-board Ethernet.
The board file provides a tonga2_init function which sets up the
PLL/clocks and memory (SDRAM and SRAM), which allows writing a boot-loader
into RAM via JTAG.
Change-Id: I60522b97997bdf50e1f25aebab910d93a98522fb
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Reviewed-on: http://openocd.zylin.com/19
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: Spencer Oliver <spen@spen-soft.co.uk>
Gumstix Verdex is a PXA270-based series of computer-on-modules. This
configuration file is based off the voipac.cfg configuration with
a different flash memory configuration. This has been tested flyswatter
adapter to reflash a Gumstix Verdex XL6P board.
The missing value for ES1.2 silicon revision is mentioned in
sprugn4m.pdf, and the recent TI Beagleboard XM is powered by it,
so let support the revision.
Currently the board/redbee-*.cfg files incorrectly include the
interface definition. Move the interfaces to interface/,
and create a single board/redbee.cfg that is common to both boards.
Intended usage is now:
openocd -f interface/redbee-econotag.cfg -f board/redbee.cfg
Some devices, eg. The Tempest class return the wrong device class
when queried. Add the ability to manually override the device class.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
For the time being we support the old stm32 script names - this will
be removed before the next release cycle.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
The following mini6410/tiny6410 functions are available:
init_6410 - initialize clock, timer, DRAM
init_6410_flash - initializes NAND flash support
install_6410_uboot - copies u-boot image into RAM and runs it
Soft breakpoints are currently broken if the MMU is enabled due to incorrect
cache flushing. Until this is fixed, force the use of hardware breakpoints.
Signed-off-by: Aaron Carroll <aaronc@ok-labs.com>
all at91sam9 are nearly the same except sram and soc name
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
PandaBoard REV EA1 (Panda Early Adopter Program) has a different ID.
This patch add alternate REV EA1 TAP id to configuration file
Signed-off-by: Luca Ellero <lroluk@gmail.com>
* Write to the PRM reset control register should have been 'phys';
* Setup empty reset-assert handlers for the M3's, since the board-level reset
takes care of them;
* Remove the dbginit cruft, because it gets called implicitly on reset.
Signed-off-by: Aaron Carroll <aaronc@cse.unsw.edu.au>
Define a proc which PCBs can easily override.
Also demonstrates how to add multiple TAP exepcted-id's
using arguments.
Added 0x3f0f0f0f as expected TAP-id. Old LPC2148 silicon
I happened to have on my desk?
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
End of line comments fixed with ';' before '#'.
Added few additional 'space' to keep indentation in
multi-line comments.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
LPC2xxx do not require reset_config srst_pulls_trst. This can cause various "strange" problems when flashing the chip, because "reset halt" actually allows the chip to run for some short period of time and execute some code.
Signed-off-by: Freddie Chopin <freddie_chopin@op.pl>
Due to commit e40aee2954d2beabe1d8c530d9ff1e564fb01f48 we now honour the
targets 'reset_config' setting. Previously we ignored the srst setting
for luminary targets.
Luminary targets have never supported using srst to reset into debug mode
so remove the option from the target configs files.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
When this config was updated in commit e3773e3e3d
the old jtag declaration was not removed.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Rename Atmel target scripts which had wrong name ("at91" missing for ARM7 AT91SAM7..., "at" missing for AVR ATmega...)
Signed-off-by: Freddie Chopin <freddie_chopin@op.pl>
STMicroelectronics controller SMI is not SPEAr specific.
Rename it and change name to every symbol in the code.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Modified spearsmi driver to include support for STR75x
Added missing initialization in tcl file for STR750
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Initial support for ST SPEAr310 and for the evaluation
board EVALSPEAr310 Rev. 2.0.
Scripts are split in generic for SPEAr3xx family and
specific for SPEAr310. This should easily allow adding
new members of the family.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
This patch introduces support for Cortex A8 based Freescale i.MX51 CPU. This CPU
has the Debug Access Port located at a different address (0x60008000) than TI
OMAP3 series of CPUs.
i.MX51 configuration file based on OMAP3 configuration file and an email from
Alan Carvalho de Assis <acassis@gmail.com>.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
measure_clk indicates ca. 3-4MHz, so 1MHz should be safe.
Added self_test proc used to test that rclk worked.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Provide new helper proc that can set up either an SWD or JTAG DAP
based on the transport which is in use -- mostly for SWJ-DP.
Also update some SWJ-DP based chips/targets to use it. The goal
is making SWD-vs-JTAG transparent in most places. SWJ-DP based chips
really need this flexible configuration to cope with debug adapters
that support different transports, without needing new target configs
for each transport or adapter.
For JTAG-DP, callers will use "jtag newtap" directly, as today; only
one chip-level transport option exists.
For SW-DP (e.g. LPC1[13]xx or EFM32, they'll use "swd newdap" directly
(part of an upcoming SWD transport patch). Again, only one transport
option exists, so hard-wiring is appropriate there.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
In previous patch, I have introduced again the symbol
"ocd_mem2array", now replaced by "mem2array".
Fix the error.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
TCL procedures mrw and mmw, originally in DaVinci target code,
are duplicated in other TCL scripts.
Moved in a common helper file, and added help/usage description.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
the new Marvell PXA270M processor has a new TAPID: 0x89265013.
Attached you will find a patch for target/pxa270.cfg that will handle this.
I have also attached a board/colibri.cfg file to support the Colibri
PXA270 module by Toradex.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
This new cmd adds the ability to choose the Cortex-M3
reset method used.
It defaults to using SRST for reset if available otherwise
it falls back to using NVIC VECTRESET. This is known to work
on all cores.
Move any luminary specific reset handling to the stellaris cfg file.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
- Update all Luminary config's to use a common target/stellaris.cfg.
- Add Luminary ek-lm3s6965 config.
- Increase working area for boards with more ram.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Using the bundled JTAG/SWD debug support in JTAG mode
is optional on *all* of the EK boards.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Freddie Chopin
Mathias K
Spencer Oliver
Michel JAOUEN
John
Erik Ahlén
Ulf Samuelsson
Antonio Borneo
Peter Stuge
Harald Welte
Tomas Frydrych
Felix Ruess
Marek Vasut
Aurelien Jacobs
Uwe Hermann
Mark Vels
Jim Norris
Marti Bolivar
Richard Barlow
Karl Kurbjun
Clément Burin des Roziers
Ash Charles
Vladimir Zapolskiy
Uwe Bonnes
Rodrigo L. Rosa
Jonathan Dumaresq
Jim Paris
SimonQian
B. A. Bryce
Spencer Oliver
Michael Hunold
Øyvind Harboe
Martin Schmölzer
Dale Lukas Peterson
rlrosa
Laurent Charpentier
Bear
Damjan Marion
Jonas Hoerberg
Alexandre Pereira da Silva
Luca Ellero
Jean-Christophe PLAGNIOL-VILLARD
Aaron Carroll
Aaron Carroll
Freddie Chopin
Michael Schwingen
Tormod Volden
Michael Trensch
Rolf Meeser
Piotr Esden-Tempski
Andrew Leech
David Brownell
Zachary T Welch
Takács Áron