Commit Graph

3934 Commits (3172be80a3e14f4c8c3628a37db348c04fd60fc4)

Author SHA1 Message Date
Nicolas Pitre e8599cc3d8 ARM semihosting: work with both low and high vectors
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-04 23:07:10 -08:00
Zachary T Welch 899c9975e7 rename nand.h to flash//nand/core.h
Rename nand.h as flash/nand/core.h, chase consumers.  The public APIs
need to be sorted out with imp.h, but this allows other changes to
begin improving the separation between policy and mechanism.

Moves #include <target/target.h> and #include "driver.h" into the
internal headers or source files, removing it from <flash/nand/core.h>.
2009-12-04 22:26:25 -08:00
Zachary T Welch da3bcb392e move remaining nand helper files
Move remaining NAND implementation files into src/flash/nand/.
2009-12-04 21:47:47 -08:00
Zachary T Welch 747d6f2286 split nand.c into nand/{core,fileio,tcl}.c
Moves commands into nand/tcl.c and core implementation to 'nand/core.c'
and 'nand/fileio.c'.  Eliminates 'flash/nand.c'.

Adds 'nand/imp.h' to share routines between TCL commands and core.
2009-12-04 21:41:23 -08:00
Zachary T Welch a7fd30c07f split NAND driver handling into nand/driver.[ch]
This work parallels the NOR directory, encapsulating the NAND drivers
into a separate file.  This takes an extra step by encapsulating the
type of data structure used to manage the drivers, allowing it to be
changed from an array to a dynamic list in the future.
2009-12-04 21:41:23 -08:00
David Brownell af1d7590ed ARM: doc updates for main header
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-04 20:44:29 -08:00
David Brownell 3edcff8b8e ARM: rename armv4_5_build_reg_cache() as arm_*()
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-04 20:33:02 -08:00
David Brownell c2cc677056 ARM: rename armv4_5_algorithm as arm_algorithm
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-04 20:19:49 -08:00
David Brownell 340e2eb762 ARM: misc generic cleanup
Remove an undesirable use of the CPSR symbol ... it needs to vanish.
Flag mode-to-number stuff as obsolete; say why ... should also vanish.

Get rid of no-longer-used mode and state typedefs.

Comment a few of the implicit ties to "classic ARM".

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-04 20:14:46 -08:00
David Brownell e51b9a4ac7 ARM: ARMV4_5_COMMON_MAGIC --> ARM_COMMON_MAGIC
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-04 19:46:44 -08:00
David Brownell 87589043fa ARM: switch target_to_armv4_5() to target_to_arm()
And remove that old symbol.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-04 19:43:03 -08:00
David Brownell 56e0171420 ARM: rename armv4_5_state_* as arm_state_*
And make arm_state_strings[] be const.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-04 19:39:25 -08:00
David Brownell d4d16f1036 ARM: rename armv4_5_mode_* AS arm_mode_*
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-04 19:33:33 -08:00
David Brownell 0073e7a69e ARM: rename ARMV4_5_MODE_* as ARM_MODE_*
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-04 19:21:14 -08:00
David Brownell 31e3ea7c19 ARM: rename ARMV4_5_STATE_* as ARM_STATE_*
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-04 19:14:48 -08:00
David Brownell f67f6fe5bb ARM11: report watchpoint trigger insn
As with Cortex-A8, the WFAR register holds useful information
that should be recorded and, where relevant, displayed.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-04 18:57:31 -08:00
David Brownell a0edb8a328 ARM11: basic watchpoint support
Use the DPM watchpoint support; remove old incomplete stubs.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-04 18:57:31 -08:00
David Brownell f4651c869f ARM11: tweak TAP ops and debugging
Tweak scanchain 7 debug messaging:

 - show register addresses in decimal, matching ARM docs;
 - remove some pointless noise

Avoid some needless roundtrips:

 - skip SCAN_N when SCREG already holds that number (speeds up
   polling and other common operations)
 - avoid zeroing vcr twice on resume

Show the IR opcode as a label ("RESTART") too; and in decimal,
matching ARM docs.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-04 18:57:30 -08:00
Zachary T Welch 87a0119fa2 reorder build order of src directory
Descend into the library modules in order, from bottom-to-top.
2009-12-04 16:56:24 -08:00
Zachary T Welch f3e6f584f1 remove flash.h from tree
Remove the now vestigial <flash/flash.h> header from the tree,
replacing a few references with <flash/nor/core.h>
2009-12-04 16:56:24 -08:00
Zachary T Welch ae6374e25d split flash.h into into flash/nor/*.h
Move the bulk of the flash.h file into flash/nor/core.h, leaving an
empty husk that will be removed in the next patch.

The NOR driver structure is an implementation detail, so move it into
its own private header file <flash/nor/driver.h> along with helper
declaration for finding them by name.
2009-12-04 16:56:24 -08:00
Zachary T Welch d9dc604a4d remove target.h from flash.h
The flash.h header does not require the target.h header file, but
its implementation source files do.  Move it to flash/nor/imp.h.
2009-12-04 16:56:23 -08:00
Zachary T Welch 1527272fb2 split NOR and NAND flash headers
Moves common flash errors to <flash/common.h> to decouple these two
mostly unrelated trees of code.
2009-12-04 16:56:23 -08:00
Zachary T Welch 5fdee60fd4 eliminate src/flash/flash.c
Move remaining NOR flash implemenation into flash/nor/core.c
Removes flash.c from the build, leaving only its header to split.
2009-12-04 16:56:23 -08:00
Zachary T Welch c90702eaa7 add flash/nor/drivers.c
Encapsulates access to the flash_drivers array, providing a base
of operations for future dynamic driver module loading features.
2009-12-04 16:56:23 -08:00
Zachary T Welch 04ee41de52 move more nor flash implementation details
Splits the exec mode commands out of flash.c into the flash/nor/ files.
The routines used by these high-level commands are moved into nor/core.c,
with their internal declarations placed in nor/imp.h.

Fixes distribution of <flash/nor/core.h> header.
2009-12-04 16:56:23 -08:00
David Brownell 32f961daba ARM: semihosting entry cleanup
Clean up arm_semihosting() entry a bit, comment some issues and just
which SVC opcodes are getting intercepted.  Microcontroller profile
cores will need a new entry, since they use BKPT instead (and don't
have either SVC mode or an SPSR register).

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-04 16:51:48 -08:00
David Brownell bdde9460b9 ARM: remove semihosting globals
Store a flag and errno in in "struct arm".
Have "poll" output report when semihosting is active.
Shrink some of the affected lines.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-04 16:51:48 -08:00
David Brownell acd6d33994 User's Guide: more semihosting info
List it in the concept index, in the section about target software
changes a project might want to consider, and in the section about
debug messaging.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-04 10:11:31 -08:00
Øyvind Harboe 146e841fc9 bootstrap: stop execution upon error
When tools are not installed, exit immediately. This makes
the error messages clearer.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2009-12-04 12:46:45 +01:00
Zachary T Welch c65d94f7d0 add flash/nor/core.[ch]
The newly moved flash TCL routines access the internals of the module
too much.  Fix the layering issues by adding new core NOR flash APIs:

<flash/nor/core.h>:
  - flash_driver_find_by_name() - self-descriptive

<flash/nor/imp.h>:
  - flash_bank_add()            - encapsulates adding banks to bank list
  - flash_bank_list()           - encapsulates retreiving bank list

This allows the externs in flash/nor/imp.h to be removed, and
these mechanisms may now be re-used by other flash module code.
2009-12-04 03:34:33 -08:00
Zachary T Welch 3cb0b56005 add flash/nor/{tcl.c,imp.h} from flash/flash.c
Moves the top-level 'flash' command handlers into flash/nor/tcl.c,
with flash/nor/imp.h providing an internal implementation header
to share non-public API components.
2009-12-04 03:34:33 -08:00
Zachary T Welch 79a73a786e separate Jim from jtag/core.c
After previous efforts, only one Jim routine remained in jtag/core.c,
and moving it to jtag/tcl.c painlessly finishes separating these layers.
The headers need separating, but the implementation is clean.
2009-12-04 03:34:32 -08:00
Zachary T Welch b58c1d808f switch 'rm' command away from using Jim
Commands that do not need to use Jim should be registered as
high-level command handlers.
2009-12-04 03:34:32 -08:00
Zachary T Welch c5eb8e29bd check top-level command registrations
When calling module_register_commands, the return value needs to be
checked for failures.  Instead of duplicating code, use an array of
function pointers to the identical registration functions to iterate
over during startup.
2009-12-04 03:29:15 -08:00
Zachary T Welch eae56d27c3 allow 'jtag init' to be run in any mode
Help alleviate further potential problems with interactive startup.
2009-12-04 03:29:15 -08:00
David Brownell a535d2f643 target: cygwin build fixes
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-04 00:42:36 -08:00
Øyvind Harboe 24551b7b92 zy1000: FPGA revC wip
The bug in revC register memory access is pretty much
cornered now.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2009-12-04 08:21:25 +01:00
Nicolas Pitre ed59dfc80a basic ARM semihosting support
Semihosting enables code running on an ARM target to use the
I/O facilities on the host computer. The target application must
be linked against a library that forwards operation requests by
using the SVC instruction that is trapped at the Supervisor Call
vector by the debugger.  The "hosted" library version provided
with CodeSourcery's Sourcery G++ Lite for ARM EABI is one example.

This is currently available for ARM9 processors, but any ARM
variant should be able to support this with little additional work.

Tested using binaries compiled with Sourcery G++ Lite 2009q1-161
and ARM RVCT 3.0.

[dbrownell@users.sourceforge.net: doc tweaks, NEWS]

Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-03 18:42:01 -08:00
David Brownell f62c035c52 doxygen: remove some warnings
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-03 18:31:38 -08:00
Dean Glazeski cf2cb0fc84 Make ARM NAND I/O operations aware of last op
Updates the ARM NAND I/O code to look at and update the op
field of arm_nand_data to reflect the last operation performed.
It uses this field to copy the correct code to the target in the
case where the struct is used for reads and writes.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-03 17:29:42 -08:00
Dean Glazeski 66985bb306 ARM NAND I/O interface update
Modify the arm_nand_data struct to better support both read and
write operations while using the same struct.  An additional
field was added, and initialized, to record the last operation
so that the correct code can be loaded to the working area.

[dbrownell@users.sourceforge.net: merge init patch, tweak GPL note]

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-03 17:29:41 -08:00
Dean Glazeski 9a51b8b0e3 NAND page command refactoring.
Created a new function that handles sending a command and the address
information for pages to a NAND device.

[dbrownell@users.sourceforge.net: tweaked line lengths, name 'oob_only']

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-03 16:44:27 -08:00
David Brownell 7e2dffbbff ARMv7-A: tweak arch_state()
Punt to the armv4_5_arch_state() for all the common stuff, to
shrink code and so we will get any improvements it provides.

Don't hide watchpoint status if we happen to be in "abort" mode.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-03 16:18:24 -08:00
David Brownell ea7a49cb9b ARM DPM: share debug reason logic
No point in both ARM11 and Cortex-A8 having private copies
of the logic sorting out e.g. DBG_REASON_WATCHPOINT.

Add and use a shared routine for this ... there's actually
a bunch more debug entry logic that could be shared, this
is just a start on that.  Note that this routine fixes a
bug observed in the ARM11 code, where some abort mode quirks
were displayed as being an unknown debug reason; and also
silences needless ARM11 chatter.

Likewise with private copies of DSCR ... add one to the DPM
struct.  Save it as part of setting DBG_REASON_* so later
patches can switch over to using that copy.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-03 16:08:04 -08:00
David Brownell 6eee0729d7 ARM11: use shared DSCR bit names
For the bits now defined in "arm_dpm.h", switch to the
shared DSCR_* symbol and remove the ARM11_DSCR_* version.

Define DSCR_INT_DIS and use it instead of the ARM11_DSCR_*
sibling symbol.  (Note:  for both ARM11 and Cortex-A8, this
should arguably be enabled by default when single stepping.)

Remove some other unused declarations in "arm11.h".

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-03 16:08:04 -08:00
David Brownell eb6c880ddc ARM DPM: make DSCR bit defs sharable
Move the symbols for these bits from "armv7a.h" to "arm_dpm.h",
where they can be seen and used not just by Cortex-A but also
by the ARM11 (armv6) code.

Change them from bit numbers to bit masks ... this matches the
usage in ARM11 code, and also makes it easier to read.

Rename DSCR_EXT_INT_EN as DSCR_ITR_EN to match the docs; it's
enabling ITR functionality, not external interrupts, so this
changes the name to be less misleading.  (There *IS* a bit
affecting interrupts, and this isn't it.)

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-03 16:08:04 -08:00
David Brownell adbf40a045 fix another init regression
This makes Beagle work again, instead of losing horribly because
the JTAG event handlers are no longer able to e.g. "runtest".  I
get the previous quirky behavior ... comes up OK but "reset halt"
somewhat mysteriously makes it all better.  (Instead of nothing
being able to work at all...)  However, I'm still seeing:

 The 'init' command must be used before 'init'.

That seems to come from invoking "jtag init", sometime after it
gets mapped to "ocd_jtag init", according to debug message traces.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-03 14:44:03 -08:00
Zachary T Welch de27ebfa83 fix double 'init' regression
To prevent regression in the behavior of 'init', we allow it to run in
any mode.  If provided with -c init and with -c noinit, then the second
init at startup caused a spurious mode failure.  Let 'init' handle it.
2009-12-03 05:28:51 -08:00
Zachary T Welch 23f07d08e3 fix regressions with GDB port numbers
Use a separate variable for iterating GDB service port numbers than
the one set by the user.  Restores the behavior of returning the
original port number and only incrementing the port used on success.
2009-12-03 05:28:51 -08:00