Commit Graph

3 Commits (2b0beed4b18bb7510a677e69821b007cad7d3e16)

Author SHA1 Message Date
Andreas Fritiofson 518ce9e19e cfg: Rename leftover cortex_a8 -> cortex_a
Change-Id: Id11d89ae2fb78854da4284afb7f14d8a892a2e49
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/2197
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2014-07-08 19:33:18 +00:00
Paul Fertser d4e195ad1b Remove jtag_rclk from target configs
Some boards might have RCLK omitted from the JTAG connector and if the
interface claims support for it, OpenOCD will end up trying to use
RCLK while it's actually impossible.

This is a "cd tcl/target; sed -i s/jtag_rclk/adapter_khz/g *" patch.

Change-Id: Iee7337107bc1457966b104389ba9db75a9c860b4
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1695
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
2013-10-29 22:49:35 +00:00
Brad Riensche 02826721d0 Add tcl configurations for Altera Soc devices
This commit adds two tcl configuration files, one for the Altera
Cyclone V SoC series, and one for the SoCkit development board.
The board configuration is able to halt and resume the cpu cores,
and dump register contents etc.  It has not been fully tested, however.

Change-Id: Id3f18c3408975cf986a5f5aec410b5b13240c35e
Signed-off-by: Brad Riensche <brad.riensche@gmail.com>
Reviewed-on: http://openocd.zylin.com/1494
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-08-15 14:50:22 +00:00