Commit Graph

4 Commits (23e22b6ec42c137b48ef6359075a0fe819706f3c)

Author SHA1 Message Date
dbrownell 108028112f Ensure that DaVinci chips can't start with a too-fast JTAG clock.
It can be sped up later, once it's known the PLLs are active.

Note that modern tools from TI all use adaptive clocking; and
that if that's done with OpenOCD, "too fast" is also a non-issue.


git-svn-id: svn://svn.berlios.de/openocd/trunk@2740 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-21 00:37:58 +00:00
oharboe 40f361dd94 David Brownell <david-b@pacbell.net>
Update the board config for the DaVinci DM355 EVM so the reset-init
event handler does the rest of the work it should do:

 - minor PLL setup bugfixes
 - initialize the DDR2 controller
 - probe both NAND banks
 - initialize UART0
 - enable the icache


git-svn-id: svn://svn.berlios.de/openocd/trunk@2699 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-12 08:11:45 +00:00
oharboe 42115c0997 David Brownell <david-b@pacbell.net> Update docs to say that "arm7_9 dbgrq enable" is the default
on ARM9 cores, and update the DaVinci config files so they
no longer explicitly specify it.

git-svn-id: svn://svn.berlios.de/openocd/trunk@2484 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-07-06 21:16:11 +00:00
zwelch dbbc9c41f7 Move TCL script files -- Step 2 of 2:
- Move src/tcl to tcl/.
- Update top Makefile.am to use new path name.


git-svn-id: svn://svn.berlios.de/openocd/trunk@1919 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-05-27 06:49:24 +00:00