Commit Graph

8896 Commits (15f2d35bc6413d89453c64eff39a80dfc52243f5)

Author SHA1 Message Date
Antonio Borneo 1b8091d253 libusb0: return oocd error values
Commit d1b7437633 fixes libusb1 to
return OpenOCD error values instead of negative errors in Linux
kernel's style.
The same fix should be applied to libusb0 too.

Fix return value of libusb0 to uniform it to OpenOCD style.

Change-Id: I68478c29c91c6be720074f58c432fe51477e03ed
Fixes: d1b7437633 ("libusb: return oocd error values")
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4698
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2019-01-08 10:01:48 +00:00
Antonio Borneo 3799eded67 target/aarch64: add support for multi-architecture gdb
GDB can be built for multi-architecture through the command
	./configure --enable-targets=all && make
Such multi-architecture GDB requires the target's architecture to
be selected either manually by the user through the GDB command
"set architecture" or automatically by the target description sent
by the remote target (i.e. OpenOCD).

Commit e65acd889c ("gdb_server: add
support for architecture element") already provides the required
infrastructure to support multi-architecture gdb.

aarch64-linux-gnu-gdb 8.2 uses "aarch64" as default architecture,
but also supports the value "aarch64:ilp32" and all the values
supported by arm-none-eabi-gdb.
These values can be displayed on arm gdb prompt by typing
"set architecture " followed by a TAB for autocompletion.

Set the gdb architecture value for aarch64 target to "aarch64".

Change-Id: I63e9769f47d8e73f048eb84fa73e082dd1c8e52c
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4755
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2019-01-08 10:00:09 +00:00
Antonio Borneo 5c941edc7b target/arm: add support for multi-architecture gdb
GDB can be built for multi-architecture through the command
	./configure --enable-targets=all && make
Such multi-architecture GDB requires the target's architecture to
be selected either manually by the user through the GDB command
"set architecture" or automatically by the target description sent
by the remote target (i.e. OpenOCD).

Commit e65acd889c ("gdb_server: add
support for architecture element") already provides the required
infrastructure to support multi-architecture gdb.

arm-none-eabi-gdb 8.2 uses "arm" as default architecture, but also
supports the following values: "arm_any", "armv2", "armv2a",
"armv3", "armv3m", "armv4", "armv4t", "armv5", "armv5t", "armv5te",
"armv5tej", "armv6", "armv6k", "armv6kz", "armv6-m", "armv6s-m",
"armv6t2", "armv7", "armv7e-m", "armv8-a", "armv8-m.base",
"armv8-m.main", "armv8-r", "ep9312", "iwmmxt", "iwmmxt2", "xscale".
These values can be displayed on arm gdb prompt by typing
"set architecture " followed by a TAB for autocompletion.

Set the gdb architecture value for all arm targets to "arm".

Change-Id: I176cb89878606e1febd546ce26543b3e7849500a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4754
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2019-01-08 09:59:42 +00:00
Antonio Borneo 97afb8b372 target/stm8: add support for multi-architecture gdb
GDB can be built for multi-architecture through the command
	./configure --enable-targets=all && make
Such multi-architecture GDB requires the target's architecture to
be selected either manually by the user through the GDB command
"set architecture" or automatically by the target description sent
by the remote target (i.e. OpenOCD).

Commit e65acd889c ("gdb_server: add
support for architecture element") already provides the required
infrastructure to support multi-architecture gdb.

The gdb patches for stm8 are still not merged in the official
repository and are temporarily hosted in
	https://stm8-binutils-gdb.sourceforge.io/
The latest patch set
	stm8-binutils-gdb-sources-2018-03-04.tar.gz
define only one possible value ("stm8") for this architecture; it
can be displayed typing "set architecture " followed by a TAB for
autocompletion in gdb for stm8.

Set the gdb architecture value for stm8 to "stm8".

Change-Id: I643ceba662de46cecf061d1dc672b9178a077f1b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4753
Tested-by: jenkins
Reviewed-by: Ake Rehnman <ake.rehnman@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2019-01-08 09:58:17 +00:00
Cody P Schafer 49bd64347a armv7m: always set xPSR.T=1 when starting an algorithm
xPSR.T sets the processor to Thumb mode when set to 1. ARMv7-M only
supports execution of Thumb instructions, so it must always be set to 1.

If xPSR.T is set to 0 on armv7m, a usage fault is generated when a
instruction execution is attempted.

On armv7m, issuing a reset causes the vector table to be examined. PC
and xPSR.T  are loaded from the vector table at byte offset 4. xPSR.T is
taken from the least significant bit this value, PC from the remaining
bits.  This occurs even with `reset halt`, as the reset itself causes
this load to occur without the execution of any instructions.

As a result of this, following a reset with a "bad" value programmed in
the vector table, openocd would be unable to run algorithms on the
target, as running them would immediately result in a usage fault due to
xPSR.T being unset (0).

Allow algorithms to run regardless of the content of the vector table by
explicitly setting xPSR so that xPSR.T=1 prior to executing an
algorithm. One can think of this as openocd more closely emulating a
reset or branch instruction in executing it's algorithms.

Ticket: https://sourceforge.net/p/openocd/tickets/203/
Signed-off-by: Cody P Schafer <openocd@codyps.com>
Change-Id: I4dc3427ab195d06c3fd780ea768027fefccc4c28
Reviewed-on: http://openocd.zylin.com/4658
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2019-01-08 09:56:48 +00:00
Edward Fewell 5fd1cb0e5b icepick.cfg: add cancel reset bit to TAP register writes
The Agama family of devices (CC26x2/CC13x2) required an
additional bit to be set when adding the core's TAP into
the scan chain. The cancel reset bit 0x10000 tells the
ICEPick to take the bus out of reset so that the other
bits will take effect. This bit is a NOP on other devices
and ICEPicks, so the change shouldn't adversely affect
other devices.

Change-Id: I9245eef0936ea7eea28ae84ab5e8ce05fa63af40
Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/4789
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2019-01-08 09:51:13 +00:00
Edward Fewell 615a066629 drivers: xds110: Add support for XDS110 stand-alone probe
The XDS110 stand-alone version has the ability to supply
voltage to the target board via it's AUX FUNCTIONS port.
Added command to enable setting the voltage on the XDS110
stand-alone.

Change-Id: I2f21c4a3d15ed99e649f3a83973c5e724c4bfeb6
Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/4793
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2019-01-08 09:49:03 +00:00
Jerome Forissier 9388915dc6 HACKING: add note about refs/for/master
The fact that one needs to always push contributions to a single
remote reference (refs/for/master) might seem odd to people unfamiliar
with Gerrit. GitHub, for instance, hosts personal repositories where
developers typically create topic branches for each contribution and
use a proprietary mecanism to request a review (the "pull request").
More generally, one normally does not expect to be able to push
non-fast-forwarding stuff to a remote branch.

This commit adds a clarifying note to the patch guidelines.

Change-Id: Ia750b815b82b18e92b6109c07f451000dcbecf9b
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-on: http://openocd.zylin.com/4806
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2019-01-08 09:46:04 +00:00
Jerome Forissier a6f5a16705 HACKING: replace refs/publish/master with refs/for/master
refs/publish/master is deprecated and gives a warning in newer Gerrit.
Replace with refs/for/master.

Change-Id: I56871cc6e80c014ba81f4458230cd67dc318ecb3
Suggested-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-on: http://openocd.zylin.com/4810
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2019-01-08 09:45:52 +00:00
Tim Newsome fd49f5e967 Make riscv_get_gdb_reg_list read the registers.
This may not be the correct behavior, but it gets me further through the
tests.

Change-Id: I6e9b77e927700de706b6ece723f4d530fa566761
2019-01-07 12:17:41 -08:00
Tim Newsome 6faa9ded26 Clean up debug printf.
I only need to see 64 bits of PC if the high bits are non-zero.

Change-Id: I29397791da1e3f1705e573b2eaafc3eac202e178
2019-01-07 12:16:51 -08:00
Tim Newsome f9af0b6cca Handler target_get_gdb_reg_list() better.
That function might change from NULL reg_list but then return failure.
In that case reg_list shouldn't be freed.

Change-Id: I5380630c871d056fb52e25bda16836e346bd74b2
2019-01-07 12:15:18 -08:00
Tim Newsome 4bb8bd005c Implement hwthread_get_thread_reg_list.
MulticoreRegTest now gets past the first check on all GPRs.

Change-Id: I35f3c51273542668985f7a86965c1e947fc12194
2019-01-07 08:48:49 -08:00
Tim Newsome a9d436e77f WIP make riscv work with -rtos hwthread.
Change-Id: I37bb16291fa87a83f21e5fd8bad53492a4d69425
2019-01-03 15:06:35 -08:00
Tim Newsome 0736929512 Neuter hwthread_get_thread_reg_list so it builds
Change-Id: I07cf72ea1874ca7cb5557677ecb751c931174419
2019-01-03 12:47:14 -08:00
Rod Boyce b3ed97a492 NOR: lpc2000 Add support for LPC84x devices
These devices differ from LPC8xx devices in that they have a different
IAP entry point, but everything else is the same.  Using Tcl to pass
different IAP entry point.
no new Clang analyser warnings and no new build sanitizers issues.

Change-Id: I2d654dd250f416e74262c0228cad8713a283402f
Signed-off-by: Rod Boyce <developer@teamboyce.co.uk>
Reviewed-on: http://openocd.zylin.com/4684
Reviewed-by: Jean-Christian de Rivaz <jcamdr70@gmail.com>
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-01-02 21:54:03 +00:00
Oleksij Rempel 8f777bc1a6 flash: nor: ath79: remove base calculation
Currently it is impossible to flash ELF with correct offsets. The reason
is a bogus offset calculation extracted from base.
Since any other spi drivers do not care about base, do the same for
ath79 as well.

Change-Id: I9e46e01c9e7a709c2d07da9203c634f302603afd
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/4821
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-01-02 21:53:41 +00:00
Jānis Skujenieks 08e64a828c flash/nor/nrf5: set correct timeout for nvmc operations
Longest erase all FLASH for nRF5 series is 295.3 ms for nRF52832.
Timeout period now is set to 340 ms (295.3 + 15%)

Change-Id: Iae00ed7b634f111b9798db11e35e4e066d4aaa95
Signed-off-by: Jānis Skujenieks <janis.skujenieks@gmail.com>
Reviewed-on: http://openocd.zylin.com/4822
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-01-02 21:52:58 +00:00
Matthias Welwarsky a01b079440 rtos/hwthread: add hardware-thread pseudo rtos
This patch adds "hwthread", a pseudo rtos that represents cpu cores
in an SMP system as threads to gdb. This allows to debug SMP
system kernels in a more sensible manner and removes the current
atrocities of switching gdb manually between CPU cores to update
the context.

Change-Id: Ib781c6c34097689d21d9e02011e4d74a4a742379
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>

Source: http://openocd.zylin.com/#/c/3999
2019-01-02 13:16:13 -08:00
Tim Newsome ccc093ab82 Fix typo.
Change-Id: Ibdd26c5c524b10a3518fe708e9b7fc917b0cb1b6
2019-01-02 12:42:31 -08:00
Tim Newsome afb450af6f
Merge pull request #335 from aka-sps/merge-master-to-riscv
Merge master to riscv
2018-12-31 11:03:10 -08:00
Tarek BOUCHKATI db070eb85d target/arm_cti : export CTI APPPULSE and INACK register
this permits the full control of CTI from config files

Change-Id: Ia27ac8e12e08ec72da05f26dcbd81d24fa1a0f6f
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/4815
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2018-12-27 12:47:47 +00:00
Tarek BOCHKATI d1c7b0ab8a target/arm_cti: add debug message when an incorrect CTI register name is used
the patch also contains some typo fixes

Change-Id: Ia4267036068455144cdcbfdffed15518d48f445e
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/4816
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2018-12-27 12:47:35 +00:00
Jean-Christian de Rivaz 44009186cf command: Log the failed command name
Change-Id: I03938a845110002755636a9514b17a213bf1cc72
Signed-off-by: Jean-Christian de Rivaz <jcamdr70@gmail.com>
Reviewed-on: http://openocd.zylin.com/4808
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2018-12-25 19:01:48 +00:00
Jean-Christian de Rivaz a15c11d7d0 Add LPC8Nxx and NHS3xx support.
Change-Id: I0bdbca8dd9b234aca355230af7269463c9f70bd1
Signed-off-by: Jean-Christian de Rivaz <jcamdr70@gmail.com>
Reviewed-on: http://openocd.zylin.com/4515
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-12-23 15:08:36 +00:00
Simon Qian fdaa8711ae add w600 support
w600 is a wifi soc from winner micro(www.winnermicro.com).

Change-Id: Ib8ccd6e52baefca6547fb97d29db75db0ee73948
Signed-off-by: Simon Qian <versaloon@simonqian.com>
Reviewed-on: http://openocd.zylin.com/4801
Tested-by: jenkins
Reviewed-by: yichen <wdyichen@wdyichen.cn>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-12-21 07:11:19 +00:00
Tomas Vanek 463257903e flash/nor/spi: add adesto AT25DF081A
8Mbit SPI flash on SAM D21 Xplained board

Change-Id: Iec087f5d889c1cbdd4fed90863e73511f6101cec
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4802
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2018-12-19 13:16:45 +00:00
Tomas Vanek 270725f8ad target: allow moving and resizing working area on running target
target configure -work-area-xxx calls target_free_all_working_areas()
and sets the desired new parameter. Without this change the working area
does not get reallocated if it has been allocated before.
target_free_all_working_areas() results in work area containing one block
marked as free.

Completely free working area in target_free_all_working_areas()

Change-Id: I79c681082f32f2a96a2b40eb3b8751e427549693
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4797
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2018-12-19 13:16:25 +00:00
Tomas Vanek 71eeda5da1 target: move all working_area functions to one block
The block of code moved without any changes

Change-Id: I70b82dc3315dcc3f34de0537b362bee230007d02
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4796
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2018-12-19 13:16:03 +00:00
Tomas Vanek 936dc7cbd9 target/cortex_m: fix cortex_m reset_config help and check for syntax error
Remove option 'srst' which is not recognized from on-line help and texi.
Check parameter and return syntax error if wrong option is entered.

Change-Id: I87daa423a9f53193a0b015080594820b933628f5
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4795
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2018-12-19 13:14:27 +00:00
Tomas Vanek cb5c6477f5 target/cortex_m: do not use VECTRESET on Cortex-M0, M0+ and M1
Cortex-M0, M0+ and M1 do not support VECTRESET bit in AIRCR.
Without this change the 'reset' command silently fails if VECTRESET
is requested.

Detect these cores, show warning if VECTRESET is about to use
and use SYSRESETREQ instead.

Change-Id: Ief174373e3ef0e6b287c57911c0aca4dfa8209f2
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4794
Tested-by: jenkins
Reviewed-by: Jean-Christian de Rivaz <jcamdr70@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2018-12-19 13:14:09 +00:00
Liming Sun 651998e337 target: armv8: Add TARGET_HALTED check for gdb connect
This commit adds TARGET_HALTED check in armv8_get_core_reg32()
and armv8_set_core_reg32() to void a crash issue when gdb connects
but fails to halt the ARM core. Similar logic can be found in
armv8_get_core_reg() and armv8_set_core_reg().

Below is the call stack information of this case when gdb connects.

(gdb) bt
    regnum=regnum@entry=0, dpm=0x990110) at src/target/armv8_dpm.c:657
    r=0x9c7240, regnum=0, mode=<optimized out>) at src/target/armv8_dpm.c:974
    at src/target/armv8.c:1487
    packet=0x8ec8e0 <gdb_packet_buffer.9962> "g",
    packet_size=<optimized out>, connection=<optimized out>)
    at src/server/gdb_server.c:1200
    at src/server/gdb_server.c:3180
    command_context=command_context@entry=0x935010)
    at src/server/server.c:566
...

Change-Id: I159837b533f110998184f910a0abe48409bd58f1
Signed-off-by: Liming Sun <lsun@mellanox.com>
Reviewed-on: http://openocd.zylin.com/4758
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-12-18 13:23:07 +00:00
Antonio Borneo bff87a7f28 target/cortex_a: enable DSCR_HALT_DBG_MODE during examine
Arm architecture reference manual DDI0406C reports at page 2024 in
table C3-1 the processor behaviour on debug events depending on
the debug-mode (none, monitor or halt), mode selected through the
bits MDBGen and HDBGen in DSCR register.

The halt request is served independently from the debug-mode. Thus
it's useless to enable the halt debug-mode in cortex_a_halt() by
setting the bit HDBGen (macro DSCR_HALT_DBG_MODE).

On the other side, halting for a breakpoint, a watchpoint or a
vector catch requires being in halt debug-mode.
Today HDBGen is set only in cortex_a_halt(), so we are forced to
halt the core at least once before it can be halted for hitting a
breakpoint/watchpoint/vector-catch. This is annoying since there
is no need to halt the target to set a HW breakpoint.

Move in cortex_a_init_debug_access() the selection of the halt
debug-mode, so the mode is set during examine.
To prevent a misconfigured hardware breakpoint/watchpoint/vector
catch to halt the target when OpenOCD has already quit, return to
debug-mode none at OpenOCD exit.

Change-Id: I68a1c51de3572ca1b89e90caf7eb20374268e926
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4783
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-12-18 13:22:55 +00:00
YanLin Zhu 322d2fa12c adi_v5_jtag: fix build break when open DEBUG_WAIT macro
DEBUG_WAIT is useful to debug adi_jtag issue,
and the WCR register is replaced by DLCR for DP registers update
in commit 150b7d26f2.

Change-Id: I3faa9ea8a6adacd3d5275e40382801da731db32f
Signed-off-by: YanLin Zhu <zhuyanlin@pinecone.net>
Reviewed-on: http://openocd.zylin.com/4804
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Christopher Head <chead@zaber.com>
2018-12-17 10:02:15 +00:00
Antonio Borneo 334552bc83 helper/startup.tcl: fix execution stack frame of wrapped commands
The OpenOCD commands that have been wrapped with 'ocd_bouncer' are
executed within two levels of nested proc's:
	# see register_command_handler() in src/helper/command.c
	proc my_command {args} {eval ocd_bouncer my_command $args}

	# see ocd_bouncer in src/helper/startup.tcl
	proc ocd_bouncer {name args} {
		... [eval ocd_my_command $args] ...
	}
This causes the stack frame of 'ocd_my_command' to be the same one
of proc 'ocd_bouncer', thus two levels below the stack frame of the
caller of 'my_command'. This is an issue with commands that receive
a variable by name and have to resolve them to access the value.

E.g. the command
	<target> mem2array arrayname bitwidth address count
is wrapped; it receives the name of the array but fails to resolve
it in the current stack frame. Instead, the commands
	mem2array arrayname bitwidth address count
	ocd_<target> mem2array arrayname bitwidth address count
are not wrapped and can directly access the array because they share
the same stack frame of the caller.
Same situation with the symmetric commands 'array2mem'.

How to test:
within a telnet connection, run the following set of commands,
eventually replacing the address 0x08000000 with a valid readable
address of your <target>,
	unset -nocomplain v1 v2 v3
	info vars v?
	mem2array v1 32 0x08000000 1
	<target> mem2array v2 32 0x08000000 1
	ocd_<target> mem2array v3 32 0x08000000 1
	info vars v?
and notice that only v1 and v3 are now allocated. The array v2 has
been allocated in the temporarily stack frame of proc ocd_bouncer,
together with its local variables, and then lost when proc ended.

Fixed by executing the wrapped commands with the command 'uplevel'
instead of 'eval'. The amount of levels to skip is checked to avoid
errors in the unusual case 'ocd_bouncer' is called directly without
the first level of wrapper.

Change-Id: Iff90fb8921faf9b5ab04f61062a530578cc20d78
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4731
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-12-15 07:18:13 +00:00
Tim Newsome d6a6699f15 Fix block read corner cases.
Change-Id: I841f264ca881078075beaa58023dd0e0a81f3ff3
2018-12-13 12:05:55 -08:00
Bohdan Tymkiv 02279e2f5e flash/nor/core: Fix chunk size calculation in default_flash_mem_blank_check
Slow version of blank check procedure reads target memory sector-by-sector
using 1 KB chunks. Due to bug in chunk size calculation algorithm the actual
size of the chunk is always 1 KB even if sector size is smaller.
This causes out-of-boundary read of the last sector.

Steps to reproduce:
1) Use target with small sectors (e.g. psoc6 with 512-byte sectors)
2) set WORKAREASIZE_CM0 0
3) flash erase_check 1

Running slow fallback erase check - add working memory
Info : SWD DPIDR 0x6ba02477
Error: Failed to read memory at 0x14008000
unknown error when checking erase state of flash bank #1 at 0x14000000
	Bank is erased

Change-Id: I03d0d5fb3a1950ae6aac425f5e24c7fd94b38325
Signed-off-by: Bohdan Tymkiv <bhdt@cypress.com>
Reviewed-on: http://openocd.zylin.com/4785
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2018-12-12 18:13:00 +00:00
Steven Stallion f197483f57 flash/esirisc: refactor register write protection
This patch removes use of register write protection in protect() and
protect_check() now that Change 4765 has merged.

Change-Id: I42c429dc283c5b53989a6b98ebfc58214274ff16
Signed-off-by: Steven Stallion <stallion@squareup.com>
Reviewed-on: http://openocd.zylin.com/4791
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-12-12 08:48:11 +00:00
Steven Stallion c5eb990825 esirisc: support eSi-Trace
This patch adds support for instruction tracing to eSi-RISC targets. The
command interface is borrowed heavily from ETM; eSi-Trace uses a less
sophisticated model for tracing, however the setup and usage is similar.
This patch also cleans up the command interfaces of the other esirisc
command groups and adds additional debugging information to log messages
when dealing with CSRs.

This patch "finalizes" support for 32-bit eSi-RISC targets.

Change-Id: Ia2a9de79a3c7c066240b5212721fb1b7584a9a45
Signed-off-by: Steven Stallion <stallion@squareup.com>
Reviewed-on: http://openocd.zylin.com/4780
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-12-12 08:47:44 +00:00
Jiri Kastner 7ae6b04b98 fix cc32xx related changes
original CC3200 launchpad works only with ti-icdi driver
which stopped to work after merging to master commit
d02de3a8a9

Change-Id: I247b5d99831fa744de1fdc5b8a7cffdf49fe953c
Signed-off-by: Jiri Kastner <cz172638@gmail.com>
Reviewed-on: http://openocd.zylin.com/4792
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2018-12-12 08:47:18 +00:00
Antonio Borneo 8b66c96974 armv7a_mmu: s/LOG_ERROR/LOG_WARNING/ on address translation failure
When GDB analyses the status of the target it try to guess the
current stack frame and issues few memory read.
E.g. on ARM targets GDB uses R11 value as a potential frame-pointer
and reads at the address pointed by R11.
The address of such memory read is not always valid and can trigger
an address translation failure.

Replace LOG_ERROR with LOG_WARNING in case the virtual address does
not have a hit in TTB; print the virtual address in the warning
message and discriminate the two identical messages with [1]/[2].

Change-Id: I288b8cd26bec2543c4f1c16b7c06dc47d5d843d1
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4602
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2018-12-12 08:47:01 +00:00
Antonio Borneo ff5d13a5f8 libusb0: add compatibility define for transfer type bulk
For compatibility with libusb1, define LIBUSB_TRANSFER_TYPE_BULK
in libusb0.
Remove the #ifdef HAVE_LIBUSB1 in jtag/driver/aice

This also fixes a compile error in jtag/drivers/openjtag with
libusb0.

Change-Id: I827b77eac10216759eb31aab461b2b63cabaf195
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4700
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2018-12-11 13:29:21 +00:00
bob 077d454157 flash/nor: Add support for sector erase in stm32l4x.c for L4+ family
Updates support for L4+ device id: 0x470 added by #4310
Extends #4641 to account for L4+ use of multiple DBANK option bits
Enables L4+ 1M and 2M devices to be programmed using sector erase

Change-Id: I42bb379d7d97986f4506423e3da503d07c787c6b
Signed-off-by: bob <rea952@gmail.com>
Reviewed-on: http://openocd.zylin.com/4777
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-12-11 13:27:49 +00:00
Edward Fewell cbe00ef688 flash/nor: update cc3220sf for issue found in code review
Remove inappropriate use of bank_number.

Change-Id: I11be1f2540cb09a3ccede35312f90bc8276af338
Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/4788
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-12-11 13:27:29 +00:00
Edward Fewell f56e28b2c8 flash/nor: update CC26xx/CC13xx support
Added fixes found in additional code reviews.

Remove inappropriate use of bank_number field and updated
documentation to reflect the change.

Restored functionality to cc2538.cfg file because previous
change removed the cc26xx.cfg file because the flash support
changes made it obsolete. Rolled the previous cc26xx.cfg
file into cc2538.cfg and updated it to work with other
recent changes.  Tested using a SmartRF06 Evaluation
board with embedded XDS100v3 and external XDs110.

Change-Id: Ia19d00cf8055c5c0f1acc53aa23fd06a80fd2ebc
Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/4787
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-12-11 13:27:17 +00:00
Reto Schneider a50964246d jtag: sysfsgpio: clean up swd gpios
All SWD GPIOs should be un-exported when no longer needed, not just
srst.

Change-Id: I998377afe43b72446cab3da2d4406fc2912ff8c3
Signed-off-by: Reto Schneider <code@reto-schneider.ch>
Reviewed-on: http://openocd.zylin.com/4784
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-12-11 13:26:22 +00:00
Antonio Borneo 8f47a09cc5 helper/log: remove dead code in log_forward()
Commit f1be0e6af2 ("HELPER/LOG:
review unused symbols") removed a set of unused functions and,
as consequence, there is no code anymore that sets the variable
"log_forward_count". But, the commit above did not removed the
code (now dead) that depends on "log_forward_count" set.

Remove the code dependant on "log_forward_count" set and the
variable itself.

Change-Id: I6efe93d1dccbe13c409c5bc55ba47a2684c0e3ac
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4779
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2018-12-11 13:26:05 +00:00
Tomas Vanek d5f82eea3d jtag: cmsis-dap: developer tool - enter a command by hex nuber
Handy to test vendor commands in a CMSIS-DAP adapter.

Change-Id: Ieeaa276edf770b1a3076a186e9056b4e5180362a
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3103
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2018-12-11 13:24:55 +00:00
Spencer Oliver 68f09deb4f doc: add ARMv6-M info regarding TAP Declaration
Change-Id: I89095fd0c830fdc2ce40e5d23f8af98502b0ff50
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/4782
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2018-12-06 13:08:35 +00:00
Antonio Borneo 32aec3b5c8 doc: fix some typo about STMicroelectronics name
s/ST/STMicroelectronics/
s/ST Micro/STMicroelectronics/
s/ST Microelectronics/STMicroelectronics/

Change-Id: I62aef331d172db22a70841a089c1889e37997cde
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4718
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2018-12-06 13:07:06 +00:00