Most Xilinx FPGA devices contain an embedded, unique device identifier
called the "Device DNA". The identifier is nonvolatile, permanently
programmed into the FPGA, and is unchangeable providing a great serial
/ tracking number.
Debugging was done in https://github.com/timvideos/HDMI2USB/issues/36
Change-Id: Iad03eafb40887f0321a4dc22858a7c3bf37a12b3
Signed-off-by: Tim 'mithro' Ansell <mithro@mithis.com>
Reviewed-on: http://openocd.zylin.com/2960
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Another board supported by the ixo-usb-jtag project.
Change-Id: I676197c64e208886bc03d1bafcc964ef1fc2160b
Signed-off-by: Tim 'mithro' Ansell <mithro@mithis.com>
Reviewed-on: http://openocd.zylin.com/2963
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
The board is supported via the ixo-usb-jtag firmware.
Change-Id: I1e8a5ead850c0843b8532a5b54a7e7117778278e
Signed-off-by: Tim 'mithro' Ansell <mithro@mithis.com>
Reviewed-on: http://openocd.zylin.com/2962
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Also add further documentation about the project and how to use it.
Change-Id: Ia9878de566b3c8c1ea29f129287d5aea904d861d
Signed-off-by: Tim 'mithro' Ansell <mithro@mithis.com>
Reviewed-on: http://openocd.zylin.com/2961
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Flash driver "mini51.c" and "nuc1x.c" are same target MCU.
This patch integrates each driver and functions,
and makes into new "NuMicro" flash driver.
Change-Id: Ifff5c1cfdd265acca0f489631695be9194fa144c
Signed-off-by: Nemui Trinomius <nemuisan_kawausogasuki@live.jp>
Reviewed-on: http://openocd.zylin.com/2794
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
A target config and a simple flash driver for the ADuCM360 microcontroller.
The EEPROM of the chip may be erased and programmed.
Change-Id: Ic2bc2f91ec5b6f72e3976dbe18071f461fe503b8
Signed-off-by: Ivan Buliev <i.buliev@mikrosistemi.com>
Reviewed-on: http://openocd.zylin.com/2787
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: jenkins
Tested with Porcupine-1 JTAG adapter board and Digilent JTAG-HS3 interface;
reset does not yet work, pending nSRST configuration of the interface used.
Change-Id: I0d0679e098d93ffbd1539004cdb900e2a8ae4a25
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/2730
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
As found on the Parallella-I board SKU A101020.
Change-Id: Ie7e7a36325926d67fbe555b46a9be8a74fac8dba
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/2729
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Derived from tcl/interface/digilent-hs1.cfg.
JTAG-HS3 has an open drain buffer on pin 14 for SRST to work with
PS_SRST_B on Xilinx Zynq SoC.
Change-Id: I1e9e72d0511528a61207e318aff937ae9fad5bf9
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/2728
Tested-by: jenkins
Reviewed-by: Robert Jordens <jordens@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Added support for SWD transport similar to sysfsgpio driver.
Added configurable peripheral base address to support Raspberry Pi 2.
Change-Id: If76d45fbe74ce49f1f22af72e5f246e973237e04
Signed-off-by: Christoph Pittracher <pitt@segfault.info>
Reviewed-on: http://openocd.zylin.com/2802
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Add the chip IDs corresponding to the new 5V "SAMC" parts which are
otherwise identical to the SAMD and should work with this driver. Also
add the configurations for their Xplained Pro boards.
Change-Id: Ic268d4ac384a3a77d4211a94da9f9faf4d8c0f7b
Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-on: http://openocd.zylin.com/2809
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The Pipistrello is a low cost FPGA board with a Xilinx
Spartan6 LX45, a SPI flash and onboard FTDI JTAG.
This board is a good example use case for the jtagspi
flash driver talking through a proxy bitstream.
Change-Id: I04a80610ff825c36ebcb67b879507028eed141ad
Signed-off-by: Robert Jordens <jordens@gmail.com>
Reviewed-on: http://openocd.zylin.com/2846
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Many FPGA board speak JTAG and have a SPI flash for their bitstream
attached to them. The SPI flash is programmed by first uploading a
proxy bitstream to the FPGA that connects the JTAG interface to the
SPI interface if the IR contains a certain USER instruction. Then the
SPI flash can be erase, written, read directly through the JTAG DR.
The JTAG and SPI signaling is compatible. Such a proxy bitstream only
needs to connect TDO-MISO, TDI-MOSI, TCK-CLK, and the activate the
chip select when the IR contains the special instruction and the JTAG
state machine is in the DR-SHIFT state.
Change-Id: Ibc21d793a83b36fa37e2704966aa5c837c4dd0d2
Signed-off-by: Robert Jordens <jordens@gmail.com>
Reviewed-on: http://openocd.zylin.com/2844
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This covers only the Cortex-A5 for now, not the Cortex-M4.
Change-Id: I739ec52b14b83d6e9f124ed61f8941502e481402
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/2766
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
code polishing to be consistent with other scripts
Change-Id: Ib52a92f48df9d2bdf543792b856e33aa04dbebe3
Signed-off-by: Radek Dostal <radek.dostal@streamunlimited.com>
Reviewed-on: http://openocd.zylin.com/2779
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reset stopped working with this setting.
Change-Id: I98e8fafa48e0ab65dce8110870be422edf7b2fdb
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/2727
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Split TMS570 target into LS31/LS21 and LS20/LS10 targets.
Board for the TMS570LS20SUSB Kit, which uses the TMS570 Cortex-R4 MCU from TI.
Tested attaching.
Change-Id: I1a69ac1ed800d0d6b7f9860c19cbd149e3e47620
Signed-off-by: Alex Ray <a@machinaut.com>
Reviewed-on: http://openocd.zylin.com/2089
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
This adds support for the new Atmel SAML21 family of low-power Cortex
M0+ devices. Their Flash controller is essentially the SAMDxx one so
the change consists of adding the new part IDs. Unfortunately the
device ID logic had a couple of mistakes in it that did not affect
anything on SAMD2x devices (due to 0 values expected there) but that is
a problem on L21, it's therefore addressed here and things should now
match the datasheets.
Tested on Amtel SAML21 Xplained Pro development kit against the included
SAML21J18A there. Also tested for regressions on a SAMD20 and SAMD21
using their dev kits.
Change-Id: I768f75e064b8656c15148730dacaa4c3acfc4101
Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-on: http://openocd.zylin.com/2690
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Use mmw to manipulate only selected bits of the word. msb and mwb verify the
memory location and may error on PLLRDY set as a result of PLLON written.
Change-Id: I9a4c1e58f002a1e5e99be1bd34aac27ba65d111d
Reported-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2702
Tested-by: jenkins
GP and EPOS EVMs do not provide xds100v2 on board,
rather they have a pin header which can be used
to attach any debug pod the user might want.
Change-Id: I61678c50900fbe0fab500ea42f85ecde7a490ded
Reported-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Reviewed-on: http://openocd.zylin.com/2618
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
This is a remake of http://openocd.zylin.com/1966
originally written by Angus Gratton <gus@projectgus.com>
ATSAM4L has a "System Manager Access Port" (SMAP) that holds the CPU
in reset if TCK is low when srst (RESET_N) is deasserted.
Without this change any use of sysresetreq or srst locks the chip
in reset state until power is cycled.
A new function smap_reset_deassert is called as reset-deassert-post event handler.
It optionally prepares reset vector catch and SMAP reset is released then.
Change-Id: Iad736357b0f551725befa2b9e00f3bc54504f3d8
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/2604
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Also some hints around deprecated tcl/interface/turtelizer2.cfg added.
Change-Id: Ifa57b49febffaeddd5d8ff0a48833d3544927b10
Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Reviewed-on: http://openocd.zylin.com/2584
Tested-by: jenkins
Reviewed-by: Harald Kipp
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Works best after update to firmware v2.3.
Change-Id: Id2d3a0ae28bba014ee5338df9280fe39773c3398
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/2570
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Assembled by trial-and-error for an S6E2CC.
Change-Id: I317c12d24c9075ce3de286455fa3ee45731c5c81
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/2569
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Original submitted code had only been tested with em358, but testing with
actual em357 revealed errors that this patch corrects.
Change-Id: I70cf31210de8ed84e3755a56e76261ad200322bb
Signed-off-by: Ed Beroset <beroset@ieee.org>
Reviewed-on: http://openocd.zylin.com/2581
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
When using ppdev driver 0 is the most appropriate default value as it
corresponds to /dev/parport0. Raw port address is suitable only for
direct access (I think that's parport-giveio on windows).
Reported by danitool on IRC.
Change-Id: I983c22251de6601b433ad31aaf660fb664cee7e9
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2572
Reviewed-by: Andreas Färber <afaerber@suse.de>
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested with "J-Link Lite-XMC4000 Rev.1 compiled Dec 7 2012 19:23:07"
on XMC4500 Relax Lite Kit V1.
Change-Id: Ib680a444fa4cadbf640afba15d607c0e6bd4ab2c
Signed-off-by: Jeff Ciesielski <jeffciesielski@gmail.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/2567
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Base config, verified against XMC4500, XMC4400 and XMC4100/XMC4200 manuals.
Change-Id: I10907bdf307bc6d11dc5454bf5391758de49dc30
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/2480
Tested-by: jenkins
Reviewed-by: Jeff Ciesielski <jeffciesielski@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
this is just to avoid open coding that in
icepick_d_tapenable. Cleanup only, no functional
changes.
Change-Id: Iabd20291b7bdd95957afa1c74f52171789201227
Signed-off-by: Felipe Balbi <balbi@ti.com>
Reviewed-on: http://openocd.zylin.com/2624
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
it also works on icepick_d.
Change-Id: I50c0c81286aae673c94ea77e47454ff48eab1668
Signed-off-by: Felipe Balbi <balbi@ti.com>
Reviewed-on: http://openocd.zylin.com/2623
Tested-by: jenkins
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Reusing what's already there to ease maintainability.
Change-Id: I2030581669c644e2d9d9f9968075ab6344445d04
Signed-off-by: Felipe Balbi <balbi@ti.com>
Reviewed-on: http://openocd.zylin.com/2622
Tested-by: jenkins
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
This commit is only for the sake of completeness as
default coreid is zero. In any case, coreids 1-4 are
used for the different PRU cores inside the SoC.
Change-Id: I775f2f444b1a908ffaf7bdbc43bcc966f19668c4
Signed-off-by: Felipe Balbi <balbi@ti.com>
Reviewed-on: http://openocd.zylin.com/2621
Tested-by: jenkins
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Use more descriptive names for JRC and DAPs
so they more closely match documentation.
For example there's no Cortex A9 DAP, that's
the DebugSS DAP where Cortex A9 target sits. In
that same DAP we have have ETM, STM and both
dual-PRU subsystems.
Change-Id: I0e66ebb6299763f96606fae3e4c62e5785c804f2
Signed-off-by: Felipe Balbi <balbi@ti.com>
Reviewed-on: http://openocd.zylin.com/2620
Tested-by: jenkins
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Main DAP (where Cortex A9 sits) ID is actually
0x46b6902f. Fix it.
Change-Id: Ifa3335186bcf60d264d4ecea477bfe2f5ca10ead
Signed-off-by: Felipe Balbi <balbi@ti.com>
Reviewed-on: http://openocd.zylin.com/2619
Tested-by: jenkins
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Add support for Texas Instruments AM437x
Industrial Development Kit support.
Change-Id: I33ed71c7392c3805a86cf2c8adce83c0e8aa323d
Tested-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Reviewed-on: http://openocd.zylin.com/2617
Tested-by: jenkins
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
this event handler will configure and lock PLLs
and configure DDR so platform is placed in usable
state.
Change-Id: Idd02f4c9789181d69578f8606ac3576ea1dd8a0b
Tested-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Reviewed-on: http://openocd.zylin.com/2616
Tested-by: jenkins
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
sometimes, watchdog might be left running and
it could expire in the middle of a debug session,
to prevent that, just make sure to disable watchdog
on reset-end if current state is 'halted'.
Change-Id: Ib4f2a2321cba17cd8c56ca3ae63114a563a6de90
Tested-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Reviewed-on: http://openocd.zylin.com/2615
Tested-by: jenkins
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
a later commit will implement a proper reset-init
handler to lock pll and configure ddr as we should.
Change-Id: I432cf28a5a944bfa83c20aed7298dbd29df30e38
Tested-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Reviewed-on: http://openocd.zylin.com/2614
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
xds100v2 asks us to call these three commands to
guarantee proper behavior, so do it.
Change-Id: Iecf9c148ce7c2082ef915b46eeb511ceea395cc3
Signed-off-by: Felipe Balbi <balbi@ti.com>
Reviewed-on: http://openocd.zylin.com/2613
Tested-by: jenkins
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
default already is jtag, but this silences a
warning during startup.
Change-Id: I94478327bbb259649500ef74a5b5c10d51e2a517
Signed-off-by: Felipe Balbi <balbi@ti.com>
Reviewed-on: http://openocd.zylin.com/2612
Tested-by: jenkins
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
According to AM4379 TRM [1], table 2-1 L3 Memory Map,
we have a total of 256KiB and there's no reason not to
use it all.
[1] http://www.ti.com/lit/ug/spruhl7b/spruhl7b.pdf
Change-Id: I117f2afe721bc4e3f0df304d3542e1a91aa69d12
Signed-off-by: Felipe Balbi <balbi@ti.com>
Reviewed-on: http://openocd.zylin.com/2611
Tested-by: jenkins
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Since commit ec9ccaa288 (arm_adi_v5: make dap_lookup_cs_component()
traverse subtables and handle multicore) AM437x devices can't be used
with OpenOCD anymore. The reason is that dbgbase used to be set to zero
before that commit and that just happens to work with AM437x devices.
A more robust solution is to pass correct dbgbase when creating the
target, which this commit does.
Signed-off-by: Felipe Balbi <balbi@ti.com>
Change-Id: Iaf2617804324de8094b25137943e08b84f14c75f
Reviewed-on: http://openocd.zylin.com/2602
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
This should allow most of the existing configurations for older
versions to remain compatible without forcing the user to change his
or her config to explicitly select transport.
Also in some circumstances can remove the need to chain a "-c transport
select X" when building custom configs on the command line, which seems
like a common new user pitfall.
Change-Id: Ic87a38c0b9b88e88fb6d106385efce2f39381d3d
Suggested-by: Petteri Aimonen <jpa@git.mail.kapsi.fi>
Signed-off-by: Angus Gratton <gus@projectgus.com>
Reviewed-on: http://openocd.zylin.com/2551
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Valgrind-tested.
Comparison of flashing performance on an FRDM-KL25Z board running mbed
CMSIS-DAP variant, 5MHz clock, old driver:
wrote 28096 bytes from file demo.elf in 26.833590s (1.023 KiB/s)
verified 27264 bytes in 1.754972s (15.171 KiB/s)
this implementation:
wrote 28096 bytes from file demo.elf in 3.691939s (7.432 KiB/s)
verified 27264 bytes in 0.598987s (44.450 KiB/s)
Also tested "Keil ULINK-ME CMSIS-DAP" with an STM32F100 target, 5MHz
clock, results reading from flash, old driver:
dumped 131072 bytes in 98.445305s (1.300 KiB/s)
this implementation:
dumped 131072 bytes in 8.242686s (15.529 KiB/s)
Change-Id: Ic64d3124b1d6cd9dd1016445bb627c71e189ae95
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2356
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Since the very first flash bank is already defined in target/kx.cfg,
there's no sense in repeating it.
Reported and tested by Richard Braun.
Change-Id: I417b7072b5e6675ddbf824446e7581b8b7da8f4b
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2595
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This provides support for various trace-related subsystems in a
generic and expandable way.
Change-Id: I3a27fa7b8cfb111753088bb8c3d760dd12d1395f
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2538
Tested-by: jenkins
Keep clocks running in low power modes. Stop watchdogs from interfering
with the debug session. Set up PLL and increase clock at reset init.
Change-Id: I984d2018f7d47a1042f1e12894563154fa7b566c
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/2196
Tested-by: jenkins
Reviewed-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
The signal names are changed for consistency with TI's docs and
sources.
Change-Id: Ic5c5314daa20f6f610be8a848399f951d47aa137
Signed-off-by: Matthijs van Duin <matthijs@rinnic-vaude.nl>
Reviewed-on: http://openocd.zylin.com/2231
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Initial Support for AT91SAM7A2 on Olimex SAM7-LA2 board.
The board seems not to be able to reset into halted mode, as srst is
connected to NRESET of the cpu (configured srst_pulls_trst).
JTAG RCLK is connected to CLK.
Tested with interface/ftdi/olimex-arm-usb-ocd-h.cfg.
Change-Id: I2bdd67e3683e45f1119c5850bad294aa107891d8
Signed-off-by: Arne Wichmann <arne.wichmann@gmail.com>
Reviewed-on: http://openocd.zylin.com/2318
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
The F334 disco board has a stlink V.2-1 as F3 nucleo boards. Normal F3 disco
boards use stlink v2 and can't ne used.
Change-Id: I77ebef93b184592f25ff18bb2da776d636f60ff0
Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Reviewed-on: http://openocd.zylin.com/2434
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
This adds configs for Alphascale asm9260t ARM based SoC and
Evaluation Kit based on this chip.
Change-Id: Id8d3a1ef204e3ae84540c2693e3d62650ba82f73
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/2515
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
The flash definition belongs in the target cfg. Add some working area
and suitable reset_config.
Make kx.cfg more similar to klx.cfg.
Disable rclk as it is dead slow and a fixed 1MHz clock seems to work.
Change-Id: I8328f179c3a33be64403da93616abb48651bdfe6
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/2227
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Configure the LED to be off by default, blink on activity.
Change-Id: I8515ee66c49bddf866268b85811be15c2dbc086c
Signed-off-by: Anton Kuzmin <anton.kuzmin@cs.fau.de>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2539
Tested-by: jenkins
This is a new driver for Silicon Laboratories SiM3 microcontroller
family, based on the work of Ladislav Bábel. The driver will try to
detect the type of MCU from the device id register, and if this
fails it will use the flash size from the flash bank command.
Driver added to the documentation and to the README.
TCL script added.
Tests:
* Hardware: SiM3C166 (pre-production) and SiM3U167
* Binary: 4kb, 197kb, 256kb
* Flash protect not tested
Change-Id: I701e0cf505ca8ad99be7f83543fe5055b2f65dcc
Signed-off-by: Andreas Bomholtz <andreas@seluxit.com>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2078
Tested-by: jenkins
Add serial option to jlink config commands, handy when there is more than one
adapter connected.
To select adapter 0123456 for OpenOCD, use
jlink serial 0123456
Change-Id: Ib29ce3f0c4975e1169211721a4531bf4db61f1ee
Signed-off-by: Joerg Fischer <turboj@gmx.de>
Reviewed-on: http://openocd.zylin.com/2521
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
This adds the board to the list of supported devices for the easy
recovery procedure. Only ram_boot is supported for this target.
Change-Id: I144e1836f8b6257e96a42c98c2668da74ce243f6
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/2520
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: jenkins
Reviewed-by: Andreas Färber <afaerber@suse.de>
Add configs for Atheros ar9331 MIPS based WiSoC and
board based on this chip: TP-LINK TL-MR3020
Change-Id: I9e99719bce4bbb28311f6e9cddb32288db6e7b91
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/2519
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
adds flash support for Nuvoton M052, M054, M058, M0516 microcontrollers
into the mini51 driver, patch also adds support for programing LDROM,
flash data and flash config.
I've tested it on a M0516LBN microcontroller using an ST-LINK/V2:
1. removing security lock:
openocd -f interface/stlink-v2.cfg -f target/m051.cfg -c "init ; halt ; mini51 chip_erase; exit"
2. flashing:
openocd -f interface/stlink-v2.cfg -f target/m051.cfg -c "program file.hex"
Change-Id: I918bfbb42461279c216fb9c22272d77501a2f202
Signed-off-by: Pawel Si <stawel+openocd@gmail.com>
Reviewed-on: http://openocd.zylin.com/2426
Tested-by: jenkins
Reviewed-by: Nemui Trinomius <nemuisan_kawausogasuki@live.jp>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Added support for the Cortex-M3 based TI low power RF SoC CC2538 and
the CC26xx family.
These chips need a start sequence for switching from cJTAG to JTAG
before being used with OpenOCD, this is done in the tcl proc
ti_cjtag_to_4pin_jtag in the ti-cjtag.cfg config.
The configs for CC2538 and CC26xx run the start sequence on post-reset
event and set the ICEPick IDCODE in the data register for OpenOCD to
read, this is done so that every time OpenOCD resets the device, it
will enable JTAG.
Change-Id: I7db620211c0e7e03fad59d24fe31d23a9cdcfedc
Signed-off-by: Jacob Palsson <jaaacke@gmail.com>
Reviewed-on: http://openocd.zylin.com/2232
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
This patch adds support for Silicon Labs (formerly Ember) EM357
and EM358 chips and derivatives.
Change-Id: Ie63aed95a2f4ef1a6b955e301a51b4de1b3a5462
Signed-off-by: Ed Beroset <beroset@ieee.org>
Reviewed-on: http://openocd.zylin.com/2470
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
New NOR flash driver was derived from stm32lx.
Procedure ocd_process_reset_inner is overriden in psoc4.cfg
to handle reset halt and system ROM peculiarities.
Change-Id: Ib835324412d106ad749e1351a8e18e6be34ca500
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/2282
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
This adds a trivial config for LPC8xx chips based on the already
existing infrastructure in lpc1xxx.cfg.
Change-Id: I7384df1f3c2e3e8ab767319728db5c4f8149480f
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2464
Tested-by: jenkins
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Nemui Trinomius <nemuisan_kawausogasuki@live.jp>
Added support for the ST nucleo l152re board with a stm32l152ret6 MCU,
analog to st_nucleo_f* configurations.
Change-Id: Id2c61dc7a7cb2e1cc64442191b367bab4247bdeb
Signed-off-by: Thomas Eichinger <eicht@lepus.uberspace.de>
Reviewed-on: http://openocd.zylin.com/2489
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
It depends on the particular target whether it can work with SRST
asserted or not, so this belongs to the target config rather than the
board config.
Also, this allows for simple
openocd -f myboard.cfg -c "reset_config connect_assert_srst"
command to be used whenever a user feels a need to connect to an
unresponsive target.
Change-Id: I3d8da9ae47088fc0c75a20bfdd20074be1014de0
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2459
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
So remove it from all the configs, it's misleading, and leads to cargo
culting of config files.
Change-Id: I2b77e60d5e96f9759c7c9fc91b20e73be2e95d9a
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2446
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This is an integrated adapter used on the IoT-LAB boards.
Schematics are available from
https://github.com/iot-lab/iot-lab/wiki/Docs/openm3-schematics.pdf
Change-Id: I1c80e72653c3f319bb04d01e3dfddb1c2447c398
Tested-by: Quentin Lampin <quentin.lampin@orange.com>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2415
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
It is derived from ti_tmdx570ls31usb.cfg, using a different TAP ID.
Change-Id: I2d911995c76ea4f75a780cc230d61f4959825809
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/2440
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This should have been corrected earlier with the split of l1/l0 code
apart.
Change-Id: I87b94a310ae7e76318554a9cd2705348a942d58b
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2447
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
commit b5a6ba46 broke the following board files, update to new cfg.
Change-Id: Ic3b776bd32eb72eae6ad1e130e329268ce9ba71a
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/2384
Tested-by: jenkins
L0 is cortex m0+, so different id codes, SWD only, different addresses
for the clock speedup. It has no endian options, no boundary scan.
Removed all L0 specific portions from L1 files, and renamed files to clarify
their purpose. The deprecated stm32lx_stlink.cfg is kept as is, as it is only
around for backwards compatibility with prior releases.
Tested on STM32L053 Discovery and STM32L151 Discovery.
Has _not_ been tested with jtag on L1.
Change-Id: I8eea890d2f92a302d9e9c8a8832d218ee1b6bcfc
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2405
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Juha Niskanen <juha.niskanen@haltian.com>
Fix script parse error, when using JTAG, introduced in
commit 0187ced9ed
Add several BS TAPIDs with comments about ST documentation.
Change-Id: I8d0370b244ccaf7ea0dbe1919bfad1915f7317d4
Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com>
Reviewed-on: http://openocd.zylin.com/2376
Tested-by: jenkins
Reviewed-by: Rémi PRUD'HOMME <prudhomme.remi@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Since all F4 parts have an internal HSI providing 16MHz, it's safe to
use 2MHz JTAG frequency by default.
Change-Id: I2702d5a1d642d4acd4af2db54c028949132c6900
Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2383
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tim 'mithro' Ansell
Nemui Trinomius
Ivan Buliev
Andreas Färber
Christoph Pittracher
Andrey Yurovsky
Robert Jordens
Radek Dostal
Jiri Kastner
Alex Ray
Spencer Oliver
Paul Fertser
Felipe Balbi
Tomas Vanek
Uwe Bonnes
Ed Beroset
Jeff Ciesielski
Angus Gratton
Andreas Fritiofson
Matthijs van Duin
Arne Wichmann
Oleksij Rempel
Anton Kuzmin
Andreas Bomholtz
Joerg Fischer
Pawel Si
Jacob Palsson
Heinz Schweiger
Thomas Eichinger
Karl Palsson
Karl Palsson
Juha Niskanen