tcl/target, board: remove useless gdb-attach event definitions
Since commit bae76053dc
gdb-attach event is defined as halt by default.
Remove useless and in case of bcm281xx wrong definitions of the event.
Change-Id: I8e69780a93722eb9392673303f54d502e71eceb6
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4763
Tested-by: jenkins
Reviewed-by: Steven Stallion <sstallion@gmail.com>
log_output
parent
20113201df
commit
ff555afc02
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@ -1,3 +1 @@
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source [find target/at91sam3sXX.cfg]
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source [find target/at91sam3sXX.cfg]
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$_TARGETNAME configure -event gdb-attach { reset init }
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@ -1,3 +1 @@
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source [find target/at91sam4sXX.cfg]
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source [find target/at91sam4sXX.cfg]
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$_TARGETNAME configure -event gdb-attach { reset init }
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@ -143,7 +143,5 @@ proc imx6q_sabresd_init { } {
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$_TARGETNAME.0 configure -event reset-assert { }
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$_TARGETNAME.0 configure -event reset-assert { }
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# hook the init function into the reset-init event
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# hook the init function into the reset-init event
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$_TARGETNAME.0 configure -event reset-init { imx6q_sabresd_init }
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$_TARGETNAME.0 configure -event reset-init { imx6q_sabresd_init }
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# make sure target is halted when gdb attaches
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$_TARGETNAME.0 configure -event gdb-attach { halt }
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# set a slow default JTAG clock, can be overridden later
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# set a slow default JTAG clock, can be overridden later
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adapter_khz 1000
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adapter_khz 1000
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@ -10,9 +10,6 @@ reset_config srst_only srst_push_pull
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source [find target/hi6220.cfg]
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source [find target/hi6220.cfg]
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# halt the cores when gdb attaches
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${_TARGETNAME}0 configure -event gdb-attach "halt"
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# make sure the default target is the boot core
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# make sure the default target is the boot core
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targets ${_TARGETNAME}0
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targets ${_TARGETNAME}0
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@ -12,9 +12,6 @@ reset_config srst_only srst_push_pull
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source [find tcl/target/hi3798.cfg]
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source [find tcl/target/hi3798.cfg]
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# halt the cores when gdb attaches
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${_TARGETNAME}0 configure -event gdb-attach "halt"
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# make sure the default target is the boot core
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# make sure the default target is the boot core
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targets ${_TARGETNAME}0
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targets ${_TARGETNAME}0
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@ -48,7 +48,6 @@ target create $_TARGETNAME1 cortex_a -dap $_CHIPNAME.dap \
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$_TARGETNAME1 configure -event reset-start { adapter_khz 1000 }
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$_TARGETNAME1 configure -event reset-start { adapter_khz 1000 }
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$_TARGETNAME1 configure -event reset-assert-post "cycv_dbginit $_TARGETNAME1"
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$_TARGETNAME1 configure -event reset-assert-post "cycv_dbginit $_TARGETNAME1"
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$_TARGETNAME1 configure -event gdb-attach { halt }
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# A9 core 1
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# A9 core 1
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@ -57,7 +56,6 @@ $_TARGETNAME1 configure -event gdb-attach { halt }
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#$_TARGETNAME2 configure -event reset-start { adapter_khz 1000 }
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#$_TARGETNAME2 configure -event reset-start { adapter_khz 1000 }
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#$_TARGETNAME2 configure -event reset-assert-post "cycv_dbginit $_TARGETNAME2"
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#$_TARGETNAME2 configure -event reset-assert-post "cycv_dbginit $_TARGETNAME2"
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#$_TARGETNAME2 configure -event gdb-attach { halt }
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proc cycv_dbginit {target} {
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proc cycv_dbginit {target} {
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# General Cortex-A8/A9 debug initialisation
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# General Cortex-A8/A9 debug initialisation
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@ -26,10 +26,3 @@ dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
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target create $_TARGETNAME0 cortex_a -dap $_CHIPNAME.dap -coreid 0 -dbgbase 0x3fe10000
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target create $_TARGETNAME0 cortex_a -dap $_CHIPNAME.dap -coreid 0 -dbgbase 0x3fe10000
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target create $_TARGETNAME1 cortex_a -dap $_CHIPNAME.dap -coreid 1 -dbgbase 0x3fe12000
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target create $_TARGETNAME1 cortex_a -dap $_CHIPNAME.dap -coreid 1 -dbgbase 0x3fe12000
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target smp $_TARGETNAME0 $_TARGETNAME1
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target smp $_TARGETNAME0 $_TARGETNAME1
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$_TARGETNAME0 configure -event gdb-attach {
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cortex_a dbginit
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}
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$_TARGETNAME1 configure -event gdb-attach {
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cortex_a dbginit
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}
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@ -57,4 +57,3 @@ adapter_khz 1000
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$_TARGETNAME configure -event reset-start { adapter_khz 1000 }
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$_TARGETNAME configure -event reset-start { adapter_khz 1000 }
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$_TARGETNAME configure -event reset-assert-post "imx6_dbginit $_TARGETNAME"
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$_TARGETNAME configure -event reset-assert-post "imx6_dbginit $_TARGETNAME"
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$_TARGETNAME configure -event gdb-attach { halt }
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@ -33,8 +33,6 @@ jtag configure quark_d20xx.quark -event tap-disable \
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target create quark_d20xx.quark quark_d20xx -endian little -chain-position quark_d20xx.quark
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target create quark_d20xx.quark quark_d20xx -endian little -chain-position quark_d20xx.quark
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quark_d20xx.quark configure -event gdb-attach { halt }
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quark_d20xx.quark configure -event reset-start {
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quark_d20xx.quark configure -event reset-start {
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# need to halt the target to write to memory
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# need to halt the target to write to memory
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if {[quark_d20xx.quark curstate] ne "halted"} { halt }
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if {[quark_d20xx.quark curstate] ne "halted"} { halt }
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@ -63,11 +63,6 @@ target create $_TARGETNAME cortex_r4 -endian $_ENDIAN \
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# TMS570 uses quirky BE-32 mode
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# TMS570 uses quirky BE-32 mode
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$_CHIPNAME.dap ti_be_32_quirks 1
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$_CHIPNAME.dap ti_be_32_quirks 1
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$_TARGETNAME configure -event gdb-attach {
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cortex_r4 dbginit
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halt
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}
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$_TARGETNAME configure -event "reset-assert" {
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$_TARGETNAME configure -event "reset-assert" {
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global _CHIPNAME
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global _CHIPNAME
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@ -206,10 +206,6 @@ dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
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target create $_TARGETNAME_1 cortex_a -dap $_CHIPNAME.dap -dbgbase $_DAP_DBG1 -coreid 0 -rtos linux
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target create $_TARGETNAME_1 cortex_a -dap $_CHIPNAME.dap -dbgbase $_DAP_DBG1 -coreid 0 -rtos linux
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$_TARGETNAME_1 configure -event gdb-attach {
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halt
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}
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if { ![info exists TARGETNAME_2] } {
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if { ![info exists TARGETNAME_2] } {
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global _TARGETNAME_2
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global _TARGETNAME_2
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@ -221,10 +217,6 @@ set _TARGETNAME_2 $TARGETNAME_2
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target create $_TARGETNAME_2 cortex_a -dap $_CHIPNAME.dap -dbgbase $_DAP_DBG2 -coreid 1 -rtos linux
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target create $_TARGETNAME_2 cortex_a -dap $_CHIPNAME.dap -dbgbase $_DAP_DBG2 -coreid 1 -rtos linux
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$_TARGETNAME_2 configure -event gdb-attach {
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halt
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}
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if {![info exists SMP]} {
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if {![info exists SMP]} {
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global _SMP
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global _SMP
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