ARM7TDMI uses the new inheritance/nesting scheme
Use target_to_arm7_9(), replacing needless pointer traversals. Also: remove now-useless contents of arm7tdmi struct; it's almost ready to be removed. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>__archive__
David Brownell
parent
11fe2ec62e
commit
fec3c4763a
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@ -44,9 +44,7 @@
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static int arm7tdmi_examine_debug_reason(target_t *target)
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{
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int retval = ERROR_OK;
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/* get pointers to arch-specific information */
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armv4_5_common_t *armv4_5 = target->arch_info;
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arm7_9_common_t *arm7_9 = armv4_5->arch_info;
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struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
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/* only check the debug reason if we don't know it already */
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if ((target->debug_reason != DBG_REASON_DBGRQ)
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@ -268,9 +266,7 @@ static int arm7tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info,
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static void arm7tdmi_change_to_arm(target_t *target,
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uint32_t *r0, uint32_t *pc)
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{
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/* get pointers to arch-specific information */
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armv4_5_common_t *armv4_5 = target->arch_info;
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arm7_9_common_t *arm7_9 = armv4_5->arch_info;
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struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
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arm_jtag_t *jtag_info = &arm7_9->jtag_info;
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/* save r0 before using it and put system in ARM state
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@ -327,9 +323,7 @@ static void arm7tdmi_read_core_regs(target_t *target,
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uint32_t mask, uint32_t* core_regs[16])
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{
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int i;
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/* get pointers to arch-specific information */
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armv4_5_common_t *armv4_5 = target->arch_info;
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arm7_9_common_t *arm7_9 = armv4_5->arch_info;
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struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
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arm_jtag_t *jtag_info = &arm7_9->jtag_info;
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/* STMIA r0-15, [r0] at debug speed
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@ -354,9 +348,7 @@ static void arm7tdmi_read_core_regs_target_buffer(target_t *target,
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uint32_t mask, void* buffer, int size)
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{
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int i;
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/* get pointers to arch-specific information */
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armv4_5_common_t *armv4_5 = target->arch_info;
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arm7_9_common_t *arm7_9 = armv4_5->arch_info;
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struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
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arm_jtag_t *jtag_info = &arm7_9->jtag_info;
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int be = (target->endianness == TARGET_BIG_ENDIAN) ? 1 : 0;
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uint32_t *buf_u32 = buffer;
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@ -396,9 +388,7 @@ static void arm7tdmi_read_core_regs_target_buffer(target_t *target,
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static void arm7tdmi_read_xpsr(target_t *target, uint32_t *xpsr, int spsr)
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{
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/* get pointers to arch-specific information */
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armv4_5_common_t *armv4_5 = target->arch_info;
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arm7_9_common_t *arm7_9 = armv4_5->arch_info;
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struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
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arm_jtag_t *jtag_info = &arm7_9->jtag_info;
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/* MRS r0, cpsr */
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@ -416,9 +406,7 @@ static void arm7tdmi_read_xpsr(target_t *target, uint32_t *xpsr, int spsr)
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static void arm7tdmi_write_xpsr(target_t *target, uint32_t xpsr, int spsr)
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{
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/* get pointers to arch-specific information */
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armv4_5_common_t *armv4_5 = target->arch_info;
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arm7_9_common_t *arm7_9 = armv4_5->arch_info;
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struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
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arm_jtag_t *jtag_info = &arm7_9->jtag_info;
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LOG_DEBUG("xpsr: %8.8" PRIx32 ", spsr: %i", xpsr, spsr);
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@ -448,9 +436,7 @@ static void arm7tdmi_write_xpsr(target_t *target, uint32_t xpsr, int spsr)
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static void arm7tdmi_write_xpsr_im8(target_t *target,
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uint8_t xpsr_im, int rot, int spsr)
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{
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/* get pointers to arch-specific information */
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armv4_5_common_t *armv4_5 = target->arch_info;
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arm7_9_common_t *arm7_9 = armv4_5->arch_info;
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struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
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arm_jtag_t *jtag_info = &arm7_9->jtag_info;
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LOG_DEBUG("xpsr_im: %2.2x, rot: %i, spsr: %i", xpsr_im, rot, spsr);
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@ -469,9 +455,7 @@ static void arm7tdmi_write_core_regs(target_t *target,
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uint32_t mask, uint32_t core_regs[16])
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{
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int i;
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/* get pointers to arch-specific information */
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armv4_5_common_t *armv4_5 = target->arch_info;
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arm7_9_common_t *arm7_9 = armv4_5->arch_info;
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struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
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arm_jtag_t *jtag_info = &arm7_9->jtag_info;
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/* LDMIA r0-15, [r0] at debug speed
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@ -495,9 +479,7 @@ static void arm7tdmi_write_core_regs(target_t *target,
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static void arm7tdmi_load_word_regs(target_t *target, uint32_t mask)
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{
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/* get pointers to arch-specific information */
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armv4_5_common_t *armv4_5 = target->arch_info;
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arm7_9_common_t *arm7_9 = armv4_5->arch_info;
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struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
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arm_jtag_t *jtag_info = &arm7_9->jtag_info;
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/* put system-speed load-multiple into the pipeline */
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@ -508,9 +490,7 @@ static void arm7tdmi_load_word_regs(target_t *target, uint32_t mask)
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static void arm7tdmi_load_hword_reg(target_t *target, int num)
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{
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/* get pointers to arch-specific information */
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armv4_5_common_t *armv4_5 = target->arch_info;
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arm7_9_common_t *arm7_9 = armv4_5->arch_info;
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struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
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arm_jtag_t *jtag_info = &arm7_9->jtag_info;
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/* put system-speed load half-word into the pipeline */
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@ -521,9 +501,7 @@ static void arm7tdmi_load_hword_reg(target_t *target, int num)
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static void arm7tdmi_load_byte_reg(target_t *target, int num)
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{
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/* get pointers to arch-specific information */
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armv4_5_common_t *armv4_5 = target->arch_info;
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arm7_9_common_t *arm7_9 = armv4_5->arch_info;
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struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
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arm_jtag_t *jtag_info = &arm7_9->jtag_info;
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/* put system-speed load byte into the pipeline */
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@ -534,9 +512,7 @@ static void arm7tdmi_load_byte_reg(target_t *target, int num)
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static void arm7tdmi_store_word_regs(target_t *target, uint32_t mask)
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{
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/* get pointers to arch-specific information */
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armv4_5_common_t *armv4_5 = target->arch_info;
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arm7_9_common_t *arm7_9 = armv4_5->arch_info;
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struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
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arm_jtag_t *jtag_info = &arm7_9->jtag_info;
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/* put system-speed store-multiple into the pipeline */
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@ -547,9 +523,7 @@ static void arm7tdmi_store_word_regs(target_t *target, uint32_t mask)
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static void arm7tdmi_store_hword_reg(target_t *target, int num)
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{
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/* get pointers to arch-specific information */
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armv4_5_common_t *armv4_5 = target->arch_info;
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arm7_9_common_t *arm7_9 = armv4_5->arch_info;
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struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
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arm_jtag_t *jtag_info = &arm7_9->jtag_info;
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/* put system-speed store half-word into the pipeline */
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@ -560,9 +534,7 @@ static void arm7tdmi_store_hword_reg(target_t *target, int num)
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static void arm7tdmi_store_byte_reg(target_t *target, int num)
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{
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/* get pointers to arch-specific information */
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armv4_5_common_t *armv4_5 = target->arch_info;
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arm7_9_common_t *arm7_9 = armv4_5->arch_info;
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struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
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arm_jtag_t *jtag_info = &arm7_9->jtag_info;
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/* put system-speed store byte into the pipeline */
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@ -573,9 +545,7 @@ static void arm7tdmi_store_byte_reg(target_t *target, int num)
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static void arm7tdmi_write_pc(target_t *target, uint32_t pc)
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{
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/* get pointers to arch-specific information */
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armv4_5_common_t *armv4_5 = target->arch_info;
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arm7_9_common_t *arm7_9 = armv4_5->arch_info;
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struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
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arm_jtag_t *jtag_info = &arm7_9->jtag_info;
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/* LDMIA r0-15, [r0] at debug speed
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@ -600,9 +570,7 @@ static void arm7tdmi_write_pc(target_t *target, uint32_t pc)
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static void arm7tdmi_branch_resume(target_t *target)
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{
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/* get pointers to arch-specific information */
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armv4_5_common_t *armv4_5 = target->arch_info;
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arm7_9_common_t *arm7_9 = armv4_5->arch_info;
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struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
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arm_jtag_t *jtag_info = &arm7_9->jtag_info;
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arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 1);
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@ -611,14 +579,13 @@ static void arm7tdmi_branch_resume(target_t *target)
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static void arm7tdmi_branch_resume_thumb(target_t *target)
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{
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LOG_DEBUG("-");
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/* get pointers to arch-specific information */
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armv4_5_common_t *armv4_5 = target->arch_info;
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arm7_9_common_t *arm7_9 = armv4_5->arch_info;
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struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
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struct armv4_5_common_s *armv4_5 = &arm7_9->armv4_5_common;
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arm_jtag_t *jtag_info = &arm7_9->jtag_info;
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reg_t *dbg_stat = &arm7_9->eice_cache->reg_list[EICE_DBG_STAT];
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LOG_DEBUG("-");
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/* LDMIA r0, [r0] at debug speed
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* register values will start to appear on 4th DCLK
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*/
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@ -673,8 +640,7 @@ static void arm7tdmi_branch_resume_thumb(target_t *target)
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static void arm7tdmi_build_reg_cache(target_t *target)
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{
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reg_cache_t **cache_p = register_get_last_cache_p(&target->reg_cache);
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/* get pointers to arch-specific information */
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armv4_5_common_t *armv4_5 = target->arch_info;
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struct armv4_5_common_s *armv4_5 = target_to_armv4_5(target);
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(*cache_p) = armv4_5_build_reg_cache(target, armv4_5);
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armv4_5->core_cache = (*cache_p);
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@ -682,9 +648,10 @@ static void arm7tdmi_build_reg_cache(target_t *target)
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int arm7tdmi_examine(struct target_s *target)
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{
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struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
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int retval;
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armv4_5_common_t *armv4_5 = target->arch_info;
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arm7_9_common_t *arm7_9 = armv4_5->arch_info;
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if (!target_was_examined(target))
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{
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/* get pointers to arch-specific information */
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@ -725,11 +692,7 @@ int arm7tdmi_init_target(struct command_context_s *cmd_ctx, struct target_s *tar
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int arm7tdmi_init_arch_info(target_t *target, arm7tdmi_common_t *arm7tdmi, jtag_tap_t *tap)
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{
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armv4_5_common_t *armv4_5;
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arm7_9_common_t *arm7_9;
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arm7_9 = &arm7tdmi->arm7_9_common;
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armv4_5 = &arm7_9->armv4_5_common;
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struct arm7_9_common_s *arm7_9 = &arm7tdmi->arm7_9_common;
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/* prepare JTAG information for the new target */
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arm7_9->jtag_info.tap = tap;
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@ -771,10 +734,6 @@ int arm7tdmi_init_arch_info(target_t *target, arm7tdmi_common_t *arm7tdmi, jtag_
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arm7_9->thumb_bkpt = 0xdeee;
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arm7_9->dbgreq_adjust_pc = 2;
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arm7_9->arch_info = arm7tdmi;
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arm7tdmi->arch_info = NULL;
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arm7tdmi->common_magic = ARM7TDMI_COMMON_MAGIC;
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arm7_9_init_arch_info(target, arm7_9);
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@ -25,12 +25,11 @@
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#include "embeddedice.h"
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#define ARM7TDMI_COMMON_MAGIC 0x00a700a7
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/* FIXME we don't really need a separate arm7tdmi struct any more...
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* remove it, the arm7/arm9 common struct suffices.
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*/
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typedef struct arm7tdmi_common_s
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{
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int common_magic;
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void *arch_info;
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arm7_9_common_t arm7_9_common;
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} arm7tdmi_common_t;
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