- add parameter flush to the once api to signalize if the jtag queue need to be flushed after the command
Mathias K
Øyvind Harboe
parent
aa9baf11a8
commit
fe0894015f
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@ -366,14 +366,14 @@ static int dsp563xx_reg_read_high_io(struct target *target, uint32_t instr_mask,
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/* move source memory to r0 */
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instr = INSTR_MOVEP_REG_HIO(MEM_X, 0, EAME_R0, instr_mask);
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if ((err = dsp563xx_once_execute_sw_ir_nq(target->tap, instr)) != ERROR_OK)
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if ((err = dsp563xx_once_execute_sw_ir(target->tap, 0, instr)) != ERROR_OK)
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return err;
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/* move r0 to debug register */
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instr = INSTR_MOVEP_REG_HIO(MEM_X, 1, EAME_R0, 0xfffffc);
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if ((err = dsp563xx_once_execute_sw_ir(target->tap, instr)) != ERROR_OK)
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if ((err = dsp563xx_once_execute_sw_ir(target->tap, 1, instr)) != ERROR_OK)
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return err;
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/* read debug register */
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if ((err = dsp563xx_once_reg_read(target->tap, DSP563XX_ONCE_OGDBR, data)) != ERROR_OK)
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if ((err = dsp563xx_once_reg_read(target->tap, 1, DSP563XX_ONCE_OGDBR, data)) != ERROR_OK)
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return err;
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/* r0 is no longer valid on target */
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dsp563xx->core_cache->reg_list[REG_NUM_R0].dirty = 1;
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@ -392,11 +392,11 @@ static int dsp563xx_reg_write_high_io(struct target *target, uint32_t instr_mask
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dsp563xx->read_core_reg(target, REG_NUM_R0);
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/* move data to r0 */
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if ((err = dsp563xx_once_execute_dw_ir_nq(target->tap, 0x60F400, data)) != ERROR_OK)
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if ((err = dsp563xx_once_execute_dw_ir(target->tap, 0, 0x60F400, data)) != ERROR_OK)
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return err;
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/* move r0 to destination memory */
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instr = INSTR_MOVEP_REG_HIO(MEM_X, 1, EAME_R0, instr_mask);
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if ((err = dsp563xx_once_execute_sw_ir(target->tap, instr)) != ERROR_OK)
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if ((err = dsp563xx_once_execute_sw_ir(target->tap, 1, instr)) != ERROR_OK)
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return err;
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/* r0 is no longer valid on target */
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@ -411,23 +411,23 @@ static int dsp563xx_reg_read(struct target *target, uint32_t eame, uint32_t * da
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uint32_t instr;
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instr = INSTR_MOVEP_REG_HIO(MEM_X, 1, eame, 0xfffffc);
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if ((err = dsp563xx_once_execute_sw_ir_nq(target->tap, instr)) != ERROR_OK)
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if ((err = dsp563xx_once_execute_sw_ir(target->tap, 0, instr)) != ERROR_OK)
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return err;
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/* nop */
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if ((err = dsp563xx_once_execute_sw_ir(target->tap, 0x000000)) != ERROR_OK)
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if ((err = dsp563xx_once_execute_sw_ir(target->tap, 1, 0x000000)) != ERROR_OK)
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return err;
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/* read debug register */
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return dsp563xx_once_reg_read(target->tap, DSP563XX_ONCE_OGDBR, data);
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return dsp563xx_once_reg_read(target->tap, 1, DSP563XX_ONCE_OGDBR, data);
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}
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static int dsp563xx_reg_write(struct target *target, uint32_t instr_mask, uint32_t data)
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{
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int err;
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if ((err = dsp563xx_once_execute_dw_ir_nq(target->tap, instr_mask, data)) != ERROR_OK)
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if ((err = dsp563xx_once_execute_dw_ir(target->tap, 0, instr_mask, data)) != ERROR_OK)
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return err;
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/* nop */
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return dsp563xx_once_execute_sw_ir(target->tap, 0x000000);
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return dsp563xx_once_execute_sw_ir(target->tap, 1, 0x000000);
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}
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static int dsp563xx_reg_pc_read(struct target *target)
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@ -440,9 +440,9 @@ static int dsp563xx_reg_pc_read(struct target *target)
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if (dsp563xx->core_cache->reg_list[REG_NUM_PC].dirty)
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return ERROR_OK;
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if ((err = dsp563xx_once_reg_read(target->tap, DSP563XX_ONCE_OPABDR, &opabdr)) != ERROR_OK)
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if ((err = dsp563xx_once_reg_read(target->tap, 1, DSP563XX_ONCE_OPABDR, &opabdr)) != ERROR_OK)
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return err;
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if ((err = dsp563xx_once_reg_read(target->tap, DSP563XX_ONCE_OPABEX, &opabex)) != ERROR_OK)
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if ((err = dsp563xx_once_reg_read(target->tap, 1, DSP563XX_ONCE_OPABEX, &opabex)) != ERROR_OK)
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return err;
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/* conditional branch check */
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@ -771,7 +771,7 @@ static int dsp563xx_arch_state(struct target *target)
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static int dsp563xx_debug_once_init(struct target *target)
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{
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return dsp563xx_once_read_register(target->tap, once_regs, DSP563XX_NUMONCEREGS);
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return dsp563xx_once_read_register(target->tap, 1, once_regs, DSP563XX_NUMONCEREGS);
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}
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static int dsp563xx_debug_init(struct target *target)
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@ -796,7 +796,7 @@ static int dsp563xx_debug_init(struct target *target)
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{
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sr &= ~(DSP563XX_SR_SA | DSP563XX_SR_SC);
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if ((err = dsp563xx_once_execute_dw_ir(target->tap, arch_info->instr_mask, sr)) != ERROR_OK)
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if ((err = dsp563xx_once_execute_dw_ir(target->tap, 1, arch_info->instr_mask, sr)) != ERROR_OK)
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return err;
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dsp563xx->core_cache->reg_list[REG_NUM_SR].dirty = 1;
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}
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@ -868,7 +868,7 @@ static int dsp563xx_poll(struct target *target)
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return ERROR_TARGET_FAILURE;
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}
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if ((err = dsp563xx_once_reg_read(target->tap, DSP563XX_ONCE_OSCR, &once_status)) != ERROR_OK)
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if ((err = dsp563xx_once_reg_read(target->tap, 1, DSP563XX_ONCE_OSCR, &once_status)) != ERROR_OK)
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return err;
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if ((once_status & DSP563XX_ONCE_OSCR_DEBUG_M) == DSP563XX_ONCE_OSCR_DEBUG_M)
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@ -906,9 +906,9 @@ static int dsp563xx_halt(struct target *target)
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return err;
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/* store pipeline register */
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if ((err = dsp563xx_once_reg_read(target->tap, DSP563XX_ONCE_OPILR, &dsp563xx->pipeline_context.once_opilr)) != ERROR_OK)
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if ((err = dsp563xx_once_reg_read(target->tap, 1, DSP563XX_ONCE_OPILR, &dsp563xx->pipeline_context.once_opilr)) != ERROR_OK)
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return err;
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if ((err = dsp563xx_once_reg_read(target->tap, DSP563XX_ONCE_OPDBR, &dsp563xx->pipeline_context.once_opdbr)) != ERROR_OK)
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if ((err = dsp563xx_once_reg_read(target->tap, 1, DSP563XX_ONCE_OPDBR, &dsp563xx->pipeline_context.once_opdbr)) != ERROR_OK)
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return err;
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LOG_DEBUG("%s", __FUNCTION__);
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@ -930,19 +930,19 @@ static int dsp563xx_resume(struct target *target, int current, uint32_t address,
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if (current)
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{
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/* restore pipeline registers and go */
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if ((err = dsp563xx_once_reg_write(target->tap, DSP563XX_ONCE_OPILR, dsp563xx->pipeline_context.once_opilr)) != ERROR_OK)
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if ((err = dsp563xx_once_reg_write(target->tap, 1, DSP563XX_ONCE_OPILR, dsp563xx->pipeline_context.once_opilr)) != ERROR_OK)
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return err;
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if ((err =
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dsp563xx_once_reg_write(target->tap, DSP563XX_ONCE_OPDBR | DSP563XX_ONCE_OCR_EX | DSP563XX_ONCE_OCR_GO,
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dsp563xx_once_reg_write(target->tap, 1, DSP563XX_ONCE_OPDBR | DSP563XX_ONCE_OCR_EX | DSP563XX_ONCE_OCR_GO,
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dsp563xx->pipeline_context.once_opdbr)) != ERROR_OK)
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return err;
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}
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else
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{
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/* set to go register and jump */
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if ((err = dsp563xx_once_reg_write(target->tap, DSP563XX_ONCE_OPDBR, INSTR_JUMP)) != ERROR_OK)
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if ((err = dsp563xx_once_reg_write(target->tap, 1, DSP563XX_ONCE_OPDBR, INSTR_JUMP)) != ERROR_OK)
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return err;
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if ((err = dsp563xx_once_reg_write(target->tap, DSP563XX_ONCE_PDBGOTO | DSP563XX_ONCE_OCR_EX | DSP563XX_ONCE_OCR_GO, address)) != ERROR_OK)
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if ((err = dsp563xx_once_reg_write(target->tap, 1, DSP563XX_ONCE_PDBGOTO | DSP563XX_ONCE_OCR_EX | DSP563XX_ONCE_OCR_GO, address)) != ERROR_OK)
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return err;
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}
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@ -972,10 +972,10 @@ static int dsp563xx_step_ex(struct target *target, int current, uint32_t address
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return err;
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/* reset trace mode */
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if ((err = dsp563xx_once_reg_write(target->tap, DSP563XX_ONCE_OSCR, 0x000000)) != ERROR_OK)
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if ((err = dsp563xx_once_reg_write(target->tap, 1, DSP563XX_ONCE_OSCR, 0x000000)) != ERROR_OK)
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return err;
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/* enable trace mode */
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if ((err = dsp563xx_once_reg_write(target->tap, DSP563XX_ONCE_OSCR, DSP563XX_ONCE_OSCR_TME)) != ERROR_OK)
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if ((err = dsp563xx_once_reg_write(target->tap, 1, DSP563XX_ONCE_OSCR, DSP563XX_ONCE_OSCR_TME)) != ERROR_OK)
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return err;
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cnt = steps;
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@ -985,53 +985,53 @@ static int dsp563xx_step_ex(struct target *target, int current, uint32_t address
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cnt++;
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/* load step counter with N-1 */
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if ((err = dsp563xx_once_reg_write(target->tap, DSP563XX_ONCE_OTC, cnt)) != ERROR_OK)
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if ((err = dsp563xx_once_reg_write(target->tap, 1, DSP563XX_ONCE_OTC, cnt)) != ERROR_OK)
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return err;
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if (current)
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{
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/* restore pipeline registers and go */
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if ((err = dsp563xx_once_reg_write(target->tap, DSP563XX_ONCE_OPILR, dsp563xx->pipeline_context.once_opilr)) != ERROR_OK)
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if ((err = dsp563xx_once_reg_write(target->tap, 1, DSP563XX_ONCE_OPILR, dsp563xx->pipeline_context.once_opilr)) != ERROR_OK)
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return err;
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if ((err =
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dsp563xx_once_reg_write(target->tap, DSP563XX_ONCE_OPDBR | DSP563XX_ONCE_OCR_EX | DSP563XX_ONCE_OCR_GO,
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dsp563xx_once_reg_write(target->tap, 1, DSP563XX_ONCE_OPDBR | DSP563XX_ONCE_OCR_EX | DSP563XX_ONCE_OCR_GO,
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dsp563xx->pipeline_context.once_opdbr)) != ERROR_OK)
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return err;
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}
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else
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{
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/* set to go register and jump */
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if ((err = dsp563xx_once_reg_write(target->tap, DSP563XX_ONCE_OPDBR, INSTR_JUMP)) != ERROR_OK)
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if ((err = dsp563xx_once_reg_write(target->tap, 1, DSP563XX_ONCE_OPDBR, INSTR_JUMP)) != ERROR_OK)
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return err;
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if ((err = dsp563xx_once_reg_write(target->tap, DSP563XX_ONCE_PDBGOTO | DSP563XX_ONCE_OCR_EX | DSP563XX_ONCE_OCR_GO, address)) != ERROR_OK)
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if ((err = dsp563xx_once_reg_write(target->tap, 1, DSP563XX_ONCE_PDBGOTO | DSP563XX_ONCE_OCR_EX | DSP563XX_ONCE_OCR_GO, address)) != ERROR_OK)
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return err;
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}
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while (1)
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{
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if ((err = dsp563xx_once_reg_read(target->tap, DSP563XX_ONCE_OSCR, &once_status)) != ERROR_OK)
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if ((err = dsp563xx_once_reg_read(target->tap, 1, DSP563XX_ONCE_OSCR, &once_status)) != ERROR_OK)
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return err;
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if (once_status & DSP563XX_ONCE_OSCR_TO)
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{
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/* store pipeline register */
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if ((err = dsp563xx_once_reg_read(target->tap, DSP563XX_ONCE_OPILR, &dsp563xx->pipeline_context.once_opilr)) != ERROR_OK)
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if ((err = dsp563xx_once_reg_read(target->tap, 1, DSP563XX_ONCE_OPILR, &dsp563xx->pipeline_context.once_opilr)) != ERROR_OK)
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return err;
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if ((err = dsp563xx_once_reg_read(target->tap, DSP563XX_ONCE_OPDBR, &dsp563xx->pipeline_context.once_opdbr)) != ERROR_OK)
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if ((err = dsp563xx_once_reg_read(target->tap, 1, DSP563XX_ONCE_OPDBR, &dsp563xx->pipeline_context.once_opdbr)) != ERROR_OK)
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return err;
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if ((err = dsp563xx_once_reg_read(target->tap, DSP563XX_ONCE_OPABFR, &dr_in)) != ERROR_OK)
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if ((err = dsp563xx_once_reg_read(target->tap, 1, DSP563XX_ONCE_OPABFR, &dr_in)) != ERROR_OK)
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return err;
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LOG_DEBUG("fetch: %08X", (unsigned) dr_in);
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if ((err = dsp563xx_once_reg_read(target->tap, DSP563XX_ONCE_OPABDR, &dr_in)) != ERROR_OK)
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if ((err = dsp563xx_once_reg_read(target->tap, 1, DSP563XX_ONCE_OPABDR, &dr_in)) != ERROR_OK)
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return err;
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LOG_DEBUG("decode: %08X", (unsigned) dr_in);
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if ((err = dsp563xx_once_reg_read(target->tap, DSP563XX_ONCE_OPABEX, &dr_in)) != ERROR_OK)
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if ((err = dsp563xx_once_reg_read(target->tap, 1, DSP563XX_ONCE_OPABEX, &dr_in)) != ERROR_OK)
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return err;
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LOG_DEBUG("execute: %08X", (unsigned) dr_in);
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/* reset trace mode */
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if ((err = dsp563xx_once_reg_write(target->tap, DSP563XX_ONCE_OSCR, 0x000000)) != ERROR_OK)
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if ((err = dsp563xx_once_reg_write(target->tap, 1, DSP563XX_ONCE_OSCR, 0x000000)) != ERROR_OK)
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return err;
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register_cache_invalidate(dsp563xx->core_cache);
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@ -1173,16 +1173,16 @@ static int dsp563xx_read_memory(struct target *target, int mem_type, uint32_t ad
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x = count;
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b = buffer;
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if ((err = dsp563xx_once_execute_dw_ir(target->tap, 0x60F400, address)) != ERROR_OK)
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if ((err = dsp563xx_once_execute_dw_ir(target->tap, 1, 0x60F400, address)) != ERROR_OK)
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return err;
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for (i = 0; i < x; i++)
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{
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if ((err = dsp563xx_once_execute_sw_ir_nq(target->tap, move_cmd)) != ERROR_OK)
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if ((err = dsp563xx_once_execute_sw_ir(target->tap, 0, move_cmd)) != ERROR_OK)
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return err;
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if ((err = dsp563xx_once_execute_sw_ir_nq(target->tap, 0x08D13C)) != ERROR_OK)
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if ((err = dsp563xx_once_execute_sw_ir(target->tap, 0, 0x08D13C)) != ERROR_OK)
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return err;
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if ((err = dsp563xx_once_reg_read_nq(target->tap, DSP563XX_ONCE_OGDBR, (uint32_t*)b)) != ERROR_OK)
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if ((err = dsp563xx_once_reg_read(target->tap, 0, DSP563XX_ONCE_OGDBR, (uint32_t*)b)) != ERROR_OK)
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return err;
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b += 4;
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}
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@ -1264,7 +1264,7 @@ static int dsp563xx_write_memory(struct target *target, int mem_type, uint32_t a
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x = count;
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b = buffer;
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if ((err = dsp563xx_once_execute_dw_ir(target->tap, 0x60F400, address)) != ERROR_OK)
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if ((err = dsp563xx_once_execute_dw_ir(target->tap, 1, 0x60F400, address)) != ERROR_OK)
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return err;
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for (i = 0; i < x; i++)
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@ -1275,9 +1275,9 @@ static int dsp563xx_write_memory(struct target *target, int mem_type, uint32_t a
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data &= 0x00ffffff;
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if ((err = dsp563xx_once_execute_dw_ir_nq(target->tap, 0x61F400, data)) != ERROR_OK)
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if ((err = dsp563xx_once_execute_dw_ir(target->tap, 0, 0x61F400, data)) != ERROR_OK)
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return err;
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if ((err = dsp563xx_once_execute_sw_ir_nq(target->tap, move_cmd)) != ERROR_OK)
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if ((err = dsp563xx_once_execute_sw_ir(target->tap, 0, move_cmd)) != ERROR_OK)
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return err;
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b += 4;
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}
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@ -43,72 +43,41 @@
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#define JTAG_INSTR_DEBUG_REQUEST 0x07
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#define JTAG_INSTR_BYPASS 0x0F
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/** */
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static inline int dsp563xx_write_dr(struct jtag_tap *tap, uint8_t * dr_in, uint8_t * dr_out, int dr_len, int rti)
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{
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if (NULL == tap)
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{
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LOG_ERROR("invalid tap");
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return ERROR_FAIL;
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}
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jtag_add_plain_dr_scan(dr_len, dr_out, dr_in, TAP_IDLE);
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return ERROR_OK;
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}
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/** */
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static inline int dsp563xx_write_dr_u8(struct jtag_tap *tap, uint8_t * dr_in, uint8_t dr_out, int dr_len, int rti)
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{
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if (dr_len > 8)
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{
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LOG_ERROR("dr_len overflow, maxium is 8");
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return ERROR_FAIL;
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}
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return dsp563xx_write_dr(tap, dr_in, &dr_out, dr_len, rti);
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}
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/** */
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static inline int dsp563xx_write_dr_u32(struct jtag_tap *tap, uint32_t * dr_in, uint32_t dr_out, int dr_len, int rti)
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{
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if (dr_len > 32)
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{
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LOG_ERROR("dr_len overflow, maxium is 32");
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return ERROR_FAIL;
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}
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return dsp563xx_write_dr(tap, (uint8_t *) dr_in, (uint8_t *) & dr_out, dr_len, rti);
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}
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/** single word instruction */
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static inline int dsp563xx_once_ir_exec(struct jtag_tap *tap, uint8_t instr, uint8_t rw, uint8_t go, uint8_t ex)
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static inline int dsp563xx_once_ir_exec(struct jtag_tap *tap, int flush, uint8_t instr, uint8_t rw, uint8_t go, uint8_t ex)
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{
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int err;
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if ((err = dsp563xx_write_dr_u8(tap, 0, instr | (ex << 5) | (go << 6) | (rw << 7), 8, 0)) != ERROR_OK)
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return err;
|
||||
|
||||
return jtag_execute_queue();
|
||||
}
|
||||
|
||||
/** single word instruction */
|
||||
static inline int dsp563xx_once_ir_exec_nq(struct jtag_tap *tap, uint8_t instr, uint8_t rw, uint8_t go, uint8_t ex)
|
||||
{
|
||||
return dsp563xx_write_dr_u8(tap, 0, instr | (ex << 5) | (go << 6) | (rw << 7), 8, 0);
|
||||
if ( flush )
|
||||
err = jtag_execute_queue();
|
||||
return err;
|
||||
}
|
||||
|
||||
/* IR and DR functions */
|
||||
static inline int dsp563xx_write_ir(struct jtag_tap *tap, uint8_t * ir_in, uint8_t * ir_out, int ir_len, int rti)
|
||||
{
|
||||
if (NULL == tap)
|
||||
{
|
||||
LOG_ERROR("invalid tap");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
if (ir_len != tap->ir_length)
|
||||
{
|
||||
LOG_ERROR("invalid ir_len");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
jtag_add_plain_ir_scan(tap->ir_length, ir_out, ir_in, TAP_IDLE);
|
||||
|
||||
return ERROR_OK;
|
||||
|
|
@ -116,12 +85,6 @@ static inline int dsp563xx_write_ir(struct jtag_tap *tap, uint8_t * ir_in, uint8
|
|||
|
||||
static inline int dsp563xx_write_ir_u8(struct jtag_tap *tap, uint8_t * ir_in, uint8_t ir_out, int ir_len, int rti)
|
||||
{
|
||||
if (ir_len > 8)
|
||||
{
|
||||
LOG_ERROR("ir_len overflow, maxium is 8");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
return dsp563xx_write_ir(tap, ir_in, &ir_out, ir_len, rti);
|
||||
}
|
||||
|
||||
|
|
@ -222,132 +185,98 @@ int dsp563xx_once_request_debug(struct jtag_tap *tap, int reset_state)
|
|||
}
|
||||
|
||||
/** once read registers */
|
||||
int dsp563xx_once_read_register(struct jtag_tap *tap, struct once_reg *regs, int len)
|
||||
int dsp563xx_once_read_register(struct jtag_tap *tap, int flush, struct once_reg *regs, int len)
|
||||
{
|
||||
int i;
|
||||
int err;
|
||||
|
||||
for (i = 0; i < len; i++)
|
||||
{
|
||||
if ((err = dsp563xx_once_reg_read_ex_nq(tap, regs[i].addr, regs[i].len, ®s[i].reg)) != ERROR_OK)
|
||||
if ((err = dsp563xx_once_reg_read_ex(tap, flush, regs[i].addr, regs[i].len, ®s[i].reg)) != ERROR_OK)
|
||||
return err;
|
||||
}
|
||||
|
||||
return jtag_execute_queue();
|
||||
/*
|
||||
for(i=0;i<len;i++)
|
||||
{
|
||||
printf("%08X\n",regs[i].reg);
|
||||
}
|
||||
*/
|
||||
}
|
||||
|
||||
/** once read register */
|
||||
int dsp563xx_once_reg_read_ex_nq(struct jtag_tap *tap, uint8_t reg, uint8_t len, uint32_t * data)
|
||||
{
|
||||
int err;
|
||||
|
||||
if ((err = dsp563xx_once_ir_exec(tap, reg, 1, 0, 0)) != ERROR_OK)
|
||||
if ( flush )
|
||||
err = jtag_execute_queue();
|
||||
return err;
|
||||
return dsp563xx_write_dr_u32(tap, data, 0x00, len, 0);
|
||||
}
|
||||
|
||||
/** once read register */
|
||||
int dsp563xx_once_reg_read_ex(struct jtag_tap *tap, uint8_t reg, uint8_t len, uint32_t * data)
|
||||
/** once read register with register len */
|
||||
int dsp563xx_once_reg_read_ex(struct jtag_tap *tap, int flush, uint8_t reg, uint8_t len, uint32_t * data)
|
||||
{
|
||||
int err;
|
||||
|
||||
if ((err = dsp563xx_once_ir_exec(tap, reg, 1, 0, 0)) != ERROR_OK)
|
||||
if ((err = dsp563xx_once_ir_exec(tap, 1, reg, 1, 0, 0)) != ERROR_OK)
|
||||
return err;
|
||||
if ((err = dsp563xx_write_dr_u32(tap, data, 0x00, len, 0)) != ERROR_OK)
|
||||
return err;
|
||||
return jtag_execute_queue();
|
||||
if ( flush )
|
||||
err = jtag_execute_queue();
|
||||
return err;
|
||||
}
|
||||
|
||||
/** once read register */
|
||||
int dsp563xx_once_reg_read(struct jtag_tap *tap, uint8_t reg, uint32_t * data)
|
||||
int dsp563xx_once_reg_read(struct jtag_tap *tap, int flush, uint8_t reg, uint32_t * data)
|
||||
{
|
||||
int err;
|
||||
|
||||
if ((err = dsp563xx_once_ir_exec(tap, reg, 1, 0, 0)) != ERROR_OK)
|
||||
if ((err = dsp563xx_once_ir_exec(tap, flush, reg, 1, 0, 0)) != ERROR_OK)
|
||||
return err;
|
||||
if ((err = dsp563xx_write_dr_u32(tap, data, 0x00, 24, 0)) != ERROR_OK)
|
||||
return err;
|
||||
return jtag_execute_queue();
|
||||
if ( flush )
|
||||
err = jtag_execute_queue();
|
||||
return err;
|
||||
}
|
||||
|
||||
/** once write register */
|
||||
int dsp563xx_once_reg_write(struct jtag_tap *tap, uint8_t reg, uint32_t data)
|
||||
int dsp563xx_once_reg_write(struct jtag_tap *tap, int flush, uint8_t reg, uint32_t data)
|
||||
{
|
||||
int err;
|
||||
|
||||
if ((err = dsp563xx_once_ir_exec(tap, reg, 0, 0, 0)) != ERROR_OK)
|
||||
if ((err = dsp563xx_once_ir_exec(tap, flush, reg, 0, 0, 0)) != ERROR_OK)
|
||||
return err;
|
||||
if ((err = dsp563xx_write_dr_u32(tap, 0x00, data, 24, 0)) != ERROR_OK)
|
||||
return err;
|
||||
return jtag_execute_queue();
|
||||
if ( flush )
|
||||
err = jtag_execute_queue();
|
||||
return err;
|
||||
}
|
||||
|
||||
/** single word instruction */
|
||||
int dsp563xx_once_execute_sw_ir(struct jtag_tap *tap, uint32_t opcode)
|
||||
int dsp563xx_once_execute_sw_ir(struct jtag_tap *tap, int flush, uint32_t opcode)
|
||||
{
|
||||
int err;
|
||||
|
||||
if ((err = dsp563xx_once_ir_exec(tap, DSP563XX_ONCE_OPDBR, 0, 1, 0)) != ERROR_OK)
|
||||
if ((err = dsp563xx_once_ir_exec(tap, flush, DSP563XX_ONCE_OPDBR, 0, 1, 0)) != ERROR_OK)
|
||||
return err;
|
||||
if ((err = dsp563xx_write_dr_u32(tap, 0, opcode, 24, 0)) != ERROR_OK)
|
||||
return err;
|
||||
return jtag_execute_queue();
|
||||
if ( flush )
|
||||
err = jtag_execute_queue();
|
||||
return err;
|
||||
}
|
||||
|
||||
/** double word instruction */
|
||||
int dsp563xx_once_execute_dw_ir(struct jtag_tap *tap, uint32_t opcode, uint32_t operand)
|
||||
int dsp563xx_once_execute_dw_ir(struct jtag_tap *tap, int flush, uint32_t opcode, uint32_t operand)
|
||||
{
|
||||
int err;
|
||||
|
||||
if ((err = dsp563xx_once_ir_exec(tap, DSP563XX_ONCE_OPDBR, 0, 0, 0)) != ERROR_OK)
|
||||
if ((err = dsp563xx_once_ir_exec(tap, flush, DSP563XX_ONCE_OPDBR, 0, 0, 0)) != ERROR_OK)
|
||||
return err;
|
||||
if ((err = dsp563xx_write_dr_u32(tap, 0, opcode, 24, 0)) != ERROR_OK)
|
||||
return err;
|
||||
if ( flush )
|
||||
if ((err = jtag_execute_queue()) != ERROR_OK)
|
||||
return err;
|
||||
|
||||
if ((err = dsp563xx_once_ir_exec(tap, DSP563XX_ONCE_OPDBR, 0, 1, 0)) != ERROR_OK)
|
||||
if ((err = dsp563xx_once_ir_exec(tap, flush, DSP563XX_ONCE_OPDBR, 0, 1, 0)) != ERROR_OK)
|
||||
return err;
|
||||
if ((err = dsp563xx_write_dr_u32(tap, 0, operand, 24, 0)) != ERROR_OK)
|
||||
return err;
|
||||
if ( flush )
|
||||
if ((err = jtag_execute_queue()) != ERROR_OK)
|
||||
return err;
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
/** single word instruction */
|
||||
int dsp563xx_once_execute_sw_ir_nq(struct jtag_tap *tap, uint32_t opcode)
|
||||
{
|
||||
int err;
|
||||
|
||||
if ((err = dsp563xx_once_ir_exec_nq(tap, DSP563XX_ONCE_OPDBR, 0, 1, 0)) != ERROR_OK)
|
||||
return err;
|
||||
if ((err = dsp563xx_write_dr_u32(tap, 0, opcode, 24, 0)) != ERROR_OK)
|
||||
return err;
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
/** double word instruction */
|
||||
int dsp563xx_once_execute_dw_ir_nq(struct jtag_tap *tap, uint32_t opcode, uint32_t operand)
|
||||
{
|
||||
int err;
|
||||
|
||||
if ((err = dsp563xx_once_ir_exec_nq(tap, DSP563XX_ONCE_OPDBR, 0, 0, 0)) != ERROR_OK)
|
||||
return err;
|
||||
if ((err = dsp563xx_write_dr_u32(tap, 0, opcode, 24, 0)) != ERROR_OK)
|
||||
return err;
|
||||
if ((err = dsp563xx_once_ir_exec_nq(tap, DSP563XX_ONCE_OPDBR, 0, 1, 0)) != ERROR_OK)
|
||||
return err;
|
||||
if ((err = dsp563xx_write_dr_u32(tap, 0, operand, 24, 0)) != ERROR_OK)
|
||||
return err;
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -72,22 +72,16 @@ int dsp563xx_once_request_debug(struct jtag_tap *tap, int reset_state);
|
|||
int dsp563xx_once_target_status(struct jtag_tap *tap);
|
||||
|
||||
/** once read registers */
|
||||
int dsp563xx_once_read_register(struct jtag_tap *tap, struct once_reg *regs, int len);
|
||||
int dsp563xx_once_read_register(struct jtag_tap *tap, int flush, struct once_reg *regs, int len);
|
||||
/** once read register */
|
||||
int dsp563xx_once_reg_read_ex_nq(struct jtag_tap *tap, uint8_t reg, uint8_t len, uint32_t * data);
|
||||
int dsp563xx_once_reg_read_ex(struct jtag_tap *tap, int flush, uint8_t reg, uint8_t len, uint32_t * data);
|
||||
/** once read register */
|
||||
int dsp563xx_once_reg_read_ex(struct jtag_tap *tap, uint8_t reg, uint8_t len, uint32_t * data);
|
||||
/** once read register */
|
||||
int dsp563xx_once_reg_read(struct jtag_tap *tap, uint8_t reg, uint32_t * data);
|
||||
int dsp563xx_once_reg_read(struct jtag_tap *tap, int flush, uint8_t reg, uint32_t * data);
|
||||
/** once write register */
|
||||
int dsp563xx_once_reg_write(struct jtag_tap *tap, uint8_t reg, uint32_t data);
|
||||
int dsp563xx_once_reg_write(struct jtag_tap *tap, int flush, uint8_t reg, uint32_t data);
|
||||
/** single word instruction */
|
||||
int dsp563xx_once_execute_sw_ir(struct jtag_tap *tap, uint32_t opcode);
|
||||
int dsp563xx_once_execute_sw_ir(struct jtag_tap *tap, int flush, uint32_t opcode);
|
||||
/** double word instruction */
|
||||
int dsp563xx_once_execute_dw_ir(struct jtag_tap *tap, uint32_t opcode, uint32_t operand);
|
||||
/** single word instruction */
|
||||
int dsp563xx_once_execute_sw_ir_nq(struct jtag_tap *tap, uint32_t opcode);
|
||||
/** double word instruction */
|
||||
int dsp563xx_once_execute_dw_ir_nq(struct jtag_tap *tap, uint32_t opcode, uint32_t operand);
|
||||
int dsp563xx_once_execute_dw_ir(struct jtag_tap *tap, int flush, uint32_t opcode, uint32_t operand);
|
||||
|
||||
#endif /* DSP563XX_ONCE_H */
|
||||
|
|
|
|||
Loading…
Reference in New Issue