aarch64: reduce debug output to improve legibility
Suppress some very verbose LOG_DEBUG's that are not really useful any more. Change-Id: I67f10ba9510a9e34a027f378f4b62b8901ddc8a4 Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Reviewed-on: http://openocd.zylin.com/3984 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>gitignore-build
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06ba5492df
commit
fa8700cdd5
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@ -1333,9 +1333,6 @@ static int aarch64_write_apb_ap_memory(struct target *target,
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uint32_t dscr;
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uint8_t *tmp_buff = NULL;
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LOG_DEBUG("Writing APB-AP memory address 0x%" PRIx64 " size %" PRIu32 " count %" PRIu32,
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address, size, count);
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if (target->state != TARGET_HALTED) {
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LOG_WARNING("target not halted");
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return ERROR_TARGET_NOT_HALTED;
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@ -1484,9 +1481,6 @@ static int aarch64_read_apb_ap_memory(struct target *target,
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uint8_t *u8buf_ptr;
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uint32_t value;
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LOG_DEBUG("Reading APB-AP memory address 0x%" TARGET_PRIxADDR " size %" PRIu32 " count %" PRIu32,
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address, size, count);
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if (target->state != TARGET_HALTED) {
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LOG_WARNING("target not halted");
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return ERROR_TARGET_NOT_HALTED;
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@ -1634,8 +1628,6 @@ static int aarch64_read_phys_memory(struct target *target,
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uint32_t count, uint8_t *buffer)
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{
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int retval = ERROR_COMMAND_SYNTAX_ERROR;
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LOG_DEBUG("Reading memory at real address 0x%" TARGET_PRIxADDR "; size %" PRId32 "; count %" PRId32,
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address, size, count);
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if (count && buffer) {
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/* read memory through APB-AP */
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@ -1653,10 +1645,6 @@ static int aarch64_read_memory(struct target *target, target_addr_t address,
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int mmu_enabled = 0;
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int retval;
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/* aarch64 handles unaligned memory access */
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LOG_DEBUG("Reading memory at address 0x%" TARGET_PRIxADDR "; size %" PRId32 "; count %" PRId32, address,
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size, count);
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/* determine if MMU was enabled on target stop */
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retval = aarch64_mmu(target, &mmu_enabled);
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if (retval != ERROR_OK)
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@ -1680,9 +1668,6 @@ static int aarch64_write_phys_memory(struct target *target,
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{
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int retval = ERROR_COMMAND_SYNTAX_ERROR;
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LOG_DEBUG("Writing memory to real address 0x%" TARGET_PRIxADDR "; size %" PRId32 "; count %" PRId32, address,
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size, count);
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if (count && buffer) {
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/* write memory through APB-AP */
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retval = aarch64_mmu_modify(target, 0);
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@ -1700,10 +1685,6 @@ static int aarch64_write_memory(struct target *target, target_addr_t address,
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int mmu_enabled = 0;
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int retval;
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/* aarch64 handles unaligned memory access */
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LOG_DEBUG("Writing memory at address 0x%" TARGET_PRIxADDR "; size %" PRId32
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"; count %" PRId32, address, size, count);
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/* determine if MMU was enabled on target stop */
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retval = aarch64_mmu(target, &mmu_enabled);
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if (retval != ERROR_OK)
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@ -1086,9 +1086,6 @@ static int armv8_get_core_reg32(struct reg *reg)
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struct reg *reg64;
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int retval;
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LOG_DEBUG("reg.name:%s number:%i arm.num:%i value:0x%08" PRIx64,
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reg->name, reg->number, armv8_reg->num, buf_get_u64(reg->value, 0, 32));
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/* get the corresponding Aarch64 register */
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reg64 = cache->reg_list + armv8_reg->num;
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if (reg64->valid) {
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@ -71,7 +71,6 @@ enum arm_state armv8_dpm_get_core_state(struct arm_dpm *dpm)
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static int dpmv8_write_dcc(struct armv8_common *armv8, uint32_t data)
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{
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LOG_DEBUG("write DCC 0x%08" PRIx32, data);
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return mem_ap_write_u32(armv8->debug_ap,
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armv8->debug_base + CPUV8_DBG_DTRRX, data);
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}
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@ -79,7 +78,6 @@ static int dpmv8_write_dcc(struct armv8_common *armv8, uint32_t data)
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static int dpmv8_write_dcc_64(struct armv8_common *armv8, uint64_t data)
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{
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int ret;
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LOG_DEBUG("write DCC 0x%016" PRIx64, data);
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ret = mem_ap_write_u32(armv8->debug_ap,
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armv8->debug_base + CPUV8_DBG_DTRRX, data);
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if (ret == ERROR_OK)
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@ -116,7 +114,6 @@ static int dpmv8_read_dcc(struct armv8_common *armv8, uint32_t *data,
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data);
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if (retval != ERROR_OK)
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return retval;
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LOG_DEBUG("read DCC 0x%08" PRIx32, *data);
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if (dscr_p)
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*dscr_p = dscr;
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@ -161,7 +158,6 @@ static int dpmv8_read_dcc_64(struct armv8_common *armv8, uint64_t *data,
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return retval;
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*data = *(uint32_t *)data | (uint64_t)higher << 32;
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LOG_DEBUG("read DCC 0x%16.16" PRIx64, *data);
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if (dscr_p)
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*dscr_p = dscr;
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@ -220,8 +216,6 @@ static int dpmv8_exec_opcode(struct arm_dpm *dpm,
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uint32_t dscr = dpm->dscr;
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int retval;
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LOG_DEBUG("exec opcode 0x%08" PRIx32, opcode);
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if (p_dscr)
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dscr = *p_dscr;
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