zcy
/
tinyriscv-openocd
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

build: fix clang warnings 

Change-Id: I3c6a63a18034535f0a8c2c62ba8a708f09d7839b
Signed-off-by: Martin Nowak <dawg@dawgfoto.de>
Reviewed-on: http://openocd.zylin.com/765
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
__archive__
Martin Nowak 2012-08-01 22:35:04 +02:00 committed by Freddie Chopin
parent 78f4f95648
commit f97a159411
4 changed files with 5 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/flash/mflash.c
View File

@ -510,7 +510,7 @@ static int mg_mflash_read_sects(void *buff, uint32_t sect_num, uint32_t sect_cnt
}
static int mg_mflash_do_write_sects(void *buff, uint32_t sect_num, uint32_t sect_cnt,
mg_io_type_cmd cmd)
uint8_t cmd)
{
uint32_t i, address;
int ret;

2
src/target/arm_disassembler.c
View File

@ -2890,7 +2890,7 @@ static int t2ev_cond_b(uint32_t opcode, uint32_t address,
offset = opcode & 0x7ff;
offset |= (opcode & 0x003f0000) >> 5;
if (opcode & (1 << 26)) {
offset |= 0xffff << 19;
offset |= 0x1fff << 19;
if ((opcode & (1 << 11)) == 0)
b17 = 0;
if ((opcode & (1 << 13)) == 0)

4
src/target/arm_simulator.c
View File

@ -524,7 +524,7 @@ static int arm_simulate_step_core(struct target *target,
switch (instruction.info.load_store_multiple.addressing_mode) {
case 0: /* Increment after */
Rn = Rn;
/* Rn = Rn; */
break;
case 1: /* Increment before */
Rn = Rn + 4;
@ -604,7 +604,7 @@ static int arm_simulate_step_core(struct target *target,
switch (instruction.info.load_store_multiple.addressing_mode) {
case 0: /* Increment after */
Rn = Rn;
/* Rn = Rn; */
break;
case 1: /* Increment before */
Rn = Rn + 4;

2
src/target/armv7a.c
View File

@ -387,7 +387,7 @@ static int armv7a_flush_all_data(struct target *target)
head = target->head;
while (head != (struct target_list *)NULL) {
curr = head->target;
if ((curr->state == TARGET_HALTED)) {
if (curr->state == TARGET_HALTED) {
LOG_INFO("Wait flushing data l1 on core %d", curr->coreid);
retval = _armv7a_flush_all_data(curr);
}