diff --git a/NEWS b/NEWS index 7387d7057..1a024e454 100644 --- a/NEWS +++ b/NEWS @@ -8,6 +8,8 @@ JTAG Layer: Boundary Scan: Target Layer: + ARM + - renamed "armv4_5" command prefix as "arm" ARM11 - Preliminary ETM and ETB hookup - accelerated "flash erase_check" diff --git a/doc/openocd.texi b/doc/openocd.texi index 81409acce..092de7d37 100644 --- a/doc/openocd.texi +++ b/doc/openocd.texi @@ -5515,16 +5515,14 @@ Reports whether the capture clock is locked or not. @end deffn -@section ARMv4 and ARMv5 Architecture -@cindex ARMv4 -@cindex ARMv5 +@section Generic ARM +@cindex ARM -These commands are specific to ARM architecture v4 and v5, -including all ARM7 or ARM9 systems and Intel XScale. +These commands should be available on all ARM processors. They are available in addition to other core-specific commands that may be available. -@deffn Command {armv4_5 core_state} [@option{arm}|@option{thumb}] +@deffn Command {arm core_state} [@option{arm}|@option{thumb}] Displays the core_state, optionally changing it to process either @option{arm} or @option{thumb} instructions. The target may later be resumed in the currently set core_state. @@ -5532,7 +5530,7 @@ The target may later be resumed in the currently set core_state. that is not currently supported in OpenOCD.) @end deffn -@deffn Command {armv4_5 disassemble} address [count [@option{thumb}]] +@deffn Command {arm disassemble} address [count [@option{thumb}]] @cindex disassemble Disassembles @var{count} instructions starting at @var{address}. If @var{count} is not specified, a single instruction is disassembled. @@ -5543,7 +5541,7 @@ else ARM (32-bit) instructions are used. those instructions are not currently understood by OpenOCD.) @end deffn -@deffn Command {armv4_5 reg} +@deffn Command {arm reg} Display a table of all banked core registers, fetching the current value from every core mode if necessary. OpenOCD versions before rev. 60 didn't fetch the current register value. diff --git a/src/helper/startup.tcl b/src/helper/startup.tcl index 73c4cf19c..096f03a8e 100644 --- a/src/helper/startup.tcl +++ b/src/helper/startup.tcl @@ -142,6 +142,15 @@ proc ocd_gdb_restart {target_id} { reset halt } +######### + +# Temporary migration aid. May be removed starting in January 2011. +proc armv4_5 params { + echo "DEPRECATED! use 'arm $params' not 'armv4_5 $params'" + arm $params +} + +######### # This reset logic may be overridden by board/target/... scripts as needed # to provide a reset that, if possible, is close to a power-up reset. diff --git a/src/target/armv4_5.c b/src/target/armv4_5.c index e112e7b11..7c4861fff 100644 --- a/src/target/armv4_5.c +++ b/src/target/armv4_5.c @@ -363,10 +363,10 @@ COMMAND_HANDLER(handle_armv4_5_reg_command) struct target *target = get_current_target(cmd_ctx); struct armv4_5_common_s *armv4_5 = target_to_armv4_5(target); - if (armv4_5->common_magic != ARMV4_5_COMMON_MAGIC) + if (!is_arm(armv4_5)) { - command_print(cmd_ctx, "current target isn't an ARMV4/5 target"); - return ERROR_OK; + command_print(cmd_ctx, "current target isn't an ARM"); + return ERROR_FAIL; } if (target->state != TARGET_HALTED) @@ -412,10 +412,10 @@ COMMAND_HANDLER(handle_armv4_5_core_state_command) struct target *target = get_current_target(cmd_ctx); struct armv4_5_common_s *armv4_5 = target_to_armv4_5(target); - if (armv4_5->common_magic != ARMV4_5_COMMON_MAGIC) + if (!is_arm(armv4_5)) { - command_print(cmd_ctx, "current target isn't an ARMV4/5 target"); - return ERROR_OK; + command_print(cmd_ctx, "current target isn't an ARM"); + return ERROR_FAIL; } if (argc > 0) @@ -471,7 +471,7 @@ COMMAND_HANDLER(handle_armv4_5_disassemble_command) default: usage: command_print(cmd_ctx, - "usage: armv4_5 disassemble
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