warnings: fix alignment warnings

These warnings are for architectures that do not
support non-aligned word access.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
__archive__
Øyvind Harboe 2010-09-03 22:49:37 +02:00
parent 32ab98c9e9
commit f6a3fc818b
13 changed files with 23 additions and 23 deletions

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@ -1121,7 +1121,7 @@ static int mg_storage_config(void)
!= ERROR_OK)
return ret;
mg_gen_ataid((mg_io_type_drv_info *)buff);
mg_gen_ataid((mg_io_type_drv_info *)(void *)buff);
if ((ret = mg_mflash_do_write_sects(buff, 0, 1, mg_vcmd_update_stgdrvinfo))
!= ERROR_OK)
@ -1149,7 +1149,7 @@ static int mg_boot_config(void)
buff[0] = mg_op_mode_snd; /* operation mode */
buff[1] = MG_UNLOCK_OTP_AREA;
buff[2] = 4; /* boot size */
*((uint32_t *)(buff + 4)) = 0; /* XIP size */
*((uint32_t *)(void *)(buff + 4)) = 0; /* XIP size */
if ((ret = mg_mflash_do_write_sects(buff, 0, 1, mg_vcmd_update_xipinfo))
!= ERROR_OK)

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@ -1119,9 +1119,9 @@ static int lpc3180_read_page(struct nand_device *nand, uint32_t page, uint8_t *d
target_read_memory(target, target_mem_base+SPARE_OFFS, 4, 16, ecc_flash_buffer);
target_read_memory(target, target_mem_base+ECC_OFFS, 4, 8, ecc_hw_buffer);
for(i=0;i<idx;i++){
if( (0x00ffffff&*(uint32_t *)(ecc_hw_buffer+i*8)) != (0x00ffffff&*(uint32_t *)(ecc_flash_buffer+8+i*16)) )
if( (0x00ffffff&*(uint32_t *)(void *)(ecc_hw_buffer+i*8)) != (0x00ffffff&*(uint32_t *)(void *)(ecc_flash_buffer+8+i*16)) )
LOG_WARNING("ECC mismatch at 256 bytes size block= %d at page= 0x%" PRIx32,i*2+1,page);
if( (0x00ffffff&*(uint32_t *)(ecc_hw_buffer+4+i*8)) != (0x00ffffff&*(uint32_t *)(ecc_flash_buffer+12+i*16)) )
if( (0x00ffffff&*(uint32_t *)(void *)(ecc_hw_buffer+4+i*8)) != (0x00ffffff&*(uint32_t *)(void *)(ecc_flash_buffer+12+i*16)) )
LOG_WARNING("ECC mismatch at 256 bytes size block= %d at page= 0x%" PRIx32,i*2+2,page);
}
}

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@ -1702,7 +1702,7 @@ sam3_get_reg_ptr(struct sam3_cfg *pCfg, const struct sam3_reg_list *pList)
// By using prototypes - we can detect what would
// be casting errors.
return ((uint32_t *)(((char *)(pCfg)) + pList->struct_offset));
return ((uint32_t *)(void *)(((char *)(pCfg)) + pList->struct_offset));
}
@ -1756,7 +1756,7 @@ sam3_GetReg(struct sam3_chip *pChip, uint32_t *goes_here)
// calculate where this one go..
// it is "possibly" this register.
pPossible = ((uint32_t *)(((char *)(&(pChip->cfg))) + pReg->struct_offset));
pPossible = ((uint32_t *)(void *)(((char *)(&(pChip->cfg))) + pReg->struct_offset));
// well? Is it this register
if (pPossible == goes_here) {

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@ -80,7 +80,7 @@ typedef bool _Bool;
*/
#define container_of(ptr, type, member) ({ \
const typeof( ((type *)0)->member ) *__mptr = (ptr); \
(type *)( (char *)__mptr - offsetof(type,member) );})
(type *)( (void *) ( (char *)__mptr - offsetof(type,member) ) );})
/**

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@ -78,7 +78,7 @@ static int virtex2_send_32(struct pld_device *pld_device,
static __inline__ void virtexflip32(jtag_callback_data_t arg)
{
uint8_t *in = (uint8_t *)arg;
*((uint32_t *)in) = flip_u32(le_to_h_u32(in), 32);
*((uint32_t *)arg) = flip_u32(le_to_h_u32(in), 32);
}
static int virtex2_receive_32(struct pld_device *pld_device,

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@ -901,7 +901,7 @@ static int arm11_read_memory_inner(struct target *target,
{
uint32_t instr = !arm11_config_memrw_no_increment ? 0xecb05e01 : 0xed905e00;
/** \todo TODO: buffer cast to uint32_t* causes alignment warnings */
uint32_t *words = (uint32_t *)buffer;
uint32_t *words = (uint32_t *)(void *)buffer;
/* LDC p14,c5,[R0],#4 */
/* LDC p14,c5,[R0] */
@ -1023,7 +1023,7 @@ static int arm11_write_memory_inner(struct target *target,
uint32_t instr = !no_increment ? 0xeca05e01 : 0xed805e00;
/** \todo TODO: buffer cast to uint32_t* causes alignment warnings */
uint32_t *words = (uint32_t*)buffer;
uint32_t *words = (uint32_t*)(void *)buffer;
/* "burst" here just means trusting each instruction executes
* fully before we run the next one: per-word roundtrips, to

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@ -316,7 +316,7 @@ int mem_ap_write_buf_u32(struct adiv5_dap *dap, uint8_t *buffer, int count, uint
for (writecount = 0; writecount < blocksize; writecount++)
{
retval = dap_queue_ap_write(dap, AP_REG_DRW,
*(uint32_t *) (buffer + 4 * writecount));
*(uint32_t *) ((void *) (buffer + 4 * writecount)));
if (retval != ERROR_OK)
break;
}

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@ -77,13 +77,13 @@ int arm_jtag_setup_connection(struct arm_jtag *jtag_info);
static __inline__ void arm7flip32(jtag_callback_data_t arg)
{
uint8_t *in = (uint8_t *)arg;
*((uint32_t *)in) = flip_u32(le_to_h_u32(in), 32);
*((uint32_t *)arg) = flip_u32(le_to_h_u32(in), 32);
}
static __inline__ void arm_le_to_h_u32(jtag_callback_data_t arg)
{
uint8_t *in = (uint8_t *)arg;
*((uint32_t *)in) = le_to_h_u32(in);
*((uint32_t *)arg) = le_to_h_u32(in);
}

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@ -499,10 +499,10 @@ static int avr32_ap7k_read_memory(struct target *target, uint32_t address,
switch (size)
{
case 4:
return avr32_jtag_read_memory32(&ap7k->jtag, address, count, (uint32_t*)buffer);
return avr32_jtag_read_memory32(&ap7k->jtag, address, count, (uint32_t*)(void *)buffer);
break;
case 2:
return avr32_jtag_read_memory16(&ap7k->jtag, address, count, (uint16_t*)buffer);
return avr32_jtag_read_memory16(&ap7k->jtag, address, count, (uint16_t*)(void *)buffer);
break;
case 1:
return avr32_jtag_read_memory8(&ap7k->jtag, address, count, buffer);
@ -537,10 +537,10 @@ static int avr32_ap7k_write_memory(struct target *target, uint32_t address,
switch (size)
{
case 4:
return avr32_jtag_write_memory32(&ap7k->jtag, address, count, (uint32_t*)buffer);
return avr32_jtag_write_memory32(&ap7k->jtag, address, count, (uint32_t*)(void *)buffer);
break;
case 2:
return avr32_jtag_write_memory16(&ap7k->jtag, address, count, (uint16_t*)buffer);
return avr32_jtag_write_memory16(&ap7k->jtag, address, count, (uint16_t*)(void *)buffer);
break;
case 1:
return avr32_jtag_write_memory8(&ap7k->jtag, address, count, buffer);

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@ -112,7 +112,7 @@ int avr32_jtag_read_memory8(struct avr32_jtag *jtag_info,
if (addr & 3)
{
retval = avr32_jtag_mwa_read(jtag_info, SLAVE_HSB_UNCACHED,
addr + i, (uint32_t*)data);
addr + i, (uint32_t*)(void *)data);
if (retval != ERROR_OK)
return retval;
@ -126,7 +126,7 @@ int avr32_jtag_read_memory8(struct avr32_jtag *jtag_info,
for (; i < (count & ~3); i+=4)
{
retval = avr32_jtag_mwa_read(jtag_info, SLAVE_HSB_UNCACHED,
addr + i, (uint32_t*)data);
addr + i, (uint32_t*)(void *)data);
if (retval != ERROR_OK)
return retval;
@ -139,7 +139,7 @@ int avr32_jtag_read_memory8(struct avr32_jtag *jtag_info,
if (i < count)
{
retval = avr32_jtag_mwa_read(jtag_info, SLAVE_HSB_UNCACHED,
addr + i, (uint32_t*)data);
addr + i, (uint32_t*)(void *)data);
if (retval != ERROR_OK)
return retval;

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@ -166,7 +166,7 @@ static void etb_getbuf(jtag_callback_data_t arg)
{
uint8_t *in = (uint8_t *)arg;
*((uint32_t *)in) = buf_get_u32(in, 0, 32);
*((uint32_t *)arg) = buf_get_u32(in, 0, 32);
}

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@ -1000,7 +1000,7 @@ static int mips_m4k_bulk_write_memory(struct target *target, uint32_t address,
}
retval = mips32_pracc_fastdata_xfer(ejtag_info, source, write_t, address,
count, (uint32_t*) buffer);
count, (uint32_t*) (void *)buffer);
if (retval != ERROR_OK)
{
/* FASTDATA access failed, try normal memory write */

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@ -244,7 +244,7 @@ static int xscale_read_dcsr(struct target *target)
static void xscale_getbuf(jtag_callback_data_t arg)
{
uint8_t *in = (uint8_t *)arg;
*((uint32_t *)in) = buf_get_u32(in, 0, 32);
*((uint32_t *)arg) = buf_get_u32(in, 0, 32);
}
static int xscale_receive(struct target *target, uint32_t *buffer, int num_words)