diff --git a/doc/openocd.texi b/doc/openocd.texi
index 776160a0b..d878da09e 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -5673,7 +5673,7 @@ Triggering a mass erase is also useful when users want to disable readout protec
 All versions of the SimpleLink CC13xx and CC26xx microcontrollers from Texas
 Instruments include internal flash. The cc26xx flash driver supports both the
 CC13xx and CC26xx family of devices. The driver automatically recognizes the
-specific version's flash parameters and autoconfigures itself. Flash bank 0
+specific version's flash parameters and autoconfigures itself. The flash bank
 starts at address 0.
 
 @example
diff --git a/src/flash/nor/cc26xx.c b/src/flash/nor/cc26xx.c
index 7b8744143..0320e92c4 100644
--- a/src/flash/nor/cc26xx.c
+++ b/src/flash/nor/cc26xx.c
@@ -491,11 +491,6 @@ static int cc26xx_auto_probe(struct flash_bank *bank)
 
 	int retval = ERROR_OK;
 
-	if (bank->bank_number != 0) {
-		/* Invalid bank number somehow */
-		return ERROR_FAIL;
-	}
-
 	if (!cc26xx_bank->probed)
 		retval = cc26xx_probe(bank);
 
diff --git a/tcl/target/cc2538.cfg b/tcl/target/cc2538.cfg
index 81593c105..63fd9c267 100755
--- a/tcl/target/cc2538.cfg
+++ b/tcl/target/cc2538.cfg
@@ -1,16 +1,45 @@
 # Config for Texas Instruments low power RF SoC CC2538
 # http://www.ti.com/lit/pdf/swru319
 
+adapter_khz 100
+
+source [find target/icepick.cfg]
+source [find target/ti-cjtag.cfg]
+
 if { [info exists CHIPNAME] } {
-   set CHIPNAME $CHIPNAME
+	set _CHIPNAME $CHIPNAME
 } else {
-   set CHIPNAME cc2538
+	set _CHIPNAME cc2538
 }
 
+#
+# Main DAP
+#
+if { [info exists DAP_TAPID] } {
+	set _DAP_TAPID $DAP_TAPID
+} else {
+	set _DAP_TAPID 0x8B96402F
+}
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_DAP_TAPID -disable
+jtag configure $_CHIPNAME.cpu -event tap-enable "icepick_c_tapenable $_CHIPNAME.jrc 0"
+
+#
+# ICEpick-C (JTAG route controller)
+#
 if { [info exists JRC_TAPID] } {
-   set JRC_TAPID $JRC_TAPID
+	set _JRC_TAPID $JRC_TAPID
 } else {
-   set JRC_TAPID 0x8B96402F
+	set _JRC_TAPID 0x8B96402F
 }
+jtag newtap $_CHIPNAME jrc -irlen 6 -ircapture 0x1 -irmask 0x3f -expected-id $_JRC_TAPID -ignore-version
+# A start sequence is needed to change from cJTAG (Compact JTAG) to
+# 4-pin JTAG before talking via JTAG commands
+jtag configure $_CHIPNAME.jrc -event setup "jtag tapenable $_CHIPNAME.cpu"
+jtag configure $_CHIPNAME.jrc -event post-reset "ti_cjtag_to_4pin_jtag $_CHIPNAME.jrc"
 
-source [find target/cc26xx.cfg]
+#
+# Cortex-M3 target
+#
+set _TARGETNAME $_CHIPNAME.cpu
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
+target create $_TARGETNAME cortex_m -dap $_CHIPNAME.dap