fix flash driver size, sector erase
parent
56d3927abf
commit
f4a3db0d4a
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@ -41,17 +41,13 @@ struct dsp5680xx_flash_bank {
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};
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};
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static int dsp5680xx_build_sector_list(struct flash_bank *bank){
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static int dsp5680xx_build_sector_list(struct flash_bank *bank){
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//LOG_USER("%s not implemented",__FUNCTION__);
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uint32_t offset = HFM_FLASH_BASE_ADDR;
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//return ERROR_OK;
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// sector size is 512
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// bank->num_sectors = bank->size / 512; // Bank size is actually 0x2000, but it is set much higher as part of the workaround for byte/word addressing issues.
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bank->sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors);
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bank->sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors);
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int i;
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int i;
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for (i = 0; i < bank->num_sectors; ++i){
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for (i = 0; i < bank->num_sectors; ++i){
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bank->sectors[i].offset = 0;// not implemented.
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bank->sectors[i].offset = i*HFM_SECTOR_SIZE;
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bank->sectors[i].size = HFM_SECTOR_SIZE;
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bank->sectors[i].size = HFM_SECTOR_SIZE;
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//offset += bank->sectors[i].size;
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offset += bank->sectors[i].size;
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bank->sectors[i].is_erased = -1;
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bank->sectors[i].is_erased = -1;
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bank->sectors[i].is_protected = -1;
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bank->sectors[i].is_protected = -1;
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}
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}
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@ -67,9 +63,9 @@ FLASH_BANK_COMMAND_HANDLER(dsp5680xx_flash_bank_command){
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nbank = malloc(sizeof(struct dsp5680xx_flash_bank));
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nbank = malloc(sizeof(struct dsp5680xx_flash_bank));
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bank->base = HFM_FLASH_BASE_ADDR;
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bank->base = HFM_FLASH_BASE_ADDR;
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bank->size = HFM_SIZE; // top 4k not accessible
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bank->size = HFM_SIZE_BYTES; // top 4k not accessible
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bank->driver_priv = nbank;
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bank->driver_priv = nbank;
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bank->num_sectors = HFM_SECTOR_COUNT;// This number is anything >0. not really used.
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bank->num_sectors = HFM_SECTOR_COUNT;
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dsp5680xx_build_sector_list(bank);
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dsp5680xx_build_sector_list(bank);
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return ERROR_OK;
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return ERROR_OK;
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@ -77,30 +73,40 @@ FLASH_BANK_COMMAND_HANDLER(dsp5680xx_flash_bank_command){
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static int dsp5680xx_flash_protect_check(struct flash_bank *bank){
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static int dsp5680xx_flash_protect_check(struct flash_bank *bank){
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int retval = ERROR_OK;
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int retval = ERROR_OK;
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uint8_t protected = 0;
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uint16_t protected = 0;
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if(bank->sectors[0].is_protected == -1){
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retval = dsp5680xx_f_protect_check(bank->target,&protected);
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retval = dsp5680xx_f_protect_check(bank->target,&protected);
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if(retval == ERROR_OK)
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if(retval != ERROR_OK){
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if(protected)
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for(int i = 0;i<HFM_SECTOR_COUNT;i++)
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bank->sectors[0].is_protected = 1;
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bank->sectors[i].is_protected = -1;
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else
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return ERROR_OK;
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bank->sectors[0].is_protected = 0;
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}
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else
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for(int i = 0;i<HFM_SECTOR_COUNT/2;i++){
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bank->sectors[0].is_protected = -1;
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if(protected & 1){
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bank->sectors[2*i].is_protected = 1;
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bank->sectors[2*i+1].is_protected = 1;
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}else{
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bank->sectors[2*i].is_protected = 0;
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bank->sectors[2*i+1].is_protected = 0;
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}
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protected = (protected >> 1);
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}
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}
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return retval;
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return retval;
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}
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}
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static int dsp5680xx_flash_protect(struct flash_bank *bank, int set, int first, int last){
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static int dsp5680xx_flash_protect(struct flash_bank *bank, int set, int first, int last){
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// This applies security to flash module after next reset, it does not actually apply protection (protection refers to undesired access from the core)
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int retval;
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int retval;
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if(set){
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if(set){
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retval = dsp5680xx_f_lock(bank->target);
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retval = dsp5680xx_f_lock(bank->target);
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if(retval == ERROR_OK)
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if(retval == ERROR_OK){
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bank->sectors[0].is_protected = 1;
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for(int i = first;i<last;i++)
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bank->sectors[i].is_protected = 1;
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}
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}else{
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}else{
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retval = dsp5680xx_f_unlock(bank->target);
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retval = dsp5680xx_f_unlock(bank->target);
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if(retval == ERROR_OK)
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if(retval == ERROR_OK)
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bank->sectors[0].is_protected = 0;
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for(int i = first;i<last;i++)
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bank->sectors[i].is_protected = 0;
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}
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}
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return retval;
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return retval;
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}
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}
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@ -167,24 +173,30 @@ static int dsp5680xx_flash_erase(struct flash_bank * bank, int first, int last){
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int retval;
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int retval;
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retval = dsp5680xx_f_erase(bank->target, (uint32_t) first, (uint32_t) last);
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retval = dsp5680xx_f_erase(bank->target, (uint32_t) first, (uint32_t) last);
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if(retval == ERROR_OK)
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if(retval == ERROR_OK)
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bank->sectors[0].is_erased = 1;
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for(int i = first;i<=last;i++)
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bank->sectors[i].is_erased = 1;
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else
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else
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bank->sectors[0].is_erased = -1;
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// If an error occurred unknown status is set even though some sector could have been correctly erased.
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for(int i = first;i<=last;i++)
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bank->sectors[i].is_erased = -1;
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return retval;
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return retval;
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}
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}
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static int dsp5680xx_flash_erase_check(struct flash_bank * bank){
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static int dsp5680xx_flash_erase_check(struct flash_bank * bank){
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int retval = ERROR_OK;
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int retval = ERROR_OK;
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uint8_t erased = 0;
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uint8_t erased = 0;
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if(bank->sectors[0].is_erased == -1){
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uint32_t i;
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retval = dsp5680xx_f_erase_check(bank->target,&erased);
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for(i=0;i<HFM_SECTOR_COUNT;i++){
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if(bank->sectors[i].is_erased == -1){
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retval = dsp5680xx_f_erase_check(bank->target,&erased,i);
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if (retval != ERROR_OK){
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if (retval != ERROR_OK){
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bank->sectors[0].is_erased = -1;
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bank->sectors[i].is_erased = -1;
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}else{
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}else{
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if(erased)
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if(erased)
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bank->sectors[0].is_erased = 1;
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bank->sectors[i].is_erased = 1;
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else
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else
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bank->sectors[0].is_erased = 0;
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bank->sectors[i].is_erased = 0;
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}
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}
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}
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}
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}
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return retval;
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return retval;
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@ -244,17 +244,6 @@ static int eonce_read_status_reg(struct target * target, uint16_t * data){
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return retval;
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return retval;
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}
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}
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static int dsp5680xx_obase_addr(struct target * target, uint32_t * addr){
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// Finds out the default value of the OBASE register address.
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int retval;
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uint32_t data_to_shift_into_dr;// just to make jtag happy
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retval = eonce_instruction_exec(target,DSP5680XX_ONCE_OBASE,1,0,0,NULL);
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err_check_propagate(retval);
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retval = dsp5680xx_drscan(target,(uint8_t *)& data_to_shift_into_dr,(uint8_t *) addr, 8);
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err_check_propagate(retval);
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return retval;
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}
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static int dsp5680xx_halt(struct target *target){
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static int dsp5680xx_halt(struct target *target){
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int retval;
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int retval;
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uint8_t jtag_status;
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uint8_t jtag_status;
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@ -614,24 +603,15 @@ static int eonce_move_value_to_pc(struct target * target, uint32_t value)
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static int eonce_load_TX_RX_to_r0(struct target * target)
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static int eonce_load_TX_RX_to_r0(struct target * target)
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{
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{
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uint32_t obase_addr;
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int retval;
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int retval = dsp5680xx_obase_addr(target,& obase_addr);
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retval = eonce_move_long_to_r0(target,((MC568013_EONCE_TX_RX_ADDR)+(MC568013_EONCE_OBASE_ADDR<<16)));
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err_check_propagate(retval);
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retval = eonce_move_long_to_r0(target,((MC568013_EONCE_TX_RX_ADDR)+(obase_addr<<16)));
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return retval;
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return retval;
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}
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}
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static int eonce_load_TX_RX_high_to_r0(struct target * target)
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static int eonce_load_TX_RX_high_to_r0(struct target * target)
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{
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{
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uint32_t obase_addr;
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int retval = 0;
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int retval = dsp5680xx_obase_addr(target,& obase_addr);
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retval = eonce_move_long_to_r0(target,((MC568013_EONCE_TX1_RX1_HIGH_ADDR)+(MC568013_EONCE_OBASE_ADDR<<16)));
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err_check_propagate(retval);
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if(!(obase_addr && 0xff)){
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LOG_USER("%s: OBASE address read as 0x%04X instead of 0xFF.",__FUNCTION__,obase_addr);
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return ERROR_FAIL;
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}
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eonce_move_long_to_r0(target,((MC568013_EONCE_TX1_RX1_HIGH_ADDR)+(obase_addr<<16)));
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err_check_propagate(retval);
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return retval;
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return retval;
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}
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}
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@ -804,11 +784,11 @@ static int dsp5680xx_write_8(struct target * target, uint32_t address, uint32_t
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uint16_t * data_w = (uint16_t *)data;
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uint16_t * data_w = (uint16_t *)data;
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uint32_t iter;
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uint32_t iter;
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int counter = FLUSH_COUNT_WRITE;
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int counter = FLUSH_COUNT_READ_WRITE;
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for(iter = 0; iter<count/2; iter++){
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for(iter = 0; iter<count/2; iter++){
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if(--counter==0){
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if(--counter==0){
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context.flush = 1;
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context.flush = 1;
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counter = FLUSH_COUNT_WRITE;
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counter = FLUSH_COUNT_READ_WRITE;
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}
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}
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retval = dsp5680xx_write_16_single(target,address+iter,data_w[iter], pmem);
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retval = dsp5680xx_write_16_single(target,address+iter,data_w[iter], pmem);
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if(retval != ERROR_OK){
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if(retval != ERROR_OK){
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@ -843,14 +823,12 @@ static int dsp5680xx_write_16(struct target * target, uint32_t address, uint32_t
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err_check(retval,"Target must be halted.");
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err_check(retval,"Target must be halted.");
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};
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};
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uint32_t iter;
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uint32_t iter;
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int counter = FLUSH_COUNT_READ_WRITE;
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int counter_reset = FLUSH_COUNT_WRITE;
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int counter = counter_reset;
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for(iter = 0; iter<count; iter++){
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for(iter = 0; iter<count; iter++){
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if(--counter==0){
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if(--counter==0){
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context.flush = 1;
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context.flush = 1;
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counter = counter_reset;
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counter = FLUSH_COUNT_READ_WRITE;
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}
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}
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retval = dsp5680xx_write_16_single(target,address+iter,data[iter], pmem);
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retval = dsp5680xx_write_16_single(target,address+iter,data[iter], pmem);
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if(retval != ERROR_OK){
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if(retval != ERROR_OK){
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@ -871,14 +849,12 @@ static int dsp5680xx_write_32(struct target * target, uint32_t address, uint32_t
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err_check(retval,"Target must be halted.");
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err_check(retval,"Target must be halted.");
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};
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};
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uint32_t iter;
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uint32_t iter;
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int counter = FLUSH_COUNT_READ_WRITE;
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int counter_reset = FLUSH_COUNT_WRITE;
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int counter = counter_reset;
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for(iter = 0; iter<count; iter++){
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for(iter = 0; iter<count; iter++){
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if(--counter==0){
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if(--counter==0){
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context.flush = 1;
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context.flush = 1;
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counter = counter_reset;
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counter = FLUSH_COUNT_READ_WRITE;
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}
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}
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retval = dsp5680xx_write_32_single(target,address+(iter<<1),data[iter], pmem);
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retval = dsp5680xx_write_32_single(target,address+(iter<<1),data[iter], pmem);
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if(retval != ERROR_OK){
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if(retval != ERROR_OK){
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@ -1026,29 +1002,19 @@ static int dsp5680xx_soft_reset_halt(struct target *target){
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return retval;
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return retval;
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}
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}
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int dsp5680xx_f_protect_check(struct target * target, uint8_t * protected) {
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int dsp5680xx_f_protect_check(struct target * target, uint16_t * protected) {
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uint16_t i,j;
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uint16_t aux;
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int retval;
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int retval;
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if (dsp5680xx_target_status(target,NULL,NULL) != TARGET_HALTED){
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if (dsp5680xx_target_status(target,NULL,NULL) != TARGET_HALTED){
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retval = dsp5680xx_halt(target);
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retval = dsp5680xx_halt(target);
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err_check_propagate(retval);
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err_check_propagate(retval);
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}
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}
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retval = eonce_load_TX_RX_high_to_r0(target);
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if(protected == NULL){
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err_check(ERROR_FAIL,"NULL pointer not valid.");
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}
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retval = dsp5680xx_read_16_single(target,HFM_BASE_ADDR|HFM_PROT,&aux,0);
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err_check_propagate(retval);
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err_check_propagate(retval);
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retval = eonce_move_value_to_y0(target,0x1234);
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*protected = aux;
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err_check_propagate(retval);
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retval = eonce_move_y0_at_r0(target);
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err_check_propagate(retval);
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retval = eonce_rx_upper_data(target,&i);
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err_check_propagate(retval);
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retval = eonce_move_value_to_y0(target,0x4321);
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err_check_propagate(retval);
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retval = eonce_move_y0_at_r0(target);
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err_check_propagate(retval);
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retval = eonce_rx_upper_data(target,&j);
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err_check_propagate(retval);
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if(protected!=NULL)
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*protected = (uint8_t) ((i!=0x1234)||(j!=0x4321));
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return retval;
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return retval;
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}
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}
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@ -1171,32 +1137,15 @@ static int dsp5680xx_f_signature(struct target * target, uint32_t address, uint3
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return retval;
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return retval;
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}
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}
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int dsp5680xx_f_erase_check(struct target * target, uint8_t * erased){
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int dsp5680xx_f_erase_check(struct target * target, uint8_t * erased,uint32_t sector){
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int retval;
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int retval;
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uint16_t hfm_ustat;
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uint16_t hfm_ustat;
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if (dsp5680xx_target_status(target,NULL,NULL) != TARGET_HALTED){
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if (dsp5680xx_target_status(target,NULL,NULL) != TARGET_HALTED){
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retval = dsp5680xx_halt(target);
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retval = dsp5680xx_halt(target);
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err_check_propagate(retval);
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err_check_propagate(retval);
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}
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}
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// -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
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// Check security
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// -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
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uint8_t protected;
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retval = dsp5680xx_f_protect_check(target,&protected);
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err_check_propagate(retval);
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if(protected){
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retval = ERROR_TARGET_FAILURE;
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err_check(retval,"Failed to erase, flash is still protected.");
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}
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// -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
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// Set hfmdiv
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// -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
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retval = eonce_set_hfmdiv(target);
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err_check_propagate(retval);
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// Check if chip is already erased.
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// Check if chip is already erased.
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// Since only mass erase is currently implemented, only the first sector is checked (assuming no code will leave it unused)
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retval = dsp5680xx_f_execute_command(target,HFM_ERASE_VERIFY,HFM_FLASH_BASE_ADDR+sector*HFM_SECTOR_SIZE/2,0,&hfm_ustat,1); // blank check
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retval = dsp5680xx_f_execute_command(target,HFM_ERASE_VERIFY,HFM_FLASH_BASE_ADDR+0*HFM_SECTOR_SIZE,0,&hfm_ustat,1); // blank check
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err_check_propagate(retval);
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err_check_propagate(retval);
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if (hfm_ustat&HFM_USTAT_MASK_PVIOL_ACCER){
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if (hfm_ustat&HFM_USTAT_MASK_PVIOL_ACCER){
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retval = ERROR_TARGET_FAILURE;
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retval = ERROR_TARGET_FAILURE;
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@ -1207,13 +1156,21 @@ int dsp5680xx_f_erase_check(struct target * target, uint8_t * erased){
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return retval;
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return retval;
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}
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}
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int dsp5680xx_f_erase(struct target * target, int first, int last){
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static int erase_sector(struct target * target, int sector, uint16_t * hfm_ustat){
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//TODO implement erasing individual sectors.
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||||||
int retval;
|
int retval;
|
||||||
if(first||last){
|
retval = dsp5680xx_f_execute_command(target,HFM_PAGE_ERASE,HFM_FLASH_BASE_ADDR+sector*HFM_SECTOR_SIZE/2,0,hfm_ustat,1);
|
||||||
retval = ERROR_FAIL;
|
err_check_propagate(retval);
|
||||||
err_check(retval,"Sector erasing not implemented. Call with first=last=0.");
|
return retval;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static int mass_erase(struct target * target, uint16_t * hfm_ustat){
|
||||||
|
int retval;
|
||||||
|
retval = dsp5680xx_f_execute_command(target,HFM_MASS_ERASE,0,0,hfm_ustat,1);
|
||||||
|
return retval;
|
||||||
|
}
|
||||||
|
|
||||||
|
int dsp5680xx_f_erase(struct target * target, int first, int last){
|
||||||
|
int retval;
|
||||||
if (dsp5680xx_target_status(target,NULL,NULL) != TARGET_HALTED){
|
if (dsp5680xx_target_status(target,NULL,NULL) != TARGET_HALTED){
|
||||||
retval = dsp5680xx_halt(target);
|
retval = dsp5680xx_halt(target);
|
||||||
err_check_propagate(retval);
|
err_check_propagate(retval);
|
||||||
|
@ -1224,49 +1181,25 @@ int dsp5680xx_f_erase(struct target * target, int first, int last){
|
||||||
retval = dsp5680xx_f_SIM_reset(target);
|
retval = dsp5680xx_f_SIM_reset(target);
|
||||||
err_check_propagate(retval);
|
err_check_propagate(retval);
|
||||||
// -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
|
// -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
|
||||||
// Check security
|
|
||||||
// -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
|
|
||||||
uint8_t protected;
|
|
||||||
retval = dsp5680xx_f_protect_check(target,&protected);
|
|
||||||
err_check_propagate(retval);
|
|
||||||
if(protected){
|
|
||||||
retval = ERROR_TARGET_FAILURE;
|
|
||||||
err_check(retval,"Cannot flash, security is still enabled.");
|
|
||||||
}
|
|
||||||
// -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
|
|
||||||
// Set hfmdiv
|
// Set hfmdiv
|
||||||
// -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
|
// -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
|
||||||
retval = eonce_set_hfmdiv(target);
|
retval = eonce_set_hfmdiv(target);
|
||||||
err_check_propagate(retval);
|
err_check_propagate(retval);
|
||||||
|
|
||||||
// Check if chip is already erased.
|
|
||||||
// Since only mass erase is currently implemented, only the first sector is checked (assuming no code will leave it unused)
|
|
||||||
uint8_t erased;
|
|
||||||
retval = dsp5680xx_f_erase_check(target,&erased);
|
|
||||||
err_check_propagate(retval);
|
|
||||||
if (erased)
|
|
||||||
LOG_USER("Flash blank - mass erase skipped.");
|
|
||||||
else{
|
|
||||||
// Execute mass erase command.
|
|
||||||
uint16_t hfm_ustat;
|
uint16_t hfm_ustat;
|
||||||
uint16_t hfm_cmd = HFM_MASS_ERASE;
|
int do_mass_erase = ((!(first|last)) || ((first==0)&&(last == (HFM_SECTOR_COUNT-1))));
|
||||||
retval = dsp5680xx_f_execute_command(target,hfm_cmd,HFM_FLASH_BASE_ADDR+0*HFM_SECTOR_SIZE,0,&hfm_ustat,1);
|
if(do_mass_erase){
|
||||||
|
//Mass erase
|
||||||
|
retval = mass_erase(target,&hfm_ustat);
|
||||||
err_check_propagate(retval);
|
err_check_propagate(retval);
|
||||||
if (hfm_ustat&HFM_USTAT_MASK_PVIOL_ACCER){
|
last = HFM_SECTOR_COUNT-1;
|
||||||
retval = ERROR_TARGET_FAILURE;
|
}else{
|
||||||
err_check(retval,"pviol and/or accer bits set. HFM command execution error");
|
for(int i = first;i<=last;i++){
|
||||||
}
|
retval = erase_sector(target,i,&hfm_ustat);
|
||||||
// Verify flash was successfully erased.
|
|
||||||
retval = dsp5680xx_f_erase_check(target,&erased);
|
|
||||||
err_check_propagate(retval);
|
err_check_propagate(retval);
|
||||||
if(retval == ERROR_OK){
|
|
||||||
if (erased)
|
|
||||||
LOG_USER("Flash mass erased and checked blank.");
|
|
||||||
else
|
|
||||||
LOG_WARNING("Flash mass erased, but still not blank!");
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
return retval;
|
return ERROR_OK;
|
||||||
}
|
}
|
||||||
|
|
||||||
// Algorithm for programming normal p: flash
|
// Algorithm for programming normal p: flash
|
||||||
|
@ -1317,16 +1250,6 @@ int dsp5680xx_f_wr(struct target * target, uint8_t *buffer, uint32_t address, ui
|
||||||
err_check_propagate(retval);
|
err_check_propagate(retval);
|
||||||
}
|
}
|
||||||
// -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
|
// -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
|
||||||
// Check if flash is erased
|
|
||||||
// -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
|
|
||||||
uint8_t erased;
|
|
||||||
retval = dsp5680xx_f_erase_check(target,&erased);
|
|
||||||
err_check_propagate(retval);
|
|
||||||
if(!erased){
|
|
||||||
retval = ERROR_FAIL;
|
|
||||||
err_check(retval,"Flash must be erased before flashing.");
|
|
||||||
}
|
|
||||||
// -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
|
|
||||||
// Download the pgm that flashes.
|
// Download the pgm that flashes.
|
||||||
// -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
|
// -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
|
||||||
uint32_t my_favourite_ram_address = 0x8700; // This seems to be a safe address. This one is the one used by codewarrior in 56801x_flash.cfg
|
uint32_t my_favourite_ram_address = 0x8700; // This seems to be a safe address. This one is the one used by codewarrior in 56801x_flash.cfg
|
||||||
|
@ -1375,14 +1298,13 @@ int dsp5680xx_f_wr(struct target * target, uint8_t *buffer, uint32_t address, ui
|
||||||
retval = dsp5680xx_resume(target,0,my_favourite_ram_address,0,0);
|
retval = dsp5680xx_resume(target,0,my_favourite_ram_address,0,0);
|
||||||
err_check_propagate(retval);
|
err_check_propagate(retval);
|
||||||
|
|
||||||
int counter_reset = FLUSH_COUNT_FLASH;
|
int counter = FLUSH_COUNT_FLASH;
|
||||||
int counter = counter_reset;
|
|
||||||
context.flush = 0;
|
context.flush = 0;
|
||||||
uint32_t i;
|
uint32_t i;
|
||||||
for(i=1; (i<count/2)&&(i<HFM_SIZE_REAL); i++){
|
for(i=1; (i<count/2)&&(i<HFM_SIZE_WORDS); i++){
|
||||||
if(--counter==0){
|
if(--counter==0){
|
||||||
context.flush = 1;
|
context.flush = 1;
|
||||||
counter = counter_reset;
|
counter = FLUSH_COUNT_FLASH;
|
||||||
}
|
}
|
||||||
retval = eonce_tx_upper_data(target,buff16[i],&drscan_data);
|
retval = eonce_tx_upper_data(target,buff16[i],&drscan_data);
|
||||||
if(retval!=ERROR_OK){
|
if(retval!=ERROR_OK){
|
||||||
|
|
|
@ -124,8 +124,8 @@
|
||||||
#define DSP5680XX_ONCE_OPABDR 0x13 /* OnCE Program Address Register—Decode cycle (OPABDR) */
|
#define DSP5680XX_ONCE_OPABDR 0x13 /* OnCE Program Address Register—Decode cycle (OPABDR) */
|
||||||
//----------------------------------------------------------------
|
//----------------------------------------------------------------
|
||||||
|
|
||||||
#define FLUSH_COUNT_WRITE 4095 // This value works, higher values (and lower...) may work as well.
|
#define FLUSH_COUNT_READ_WRITE 8192 // This value works, higher values (and lower...) may work as well.
|
||||||
#define FLUSH_COUNT_FLASH 7 // Waiting for longer queues will cause flashing errors.
|
#define FLUSH_COUNT_FLASH 8192
|
||||||
//----------------------------------------------------------------
|
//----------------------------------------------------------------
|
||||||
// HFM (flash module) Commands (ref:MC56F801xRM.pdf@159)
|
// HFM (flash module) Commands (ref:MC56F801xRM.pdf@159)
|
||||||
//----------------------------------------------------------------
|
//----------------------------------------------------------------
|
||||||
|
@ -160,12 +160,13 @@
|
||||||
#define HFM_USTAT_MASK_BLANK 0x4
|
#define HFM_USTAT_MASK_BLANK 0x4
|
||||||
#define HFM_USTAT_MASK_PVIOL_ACCER 0x30
|
#define HFM_USTAT_MASK_PVIOL_ACCER 0x30
|
||||||
|
|
||||||
#define HFM_CLK_DEFAULT 0x29
|
#define HFM_CLK_DEFAULT 0x40
|
||||||
#define HFM_FLASH_BASE_ADDR 0x0
|
#define HFM_FLASH_BASE_ADDR 0x0
|
||||||
#define HFM_SIZE 0x8000 // This is not true for 56F8013, but it is necessary to get the byte/word addressing workaround to actually work.
|
#define HFM_SIZE_BYTES 0x4000 // bytes
|
||||||
#define HFM_SIZE_REAL 0x2000
|
#define HFM_SIZE_WORDS 0x2000 // words
|
||||||
#define HFM_SECTOR_SIZE 0x8000 // 512 bytes pages.
|
#define HFM_SECTOR_SIZE 0x200 // Size in bytes
|
||||||
#define HFM_SECTOR_COUNT 1
|
#define HFM_SECTOR_COUNT 0x20
|
||||||
|
// A 16K block in pages of 256 words.
|
||||||
|
|
||||||
#define HFM_LOCK_FLASH 0xE70A
|
#define HFM_LOCK_FLASH 0xE70A
|
||||||
#define HFM_LOCK_ADDR_L 0x1FF7
|
#define HFM_LOCK_ADDR_L 0x1FF7
|
||||||
|
@ -204,9 +205,9 @@ static inline struct dsp5680xx_common *target_to_dsp5680xx(struct target *target
|
||||||
|
|
||||||
int dsp5680xx_f_wr(struct target * target, uint8_t *buffer, uint32_t address, uint32_t count);
|
int dsp5680xx_f_wr(struct target * target, uint8_t *buffer, uint32_t address, uint32_t count);
|
||||||
|
|
||||||
int dsp5680xx_f_erase_check(struct target * target,uint8_t * erased);
|
int dsp5680xx_f_erase_check(struct target * target,uint8_t * erased, uint32_t sector);
|
||||||
int dsp5680xx_f_erase(struct target * target, int first, int last);
|
int dsp5680xx_f_erase(struct target * target, int first, int last);
|
||||||
int dsp5680xx_f_protect_check(struct target * target, uint8_t * protected);
|
int dsp5680xx_f_protect_check(struct target * target, uint16_t * protected);
|
||||||
int dsp5680xx_f_lock(struct target * target);
|
int dsp5680xx_f_lock(struct target * target);
|
||||||
int dsp5680xx_f_unlock(struct target * target);
|
int dsp5680xx_f_unlock(struct target * target);
|
||||||
|
|
||||||
|
|
Loading…
Reference in New Issue