- add cortex_m3 variant luminary to fix reset issue with asserting SRST
- https://lists.berlios.de/pipermail/openocd-development/2008-April/002022.html for details git-svn-id: svn://svn.berlios.de/openocd/trunk@624 b42882b7-edfa-0310-969c-e2dbd0fdcd60__archive__
parent
cab29a63de
commit
f2e10a6050
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@ -706,13 +706,26 @@ int cortex_m3_assert_reset(target_t *target)
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ahbap_write_system_atomic_u32(swjdp, DCB_DEMCR, TRCENA | VC_HARDERR | VC_BUSERR | VC_CORERESET );
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ahbap_write_system_atomic_u32(swjdp, DCB_DEMCR, TRCENA | VC_HARDERR | VC_BUSERR | VC_CORERESET );
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}
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}
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if (jtag_reset_config & RESET_SRST_PULLS_TRST)
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/* following hack is to handle luminary reset
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* when srst is asserted the luminary device seesm to also clear the debug registers
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* which does not match the armv7 debug TRM */
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if (strcmp(cortex_m3->variant, "luminary") == 0)
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{
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{
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jtag_add_reset(1, 1);
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/* this causes the luminary device to reset using the watchdog */
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ahbap_write_system_atomic_u32(swjdp, NVIC_AIRCR, AIRCR_VECTKEY | AIRCR_SYSRESETREQ );
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LOG_DEBUG("Using Luminary Reset: SYSRESETREQ");
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}
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}
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else
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else
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{
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{
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jtag_add_reset(0, 1);
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if (jtag_reset_config & RESET_SRST_PULLS_TRST)
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{
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jtag_add_reset(1, 1);
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}
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else
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{
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jtag_add_reset(0, 1);
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}
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}
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}
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target->state = TARGET_RESET;
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target->state = TARGET_RESET;
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@ -1438,6 +1451,15 @@ int cortex_m3_init_arch_info(target_t *target, cortex_m3_common_t *cortex_m3, in
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armv7m->pre_restore_context = NULL;
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armv7m->pre_restore_context = NULL;
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armv7m->post_restore_context = NULL;
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armv7m->post_restore_context = NULL;
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if (variant)
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{
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cortex_m3->variant = strdup(variant);
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}
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else
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{
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cortex_m3->variant = strdup("");
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}
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armv7m_init_arch_info(target, armv7m);
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armv7m_init_arch_info(target, armv7m);
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armv7m->arch_info = cortex_m3;
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armv7m->arch_info = cortex_m3;
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armv7m->load_core_reg_u32 = cortex_m3_load_core_reg_u32;
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armv7m->load_core_reg_u32 = cortex_m3_load_core_reg_u32;
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@ -134,8 +134,8 @@ typedef struct cortex_m3_dwt_comparator_s
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typedef struct cortex_m3_common_s
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typedef struct cortex_m3_common_s
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{
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{
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int common_magic;
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int common_magic;
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arm_jtag_t jtag_info;
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arm_jtag_t jtag_info;
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char *variant;
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/* Context information */
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/* Context information */
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u32 dcb_dhcsr;
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u32 dcb_dhcsr;
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@ -8,7 +8,10 @@ reset_config srst_only
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#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
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#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
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jtag_device 4 0x1 0xf 0xe
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jtag_device 4 0x1 0xf 0xe
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target cortex_m3 little run_and_halt 0
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# the luminary variant causes a software reset rather than asserting SRST
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# this stops the debug registers from being cleared
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# this will be fixed in later revisions of silicon
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target cortex_m3 little reset_halt 0 luminary
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# 4k working area at base of ram
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# 4k working area at base of ram
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working_area 0 0x20000000 0x4000 nobackup
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working_area 0 0x20000000 0x4000 nobackup
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@ -8,7 +8,10 @@ reset_config srst_only
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#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
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#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
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jtag_device 4 0x1 0xf 0xe
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jtag_device 4 0x1 0xf 0xe
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target cortex_m3 little run_and_halt 0
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# the luminary variant causes a software reset rather than asserting SRST
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# this stops the debug registers from being cleared
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# this will be fixed in later revisions of silicon
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target cortex_m3 little reset_halt 0 luminary
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# 2k working area at base of ram
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# 2k working area at base of ram
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working_area 0 0x20000000 0x2000 nobackup
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working_area 0 0x20000000 0x2000 nobackup
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