David Brownell <david-b@pacbell.net>:
Make the Thumb2 disassembler handle more 32-bit instructions: A5.3.3 Data processing (plain binary immediate) These use mostly twelve bit literals, but there are also bitfield and saturated add primitives. git-svn-id: svn://svn.berlios.de/openocd/trunk@2534 b42882b7-edfa-0310-969c-e2dbd0fdcd60__archive__
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0165ae4405
commit
f163d0009d
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@ -2671,6 +2671,101 @@ static int t2ev_data_mod_immed(uint32_t opcode, uint32_t address,
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return ERROR_OK;
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}
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static int t2ev_data_immed(uint32_t opcode, uint32_t address,
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arm_instruction_t *instruction, char *cp)
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{
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char *mnemonic = NULL;
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int rn = (opcode >> 16) & 0xf;
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int rd = (opcode >> 8) & 0xf;
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unsigned immed;
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bool add = false;
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bool is_signed = false;
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immed = (opcode & 0x0ff) | ((opcode & 0x7000) >> 12);
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if (opcode & (1 << 27))
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immed |= (1 << 11);
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switch ((opcode >> 20) & 0x1f) {
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case 0:
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if (rn == 0xf) {
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add = true;
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goto do_adr;
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}
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mnemonic = "ADD.W";
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break;
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case 4:
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mnemonic = "MOV.W";
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break;
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case 0x0a:
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if (rn == 0xf)
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goto do_adr;
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mnemonic = "SUB.W";
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break;
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case 0x0c:
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/* move constant to top 16 bits of register */
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immed |= (opcode >> 4) & 0xf000;
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sprintf(cp, "MOVT\tr%d, #%d\t; %#4.4x", rn, immed, immed);
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return ERROR_OK;
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case 0x10:
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case 0x12:
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is_signed = true;
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case 0x18:
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case 0x1a:
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/* signed/unsigned saturated add */
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immed = (opcode >> 6) & 0x03;
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immed |= (opcode >> 10) & 0x1c;
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sprintf(cp, "%sSAT\tr%d, #%d, r%d, %s #%d\t",
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is_signed ? "S" : "U",
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rd, (opcode & 0x1f) + 1, rn,
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(opcode & (1 << 21)) ? "ASR" : "LSL",
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immed ? immed : 32);
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return ERROR_OK;
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case 0x14:
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is_signed = true;
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/* FALLTHROUGH */
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case 0x1c:
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/* signed/unsigned bitfield extract */
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immed = (opcode >> 6) & 0x03;
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immed |= (opcode >> 10) & 0x1c;
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sprintf(cp, "%sBFX\tr%d, r%d, #%d, #%d\t",
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is_signed ? "S" : "U",
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rd, rn, immed,
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(opcode & 0x1f) + 1);
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return ERROR_OK;
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case 0x16:
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immed = (opcode >> 6) & 0x03;
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immed |= (opcode >> 10) & 0x1c;
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if (rn == 0xf) /* bitfield clear */
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sprintf(cp, "BFC\tr%d, #%d, #%d\t",
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rd, immed,
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(opcode & 0x1f) + 1 - immed);
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else /* bitfield insert */
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sprintf(cp, "BFI\tr%d, r%d, #%d, #%d\t",
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rd, rn, immed,
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(opcode & 0x1f) + 1 - immed);
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return ERROR_OK;
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default:
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return ERROR_INVALID_ARGUMENTS;
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}
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sprintf(cp, "%s\tr%d, r%d, #%d\t; %#3.3x", mnemonic,
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rd, rn, immed, immed);
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return ERROR_OK;
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do_adr:
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address &= ~0x03;
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address += 4;
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if (add)
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address += immed;
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else
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address -= immed;
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/* REVISIT "ADD/SUB Rd, PC, #const ; 0x..." might be better;
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* not hiding the pc-relative stuff will sometimes be useful.
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*/
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sprintf(cp, "ADR.W\tr%d, %#8.8" PRIx32, rd, address);
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return ERROR_OK;
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}
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/*
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* REVISIT for Thumb2 instructions, instruction->type and friends aren't
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* always set. That means eventual arm_simulate_step() support for Thumb2
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@ -2722,6 +2817,10 @@ int thumb2_opcode(target_t *target, uint32_t address, arm_instruction_t *instruc
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if ((opcode & 0x1a008000) == 0x10000000)
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retval = t2ev_data_mod_immed(opcode, address, instruction, cp);
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/* ARMv7-M: A5.3.3 Data processing (plain binary immediate) */
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else if ((opcode & 0x1a008000) == 0x12000000)
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retval = t2ev_data_immed(opcode, address, instruction, cp);
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/* ARMv7-M: A5.3.4 Branches and miscellaneous control */
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else if ((opcode & 0x18008000) == 0x10008000)
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retval = t2ev_b_misc(opcode, address, instruction, cp);
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