From eeabbd58c06e8c5fc01ce87cd2b04725fbc0e2bb Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Tue, 19 Mar 2019 09:50:41 -0700 Subject: [PATCH] armv7a_mmu: Do not restrict virtual addresses to uint32_t In preparation for adding super section decoding, do not restrict armv7a_mmu_translate_va_pa() to 32-bit virtual addresses since ARMv7-A processors with VMSA extensions (including LPAE) can issue wider physical addresses. Update casting to uint32_t where necessary. Change-Id: Id1c3d0d5ac324cbdc334259d9ea75fe4981671a1 Signed-off-by: Florian Fainelli Reviewed-on: http://openocd.zylin.com/5211 Tested-by: jenkins Reviewed-by: Antonio Borneo Reviewed-by: Matthias Welwarsky --- src/target/armv7a_mmu.c | 9 +++++---- src/target/armv7a_mmu.h | 2 +- src/target/cortex_a.c | 2 +- 3 files changed, 7 insertions(+), 6 deletions(-) diff --git a/src/target/armv7a_mmu.c b/src/target/armv7a_mmu.c index 6118417fc..aa3dc16d8 100644 --- a/src/target/armv7a_mmu.c +++ b/src/target/armv7a_mmu.c @@ -36,12 +36,12 @@ /* V7 method VA TO PA */ int armv7a_mmu_translate_va_pa(struct target *target, uint32_t va, - uint32_t *val, int meminfo) + target_addr_t *val, int meminfo) { int retval = ERROR_FAIL; struct armv7a_common *armv7a = target_to_armv7a(target); struct arm_dpm *dpm = armv7a->arm.dpm; - uint32_t virt = va & ~0xfff; + uint32_t virt = va & ~0xfff, value; uint32_t NOS, NS, INNER, OUTER; *val = 0xdeadbeef; retval = dpm->prepare(dpm); @@ -56,9 +56,10 @@ int armv7a_mmu_translate_va_pa(struct target *target, uint32_t va, goto done; retval = dpm->instr_read_data_r0(dpm, ARMV4_5_MRC(15, 0, 0, 7, 4, 0), - val); + &value); if (retval != ERROR_OK) goto done; + *val = value; /* decode memory attribute */ NOS = (*val >> 10) & 1; /* Not Outer shareable */ NS = (*val >> 9) & 1; /* Non secure */ @@ -67,7 +68,7 @@ int armv7a_mmu_translate_va_pa(struct target *target, uint32_t va, *val = (*val & ~0xfff) + (va & 0xfff); if (meminfo) { - LOG_INFO("%" PRIx32 " : %" PRIx32 " %s outer shareable %s secured", + LOG_INFO("%" PRIx32 " : %" TARGET_PRIxADDR " %s outer shareable %s secured", va, *val, NOS == 1 ? "not" : " ", NS == 1 ? "not" : ""); diff --git a/src/target/armv7a_mmu.h b/src/target/armv7a_mmu.h index 513e56704..36cd9d19e 100644 --- a/src/target/armv7a_mmu.h +++ b/src/target/armv7a_mmu.h @@ -20,7 +20,7 @@ #define OPENOCD_TARGET_ARMV7A_MMU_H extern int armv7a_mmu_translate_va_pa(struct target *target, uint32_t va, - uint32_t *val, int meminfo); + target_addr_t *val, int meminfo); extern const struct command_registration armv7a_mmu_command_handlers[]; diff --git a/src/target/cortex_a.c b/src/target/cortex_a.c index 9fc265288..158de0b24 100644 --- a/src/target/cortex_a.c +++ b/src/target/cortex_a.c @@ -2922,7 +2922,7 @@ static int cortex_a_virt2phys(struct target *target, if (retval != ERROR_OK) return retval; return armv7a_mmu_translate_va_pa(target, (uint32_t)virt, - (uint32_t *)phys, 1); + phys, 1); } COMMAND_HANDLER(cortex_a_handle_cache_info_command)