added arm11 timeout error messages
git-svn-id: svn://svn.berlios.de/openocd/trunk@2647 b42882b7-edfa-0310-969c-e2dbd0fdcd60__archive__
oharboe
parent
efef05870d
commit
ed8fd94d7c
14
TODO
14
TODO
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@ -117,10 +117,16 @@ https://lists.berlios.de/pipermail/openocd-development/2009-July/009206.html
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- ARM923EJS:
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- reset run/halt/step is not robust; needs testing to map out problems.
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- ARM11 improvements (MB?)
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- fix single stepping (reported by ØH). Michael Bruck explained
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that what's required is to emulate the current instruction(just like the
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arm7 code) to know what address to set the breakpoint at for single
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stepping an instruction.
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- fix single stepping (reported by ØH). Need to automatically
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use hardware stepping if available.
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- hunt down and add timeouts to all infinite loops, e.g. arm11_run_instr_no_data would
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lock up in infinite loop if e.g. an "mdh" command tries to read memory from invalid memory location.
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Try mdh 0x40000000 on i.MX31 PDK
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- mdb can return garbage data if read byte operation fails for
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a memory region(16 & 32 byte access modes may be supported). Is this
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a bug in the .MX31 PDK init script? Try on i.MX31 PDK:
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mdw 0xb80005f0 0x8, mdh 0xb80005f0 0x10, mdb 0xb80005f0 0x20. mdb returns
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garabage.
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- implement missing functionality (grep FNC_INFO_NOTIMPLEMENTED ...)
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- thumb support is missing: ISTR ARMv6 requires Thumb.
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ARM1156 has Thumb2; ARM1136 doesn't.
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@ -2,7 +2,7 @@
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* Copyright (C) 2008 digenius technology GmbH. *
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* Michael Bruck *
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* *
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* Copyright (C) 2008 Oyvind Harboe oyvind.harboe@zylin.com *
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* Copyright (C) 2008,2009 Oyvind Harboe oyvind.harboe@zylin.com *
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* *
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* Copyright (C) 2008 Georg Acher <acher@in.tum.de> *
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* *
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@ -374,6 +374,7 @@ int arm11_check_init(arm11_common_t * arm11, uint32_t * dscr)
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*/
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static int arm11_on_enter_debug_state(arm11_common_t * arm11)
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{
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int retval;
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FNC_INFO;
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for (size_t i = 0; i < asizeof(arm11->reg_values); i++)
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@ -459,7 +460,9 @@ static int arm11_on_enter_debug_state(arm11_common_t * arm11)
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for (size_t i = 0; i < 15; i++)
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{
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/* MCR p14,0,R?,c0,c5,0 */
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arm11_run_instr_data_from_core(arm11, 0xEE000E15 | (i << 12), &R(RX + i), 1);
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retval = arm11_run_instr_data_from_core(arm11, 0xEE000E15 | (i << 12), &R(RX + i), 1);
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if (retval != ERROR_OK)
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return retval;
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}
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/* save rDTR */
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@ -484,7 +487,9 @@ static int arm11_on_enter_debug_state(arm11_common_t * arm11)
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/* save PC */
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/* MOV R0,PC (move PC -> r0 (-> wDTR -> local var)) */
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arm11_run_instr_data_from_core_via_r0(arm11, 0xE1A0000F, &R(PC));
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retval = arm11_run_instr_data_from_core_via_r0(arm11, 0xE1A0000F, &R(PC));
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if (retval != ERROR_OK)
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return retval;
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/* adjust PC depending on ARM state */
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@ -665,6 +670,7 @@ void arm11_record_register_history(arm11_common_t * arm11)
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int arm11_poll(struct target_s *target)
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{
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FNC_INFO;
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int retval;
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arm11_common_t * arm11 = target->arch_info;
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@ -688,7 +694,9 @@ int arm11_poll(struct target_s *target)
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LOG_DEBUG("enter TARGET_HALTED");
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target->state = TARGET_HALTED;
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target->debug_reason = arm11_get_DSCR_debug_reason(dscr);
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arm11_on_enter_debug_state(arm11);
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retval = arm11_on_enter_debug_state(arm11);
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if (retval != ERROR_OK)
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return retval;
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target_call_event_callbacks(target,
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old_state == TARGET_DEBUG_RUNNING ? TARGET_EVENT_DEBUG_HALTED : TARGET_EVENT_HALTED);
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@ -257,12 +257,12 @@ enum target_debug_reason arm11_get_DSCR_debug_reason(uint32_t dscr);
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void arm11_run_instr_data_prepare (arm11_common_t * arm11);
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void arm11_run_instr_data_finish (arm11_common_t * arm11);
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int arm11_run_instr_no_data (arm11_common_t * arm11, uint32_t * opcode, size_t count);
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void arm11_run_instr_no_data1 (arm11_common_t * arm11, uint32_t opcode);
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int arm11_run_instr_no_data1 (arm11_common_t * arm11, uint32_t opcode);
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int arm11_run_instr_data_to_core (arm11_common_t * arm11, uint32_t opcode, uint32_t * data, size_t count);
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int arm11_run_instr_data_to_core_noack (arm11_common_t * arm11, uint32_t opcode, uint32_t * data, size_t count);
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int arm11_run_instr_data_to_core1 (arm11_common_t * arm11, uint32_t opcode, uint32_t data);
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int arm11_run_instr_data_from_core (arm11_common_t * arm11, uint32_t opcode, uint32_t * data, size_t count);
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void arm11_run_instr_data_from_core_via_r0 (arm11_common_t * arm11, uint32_t opcode, uint32_t * data);
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int arm11_run_instr_data_from_core_via_r0 (arm11_common_t * arm11, uint32_t opcode, uint32_t * data);
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void arm11_run_instr_data_to_core_via_r0 (arm11_common_t * arm11, uint32_t opcode, uint32_t data);
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int arm11_add_dr_scan_vc(int num_fields, scan_field_t *fields, tap_state_t state);
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@ -2,7 +2,7 @@
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* Copyright (C) 2008 digenius technology GmbH. *
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* Michael Bruck *
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* *
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* Copyright (C) 2008 Oyvind Harboe oyvind.harboe@zylin.com *
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* Copyright (C) 2008,2009 Oyvind Harboe oyvind.harboe@zylin.com *
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* *
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* This program is free software; you can redistribute it and/or modify *
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* it under the terms of the GNU General Public License as published by *
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@ -26,6 +26,7 @@
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#include "arm11.h"
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#include "time_support.h"
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#if 0
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#define JTAG_DEBUG(expr ...) DEBUG(expr)
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@ -355,6 +356,7 @@ void arm11_run_instr_data_finish(arm11_common_t * arm11)
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}
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/** Execute one or multiple instructions via ITR
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*
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* \pre arm11_run_instr_data_prepare() / arm11_run_instr_data_finish() block
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@ -372,6 +374,7 @@ int arm11_run_instr_no_data(arm11_common_t * arm11, uint32_t * opcode, size_t co
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{
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arm11_add_debug_INST(arm11, *opcode++, NULL, TAP_IDLE);
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int i = 0;
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while (1)
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{
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uint8_t flag;
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@ -382,6 +385,22 @@ int arm11_run_instr_no_data(arm11_common_t * arm11, uint32_t * opcode, size_t co
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if (flag)
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break;
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long long then;
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if (i == 1000)
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{
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then = timeval_ms();
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}
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if (i >= 1000)
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{
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if ((timeval_ms()-then) > 1000)
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{
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LOG_WARNING("Timeout (1000ms) waiting for instructions to complete");
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return ERROR_FAIL;
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}
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}
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i++;
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}
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}
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@ -396,9 +415,9 @@ int arm11_run_instr_no_data(arm11_common_t * arm11, uint32_t * opcode, size_t co
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* \param opcode ARM opcode
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*
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*/
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void arm11_run_instr_no_data1(arm11_common_t * arm11, uint32_t opcode)
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int arm11_run_instr_no_data1(arm11_common_t * arm11, uint32_t opcode)
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{
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arm11_run_instr_no_data(arm11, &opcode, 1);
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return arm11_run_instr_no_data(arm11, &opcode, 1);
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}
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@ -435,6 +454,7 @@ int arm11_run_instr_data_to_core(arm11_common_t * arm11, uint32_t opcode, uint32
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while (count--)
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{
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int i = 0;
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do
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{
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Data = *data;
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@ -444,6 +464,22 @@ int arm11_run_instr_data_to_core(arm11_common_t * arm11, uint32_t opcode, uint32
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CHECK_RETVAL(jtag_execute_queue());
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JTAG_DEBUG("DTR Ready %d nRetry %d", Ready, nRetry);
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long long then;
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if (i == 1000)
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{
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then = timeval_ms();
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}
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if (i >= 1000)
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{
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if ((timeval_ms()-then) > 1000)
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{
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LOG_WARNING("Timeout (1000ms) waiting for instructions to complete");
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return ERROR_FAIL;
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}
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}
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i++;
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}
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while (!Ready);
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@ -452,6 +488,7 @@ int arm11_run_instr_data_to_core(arm11_common_t * arm11, uint32_t opcode, uint32
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arm11_add_IR(arm11, ARM11_INTEST, ARM11_TAP_DEFAULT);
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int i = 0;
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do
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{
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Data = 0;
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@ -461,6 +498,22 @@ int arm11_run_instr_data_to_core(arm11_common_t * arm11, uint32_t opcode, uint32
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CHECK_RETVAL(jtag_execute_queue());
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JTAG_DEBUG("DTR Data %08x Ready %d nRetry %d", Data, Ready, nRetry);
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long long then;
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if (i == 1000)
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{
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then = timeval_ms();
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}
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if (i >= 1000)
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{
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if ((timeval_ms()-then) > 1000)
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{
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LOG_WARNING("Timeout (1000ms) waiting for instructions to complete");
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return ERROR_FAIL;
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}
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}
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i++;
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}
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while (!Ready);
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@ -616,6 +669,7 @@ int arm11_run_instr_data_from_core(arm11_common_t * arm11, uint32_t opcode, uint
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while (count--)
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{
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int i = 0;
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do
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{
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arm11_add_dr_scan_vc(asizeof(chain5_fields), chain5_fields, count ? TAP_IDLE : TAP_DRPAUSE);
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@ -623,6 +677,22 @@ int arm11_run_instr_data_from_core(arm11_common_t * arm11, uint32_t opcode, uint
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CHECK_RETVAL(jtag_execute_queue());
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JTAG_DEBUG("DTR Data %08x Ready %d nRetry %d", Data, Ready, nRetry);
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long long then;
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if (i == 1000)
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{
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then = timeval_ms();
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}
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if (i >= 1000)
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{
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if ((timeval_ms()-then) > 1000)
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{
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LOG_WARNING("Timeout (1000ms) waiting for instructions to complete");
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return ERROR_FAIL;
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}
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}
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i++;
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}
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while (!Ready);
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@ -644,12 +714,17 @@ int arm11_run_instr_data_from_core(arm11_common_t * arm11, uint32_t opcode, uint
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* \param data Pointer to a data word that receives the value from r0 after \p opcode was executed.
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*
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*/
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void arm11_run_instr_data_from_core_via_r0(arm11_common_t * arm11, uint32_t opcode, uint32_t * data)
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int arm11_run_instr_data_from_core_via_r0(arm11_common_t * arm11, uint32_t opcode, uint32_t * data)
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{
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arm11_run_instr_no_data1(arm11, opcode);
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int retval;
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retval = arm11_run_instr_no_data1(arm11, opcode);
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if (retval != ERROR_OK)
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return retval;
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/* MCR p14,0,R0,c0,c5,0 (move r0 -> wDTR -> local var) */
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arm11_run_instr_data_from_core(arm11, 0xEE000E15, data, 1);
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return ERROR_OK;
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}
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/** Load data into core via DTR then move it to r0 then
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