arm_adi_v5: make dap_lookup_cs_component() traverse subtables and handle multicore
When looking for a debug base address of a core, one should search through all the ROM tables, not just the top-level one. This code also assumes that the first found entry (in a depth-first search) will correspond to core 0, the second to core 1 etc. The patch is supposed to be an alternative implementation of http://openocd.zylin.com/#/c/1313/. Change-Id: Ifc88971a02fe3d9c00d9bf72a822ade5804d4e09 Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/1920 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>__archive__
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9c47dc9e8e
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ec9ccaa288
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@ -857,15 +857,16 @@ int dap_get_debugbase(struct adiv5_dap *dap, int ap,
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}
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int dap_lookup_cs_component(struct adiv5_dap *dap, int ap,
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uint32_t dbgbase, uint8_t type, uint32_t *addr)
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uint32_t dbgbase, uint8_t type, uint32_t *addr, int32_t *idx)
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{
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uint32_t ap_old;
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uint32_t romentry, entry_offset = 0, component_base, devtype;
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int retval = ERROR_FAIL;
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int retval;
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if (ap >= 256)
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return ERROR_COMMAND_SYNTAX_ERROR;
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*addr = 0;
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ap_old = dap->ap_current;
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dap_ap_select(dap, ap);
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@ -879,15 +880,33 @@ int dap_lookup_cs_component(struct adiv5_dap *dap, int ap,
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+ (romentry & 0xFFFFF000);
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if (romentry & 0x1) {
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uint32_t c_cid1;
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retval = mem_ap_read_atomic_u32(dap, component_base | 0xff4, &c_cid1);
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if (retval != ERROR_OK) {
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LOG_ERROR("Can't read component with base address 0x%" PRIx32
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", the corresponding core might be turned off", component_base);
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return retval;
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}
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if (((c_cid1 >> 4) & 0x0f) == 1) {
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retval = dap_lookup_cs_component(dap, ap, component_base,
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type, addr, idx);
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if (retval == ERROR_OK)
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break;
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if (retval != ERROR_TARGET_RESOURCE_NOT_AVAILABLE)
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return retval;
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}
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retval = mem_ap_read_atomic_u32(dap,
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(component_base & 0xfffff000) | 0xfcc,
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&devtype);
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if (retval != ERROR_OK)
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return retval;
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if ((devtype & 0xff) == type) {
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*addr = component_base;
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retval = ERROR_OK;
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break;
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if (!*idx) {
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*addr = component_base;
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break;
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} else
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(*idx)--;
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}
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}
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entry_offset += 4;
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@ -895,7 +914,10 @@ int dap_lookup_cs_component(struct adiv5_dap *dap, int ap,
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dap_ap_select(dap, ap_old);
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return retval;
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if (!*addr)
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return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
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return ERROR_OK;
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}
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static int dap_rom_display(struct command_context *cmd_ctx,
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@ -470,7 +470,7 @@ int dap_find_ap(struct adiv5_dap *dap,
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/* Lookup CoreSight component */
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int dap_lookup_cs_component(struct adiv5_dap *dap, int ap,
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uint32_t dbgbase, uint8_t type, uint32_t *addr);
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uint32_t dbgbase, uint8_t type, uint32_t *addr, int32_t *idx);
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struct target;
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@ -2393,14 +2393,19 @@ static int cortex_a_examine_first(struct target *target)
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uint32_t dbgbase;
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/* Get ROM Table base */
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uint32_t apid;
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int32_t coreidx = target->coreid;
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LOG_DEBUG("%s's dbgbase is not set, trying to detect using the ROM table",
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target->cmd_name);
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retval = dap_get_debugbase(swjdp, 1, &dbgbase, &apid);
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if (retval != ERROR_OK)
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return retval;
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/* Lookup 0x15 -- Processor DAP */
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retval = dap_lookup_cs_component(swjdp, 1, dbgbase, 0x15,
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&armv7a->debug_base);
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&armv7a->debug_base, &coreidx);
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if (retval != ERROR_OK)
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return retval;
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LOG_DEBUG("Detected core %" PRId32 " dbgbase: %08" PRIx32,
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coreidx, armv7a->debug_base);
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} else
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armv7a->debug_base = target->dbgbase;
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