From e8a6e3b2f4e1b0f3cccfa01c486fbdd952842801 Mon Sep 17 00:00:00 2001 From: Zachary T Welch Date: Fri, 13 Nov 2009 08:41:39 -0800 Subject: [PATCH] armv7m_common_t -> struct armv7m_common Remove misleading typedef and redundant suffix from struct armv7m_common. --- src/target/armv7m.c | 32 ++++++++++++++++---------------- src/target/armv7m.h | 10 +++++----- src/target/cortex_m3.c | 24 ++++++++++++------------ src/target/cortex_m3.h | 2 +- 4 files changed, 34 insertions(+), 34 deletions(-) diff --git a/src/target/armv7m.c b/src/target/armv7m.c index 62be15e64..7fb73946c 100644 --- a/src/target/armv7m.c +++ b/src/target/armv7m.c @@ -136,7 +136,7 @@ static int armv7m_core_reg_arch_type = -1; int armv7m_restore_context(target_t *target) { int i; - struct armv7m_common_s *armv7m = target_to_armv7m(target); + struct armv7m_common *armv7m = target_to_armv7m(target); LOG_DEBUG(" "); @@ -183,7 +183,7 @@ static int armv7m_get_core_reg(reg_t *reg) int retval; armv7m_core_reg_t *armv7m_reg = reg->arch_info; target_t *target = armv7m_reg->target; - struct armv7m_common_s *armv7m = target_to_armv7m(target); + struct armv7m_common *armv7m = target_to_armv7m(target); if (target->state != TARGET_HALTED) { @@ -218,7 +218,7 @@ static int armv7m_read_core_reg(struct target_s *target, int num) uint32_t reg_value; int retval; armv7m_core_reg_t * armv7m_core_reg; - struct armv7m_common_s *armv7m = target_to_armv7m(target); + struct armv7m_common *armv7m = target_to_armv7m(target); if ((num < 0) || (num >= ARMV7M_NUM_REGS)) return ERROR_INVALID_ARGUMENTS; @@ -237,7 +237,7 @@ static int armv7m_write_core_reg(struct target_s *target, int num) int retval; uint32_t reg_value; armv7m_core_reg_t *armv7m_core_reg; - struct armv7m_common_s *armv7m = target_to_armv7m(target); + struct armv7m_common *armv7m = target_to_armv7m(target); if ((num < 0) || (num >= ARMV7M_NUM_REGS)) return ERROR_INVALID_ARGUMENTS; @@ -261,7 +261,7 @@ static int armv7m_write_core_reg(struct target_s *target, int num) /** Invalidates cache of core registers set up by armv7m_build_reg_cache(). */ int armv7m_invalidate_core_regs(target_t *target) { - struct armv7m_common_s *armv7m = target_to_armv7m(target); + struct armv7m_common *armv7m = target_to_armv7m(target); int i; for (i = 0; i < armv7m->core_cache->num_regs; i++) @@ -281,7 +281,7 @@ int armv7m_invalidate_core_regs(target_t *target) */ int armv7m_get_gdb_reg_list(target_t *target, reg_t **reg_list[], int *reg_list_size) { - struct armv7m_common_s *armv7m = target_to_armv7m(target); + struct armv7m_common *armv7m = target_to_armv7m(target); int i; *reg_list_size = 26; @@ -321,7 +321,7 @@ int armv7m_get_gdb_reg_list(target_t *target, reg_t **reg_list[], int *reg_list_ } /* run to exit point. return error if exit point was not reached. */ -static int armv7m_run_and_wait(struct target_s *target, uint32_t entry_point, int timeout_ms, uint32_t exit_point, armv7m_common_t *armv7m) +static int armv7m_run_and_wait(struct target_s *target, uint32_t entry_point, int timeout_ms, uint32_t exit_point, struct armv7m_common *armv7m) { uint32_t pc; int retval; @@ -362,7 +362,7 @@ int armv7m_run_algorithm(struct target_s *target, uint32_t entry_point, uint32_t exit_point, int timeout_ms, void *arch_info) { - struct armv7m_common_s *armv7m = target_to_armv7m(target); + struct armv7m_common *armv7m = target_to_armv7m(target); armv7m_algorithm_t *armv7m_algorithm_info = arch_info; enum armv7m_mode core_mode = armv7m->core_mode; int retval = ERROR_OK; @@ -503,7 +503,7 @@ int armv7m_run_algorithm(struct target_s *target, /** Logs summary of ARMv7-M state for a halted target. */ int armv7m_arch_state(struct target_s *target) { - struct armv7m_common_s *armv7m = target_to_armv7m(target); + struct armv7m_common *armv7m = target_to_armv7m(target); uint32_t ctrl, sp; ctrl = buf_get_u32(armv7m->core_cache->reg_list[ARMV7M_CONTROL].value, 0, 32); @@ -526,7 +526,7 @@ int armv7m_arch_state(struct target_s *target) /** Builds cache of architecturally defined registers. */ reg_cache_t *armv7m_build_reg_cache(target_t *target) { - struct armv7m_common_s *armv7m = target_to_armv7m(target); + struct armv7m_common *armv7m = target_to_armv7m(target); int num_regs = ARMV7M_NUM_REGS; reg_cache_t **cache_p = register_get_last_cache_p(&target->reg_cache); reg_cache_t *cache = malloc(sizeof(reg_cache_t)); @@ -573,7 +573,7 @@ reg_cache_t *armv7m_build_reg_cache(target_t *target) } /** Sets up target as a generic ARMv7-M core */ -int armv7m_init_arch_info(target_t *target, armv7m_common_t *armv7m) +int armv7m_init_arch_info(target_t *target, struct armv7m_common *armv7m) { /* register arch-specific functions */ @@ -748,7 +748,7 @@ int armv7m_blank_check_memory(struct target_s *target, COMMAND_HANDLER(handle_dap_baseaddr_command) { target_t *target = get_current_target(cmd_ctx); - struct armv7m_common_s *armv7m = target_to_armv7m(target); + struct armv7m_common *armv7m = target_to_armv7m(target); struct swjdp_common *swjdp = &armv7m->swjdp_info; uint32_t apsel, apselsave, baseaddr; int retval; @@ -785,7 +785,7 @@ COMMAND_HANDLER(handle_dap_baseaddr_command) COMMAND_HANDLER(handle_dap_apid_command) { target_t *target = get_current_target(cmd_ctx); - struct armv7m_common_s *armv7m = target_to_armv7m(target); + struct armv7m_common *armv7m = target_to_armv7m(target); struct swjdp_common *swjdp = &armv7m->swjdp_info; return CALL_COMMAND_HANDLER(dap_apid_command, swjdp); @@ -794,7 +794,7 @@ COMMAND_HANDLER(handle_dap_apid_command) COMMAND_HANDLER(handle_dap_apsel_command) { target_t *target = get_current_target(cmd_ctx); - struct armv7m_common_s *armv7m = target_to_armv7m(target); + struct armv7m_common *armv7m = target_to_armv7m(target); struct swjdp_common *swjdp = &armv7m->swjdp_info; return CALL_COMMAND_HANDLER(dap_apsel_command, swjdp); @@ -803,7 +803,7 @@ COMMAND_HANDLER(handle_dap_apsel_command) COMMAND_HANDLER(handle_dap_memaccess_command) { target_t *target = get_current_target(cmd_ctx); - struct armv7m_common_s *armv7m = target_to_armv7m(target); + struct armv7m_common *armv7m = target_to_armv7m(target); struct swjdp_common *swjdp = &armv7m->swjdp_info; return CALL_COMMAND_HANDLER(dap_memaccess_command, swjdp); @@ -813,7 +813,7 @@ COMMAND_HANDLER(handle_dap_memaccess_command) COMMAND_HANDLER(handle_dap_info_command) { target_t *target = get_current_target(cmd_ctx); - struct armv7m_common_s *armv7m = target_to_armv7m(target); + struct armv7m_common *armv7m = target_to_armv7m(target); struct swjdp_common *swjdp = &armv7m->swjdp_info; uint32_t apsel; diff --git a/src/target/armv7m.h b/src/target/armv7m.h index 8e87c7795..602bf314f 100644 --- a/src/target/armv7m.h +++ b/src/target/armv7m.h @@ -91,7 +91,7 @@ enum #define ARMV7M_COMMON_MAGIC 0x2A452A45 -typedef struct armv7m_common_s +struct armv7m_common { int common_magic; reg_cache_t *core_cache; @@ -111,9 +111,9 @@ typedef struct armv7m_common_s void (*pre_restore_context)(target_t *target); void (*post_restore_context)(target_t *target); -} armv7m_common_t; +}; -static inline struct armv7m_common_s * +static inline struct armv7m_common * target_to_armv7m(struct target_s *target) { return target->arch_info; @@ -131,7 +131,7 @@ typedef struct armv7m_core_reg_s uint32_t num; enum armv7m_regtype type; target_t *target; - armv7m_common_t *armv7m_common; + struct armv7m_common *armv7m_common; } armv7m_core_reg_t; reg_cache_t *armv7m_build_reg_cache(target_t *target); @@ -143,7 +143,7 @@ int armv7m_get_gdb_reg_list(target_t *target, reg_t **reg_list[], int *reg_list_size); int armv7m_register_commands(struct command_context_s *cmd_ctx); -int armv7m_init_arch_info(target_t *target, armv7m_common_t *armv7m); +int armv7m_init_arch_info(target_t *target, struct armv7m_common *armv7m); int armv7m_run_algorithm(struct target_s *target, int num_mem_params, struct mem_param *mem_params, diff --git a/src/target/cortex_m3.c b/src/target/cortex_m3.c index ae714462e..caeeac7a3 100644 --- a/src/target/cortex_m3.c +++ b/src/target/cortex_m3.c @@ -259,7 +259,7 @@ static int cortex_m3_examine_debug_reason(target_t *target) static int cortex_m3_examine_exception_reason(target_t *target) { uint32_t shcsr, except_sr, cfsr = -1, except_ar = -1; - struct armv7m_common_s *armv7m = target_to_armv7m(target); + struct armv7m_common *armv7m = target_to_armv7m(target); struct swjdp_common *swjdp = &armv7m->swjdp_info; mem_ap_read_u32(swjdp, NVIC_SHCSR, &shcsr); @@ -310,7 +310,7 @@ static int cortex_m3_debug_entry(target_t *target) uint32_t xPSR; int retval; struct cortex_m3_common_s *cortex_m3 = target_to_cm3(target); - struct armv7m_common_s *armv7m = &cortex_m3->armv7m; + struct armv7m_common *armv7m = &cortex_m3->armv7m; struct swjdp_common *swjdp = &armv7m->swjdp_info; LOG_DEBUG(" "); @@ -547,7 +547,7 @@ static void cortex_m3_enable_breakpoints(struct target_s *target) static int cortex_m3_resume(struct target_s *target, int current, uint32_t address, int handle_breakpoints, int debug_execution) { - struct armv7m_common_s *armv7m = target_to_armv7m(target); + struct armv7m_common *armv7m = target_to_armv7m(target); breakpoint_t *breakpoint = NULL; uint32_t resume_pc; @@ -636,7 +636,7 @@ static int cortex_m3_step(struct target_s *target, int current, uint32_t address, int handle_breakpoints) { struct cortex_m3_common_s *cortex_m3 = target_to_cm3(target); - struct armv7m_common_s *armv7m = &cortex_m3->armv7m; + struct armv7m_common *armv7m = &cortex_m3->armv7m; struct swjdp_common *swjdp = &armv7m->swjdp_info; breakpoint_t *breakpoint = NULL; @@ -1231,7 +1231,7 @@ static int cortex_m3_load_core_reg_u32(struct target_s *target, enum armv7m_regtype type, uint32_t num, uint32_t * value) { int retval; - struct armv7m_common_s *armv7m = target_to_armv7m(target); + struct armv7m_common *armv7m = target_to_armv7m(target); struct swjdp_common *swjdp = &armv7m->swjdp_info; /* NOTE: we "know" here that the register identifiers used @@ -1295,7 +1295,7 @@ static int cortex_m3_store_core_reg_u32(struct target_s *target, { int retval; uint32_t reg; - struct armv7m_common_s *armv7m = target_to_armv7m(target); + struct armv7m_common *armv7m = target_to_armv7m(target); struct swjdp_common *swjdp = &armv7m->swjdp_info; #ifdef ARMV7_GDB_HACKS @@ -1370,7 +1370,7 @@ static int cortex_m3_store_core_reg_u32(struct target_s *target, static int cortex_m3_read_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer) { - struct armv7m_common_s *armv7m = target_to_armv7m(target); + struct armv7m_common *armv7m = target_to_armv7m(target); struct swjdp_common *swjdp = &armv7m->swjdp_info; int retval; @@ -1402,7 +1402,7 @@ static int cortex_m3_read_memory(struct target_s *target, uint32_t address, static int cortex_m3_write_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer) { - struct armv7m_common_s *armv7m = target_to_armv7m(target); + struct armv7m_common *armv7m = target_to_armv7m(target); struct swjdp_common *swjdp = &armv7m->swjdp_info; int retval; @@ -1654,7 +1654,7 @@ static int cortex_m3_dcc_read(struct swjdp_common *swjdp, uint8_t *value, uint8_ static int cortex_m3_target_request_data(target_t *target, uint32_t size, uint8_t *buffer) { - struct armv7m_common_s *armv7m = target_to_armv7m(target); + struct armv7m_common *armv7m = target_to_armv7m(target); struct swjdp_common *swjdp = &armv7m->swjdp_info; uint8_t data; uint8_t ctrl; @@ -1674,7 +1674,7 @@ static int cortex_m3_handle_target_request(void *priv) target_t *target = priv; if (!target_was_examined(target)) return ERROR_OK; - struct armv7m_common_s *armv7m = target_to_armv7m(target); + struct armv7m_common *armv7m = target_to_armv7m(target); struct swjdp_common *swjdp = &armv7m->swjdp_info; if (!target->dbg_msg_enabled) @@ -1711,7 +1711,7 @@ static int cortex_m3_init_arch_info(target_t *target, cortex_m3_common_t *cortex_m3, struct jtag_tap *tap) { int retval; - struct armv7m_common_s *armv7m = &cortex_m3->armv7m; + struct armv7m_common *armv7m = &cortex_m3->armv7m; armv7m_init_arch_info(target, armv7m); @@ -1837,7 +1837,7 @@ COMMAND_HANDLER(handle_cortex_m3_vector_catch_command) { target_t *target = get_current_target(cmd_ctx); struct cortex_m3_common_s *cortex_m3 = target_to_cm3(target); - struct armv7m_common_s *armv7m = &cortex_m3->armv7m; + struct armv7m_common *armv7m = &cortex_m3->armv7m; struct swjdp_common *swjdp = &armv7m->swjdp_info; uint32_t demcr = 0; int retval; diff --git a/src/target/cortex_m3.h b/src/target/cortex_m3.h index 5b1d5eaea..747404912 100644 --- a/src/target/cortex_m3.h +++ b/src/target/cortex_m3.h @@ -160,7 +160,7 @@ typedef struct cortex_m3_common_s cortex_m3_dwt_comparator_t *dwt_comparator_list; struct reg_cache_s *dwt_cache; - armv7m_common_t armv7m; + struct armv7m_common armv7m; } cortex_m3_common_t; static inline struct cortex_m3_common_s *