SimonQian <simonqian@simonqian.com> AVR wip
git-svn-id: svn://svn.berlios.de/openocd/trunk@1540 b42882b7-edfa-0310-969c-e2dbd0fdcd60__archive__
oharboe
parent
18fd79e578
commit
e784db4fdd
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@ -7,10 +7,10 @@ libflash_a_SOURCES = \
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str7x.c str9x.c aduc702x.c nand.c nand_ecc.c \
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lpc3180_nand_controller.c stellaris.c str9xpec.c stm32x.c tms470.c \
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ecos.c orion_nand.c s3c24xx_nand.c s3c2410_nand.c s3c2412_nand.c \
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s3c2440_nand.c s3c2443_nand.c lpc288x.c ocl.c mflash.c pic32mx.c
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s3c2440_nand.c s3c2443_nand.c lpc288x.c ocl.c mflash.c pic32mx.c avrf.c
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noinst_HEADERS = \
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flash.h lpc2000.h cfi.h non_cfi.h at91sam7.h at91sam7_old.h str7x.h \
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str9x.h nand.h lpc3180_nand_controller.h stellaris.h str9xpec.h \
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stm32x.h tms470.h s3c24xx_nand.h s3c24xx_regs_nand.h lpc288x.h \
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mflash.h ocl.h pic32mx.h
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mflash.h ocl.h pic32mx.h avrf.h
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MAINTAINERCLEANFILES = Makefile.in
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@ -0,0 +1,500 @@
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/***************************************************************************
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* Copyright (C) 2009 by Simon Qian *
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* SimonQian@SimonQian.com *
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* *
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* This program is free software; you can redistribute it and/or modify *
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* it under the terms of the GNU General Public License as published by *
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* the Free Software Foundation; either version 2 of the License, or *
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* (at your option) any later version. *
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* *
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* This program is distributed in the hope that it will be useful, *
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* but WITHOUT ANY WARRANTY; without even the implied warranty of *
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
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* GNU General Public License for more details. *
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* *
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* You should have received a copy of the GNU General Public License *
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* along with this program; if not, write to the *
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* Free Software Foundation, Inc., *
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* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
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***************************************************************************/
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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#include "replacements.h"
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#include "avrf.h"
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#include "avrt.h"
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#include "flash.h"
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#include "target.h"
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#include "log.h"
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#include "algorithm.h"
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#include "binarybuffer.h"
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#include <stdlib.h>
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#include <string.h>
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/* AVR_JTAG_Instructions */
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#define AVR_JTAG_INS_LEN 4
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// Public Instructions:
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#define AVR_JTAG_INS_EXTEST 0x00
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#define AVR_JTAG_INS_IDCODE 0x01
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#define AVR_JTAG_INS_SAMPLE_PRELOAD 0x02
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#define AVR_JTAG_INS_BYPASS 0x0F
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// AVR Specified Public Instructions:
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#define AVR_JTAG_INS_AVR_RESET 0x0C
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#define AVR_JTAG_INS_PROG_ENABLE 0x04
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#define AVR_JTAG_INS_PROG_COMMANDS 0x05
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#define AVR_JTAG_INS_PROG_PAGELOAD 0x06
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#define AVR_JTAG_INS_PROG_PAGEREAD 0x07
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// Data Registers:
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#define AVR_JTAG_REG_Bypass_Len 1
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#define AVR_JTAG_REG_DeviceID_Len 32
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#define AVR_JTAG_REG_Reset_Len 1
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#define AVR_JTAG_REG_JTAGID_Len 32
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#define AVR_JTAG_REG_ProgrammingEnable_Len 16
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#define AVR_JTAG_REG_ProgrammingCommand_Len 15
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#define AVR_JTAG_REG_FlashDataByte_Len 16
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avrf_type_t avft_chips_info[] =
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{
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// name, chip_id, flash_page_size, flash_page_num, eeprom_page_size, eeprom_page_num
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{"atmega128", 0x9702, 256, 512, 8, 512},
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};
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static int avrf_register_commands(struct command_context_s *cmd_ctx);
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static int avrf_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
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static int avrf_erase(struct flash_bank_s *bank, int first, int last);
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static int avrf_protect(struct flash_bank_s *bank, int set, int first, int last);
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static int avrf_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
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static int avrf_probe(struct flash_bank_s *bank);
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static int avrf_auto_probe(struct flash_bank_s *bank);
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//static int avrf_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
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static int avrf_protect_check(struct flash_bank_s *bank);
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static int avrf_info(struct flash_bank_s *bank, char *buf, int buf_size);
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static int avrf_handle_mass_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
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extern int avr_jtag_sendinstr(jtag_tap_t *tap, u8 *ir_in, u8 ir_out);
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extern int avr_jtag_senddat(jtag_tap_t *tap, u32 *dr_in, u32 dr_out, int len);
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extern int mcu_write_ir(jtag_tap_t *tap, u8 *ir_in, u8 *ir_out, int ir_len, int rti);
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extern int mcu_write_dr(jtag_tap_t *tap, u8 *ir_in, u8 *ir_out, int dr_len, int rti);
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extern int mcu_write_ir_u8(jtag_tap_t *tap, u8 *ir_in, u8 ir_out, int ir_len, int rti);
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extern int mcu_write_dr_u8(jtag_tap_t *tap, u8 *ir_in, u8 ir_out, int dr_len, int rti);
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extern int mcu_write_ir_u16(jtag_tap_t *tap, u16 *ir_in, u16 ir_out, int ir_len, int rti);
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extern int mcu_write_dr_u16(jtag_tap_t *tap, u16 *ir_in, u16 ir_out, int dr_len, int rti);
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extern int mcu_write_ir_u32(jtag_tap_t *tap, u32 *ir_in, u32 ir_out, int ir_len, int rti);
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extern int mcu_write_dr_u32(jtag_tap_t *tap, u32 *ir_in, u32 ir_out, int dr_len, int rti);
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extern int mcu_execute_queue(void);
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flash_driver_t avr_flash =
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{
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.name = "avr",
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.register_commands = avrf_register_commands,
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.flash_bank_command = avrf_flash_bank_command,
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.erase = avrf_erase,
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.protect = avrf_protect,
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.write = avrf_write,
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.probe = avrf_probe,
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.auto_probe = avrf_auto_probe,
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.erase_check = default_flash_mem_blank_check,
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.protect_check = avrf_protect_check,
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.info = avrf_info
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};
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/* avr program functions */
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static int avr_jtag_reset(avr_common_t *avr, u32 reset)
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{
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avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_AVR_RESET);
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avr_jtag_senddat(avr->jtag_info.tap, NULL, reset ,AVR_JTAG_REG_Reset_Len);
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return ERROR_OK;
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}
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static int avr_jtag_read_jtagid(avr_common_t *avr, u32 *id)
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{
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avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_IDCODE);
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avr_jtag_senddat(avr->jtag_info.tap, id, 0, AVR_JTAG_REG_JTAGID_Len);
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return ERROR_OK;
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}
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static int avr_jtagprg_enterprogmode(avr_common_t *avr)
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{
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avr_jtag_reset(avr, 1);
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avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_ENABLE);
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avr_jtag_senddat(avr->jtag_info.tap, NULL, 0xA370, AVR_JTAG_REG_ProgrammingEnable_Len);
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return ERROR_OK;
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}
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static int avr_jtagprg_leaveprogmode(avr_common_t *avr)
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{
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avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
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avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2300, AVR_JTAG_REG_ProgrammingCommand_Len);
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avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3300, AVR_JTAG_REG_ProgrammingCommand_Len);
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avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_ENABLE);
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avr_jtag_senddat(avr->jtag_info.tap, NULL, 0, AVR_JTAG_REG_ProgrammingEnable_Len);
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avr_jtag_reset(avr, 0);
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return ERROR_OK;
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}
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static int avr_jtagprg_chiperase(avr_common_t *avr)
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{
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u32 poll_value;
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avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
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avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2380, AVR_JTAG_REG_ProgrammingCommand_Len);
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avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3180, AVR_JTAG_REG_ProgrammingCommand_Len);
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avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3380, AVR_JTAG_REG_ProgrammingCommand_Len);
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avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3380, AVR_JTAG_REG_ProgrammingCommand_Len);
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do{
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poll_value = 0;
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avr_jtag_senddat(avr->jtag_info.tap, &poll_value, 0x3380, AVR_JTAG_REG_ProgrammingCommand_Len);
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if (ERROR_OK != mcu_execute_queue())
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{
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return ERROR_FAIL;
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}
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LOG_DEBUG("poll_value = 0x%04X", poll_value);
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}while(!(poll_value & 0x0200));
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return ERROR_OK;
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}
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static int avr_jtagprg_writeflashpage(avr_common_t *avr, u8 *page_buf, u32 buf_size, u32 addr, u32 page_size)
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{
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u32 i, poll_value;
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avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
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avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2310, AVR_JTAG_REG_ProgrammingCommand_Len);
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// load addr high byte
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avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x0700 | ((addr >> 9) & 0xFF), AVR_JTAG_REG_ProgrammingCommand_Len);
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// load addr low byte
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avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x0300 | ((addr >> 1) & 0xFF), AVR_JTAG_REG_ProgrammingCommand_Len);
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avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_PAGELOAD);
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for (i = 0; i < page_size; i++)
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{
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if (i < buf_size)
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{
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avr_jtag_senddat(avr->jtag_info.tap, NULL, page_buf[i], 8);
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}
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else
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{
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avr_jtag_senddat(avr->jtag_info.tap, NULL, 0xFF, 8);
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}
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}
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avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
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avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
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avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3500, AVR_JTAG_REG_ProgrammingCommand_Len);
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avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
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avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
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do{
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poll_value = 0;
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avr_jtag_senddat(avr->jtag_info.tap, &poll_value, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
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if (ERROR_OK != mcu_execute_queue())
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{
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return ERROR_FAIL;
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}
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LOG_DEBUG("poll_value = 0x%04X", poll_value);
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}while(!(poll_value & 0x0200));
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return ERROR_OK;
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}
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/* interface command */
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static int avrf_register_commands(struct command_context_s *cmd_ctx)
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{
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command_t *avr_cmd = register_command(cmd_ctx, NULL, "avr", NULL, COMMAND_ANY, "avr flash specific commands");
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register_command(cmd_ctx, avr_cmd, "mass_erase", avrf_handle_mass_erase_command, COMMAND_EXEC,
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"mass erase device");
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return ERROR_OK;
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}
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static int avrf_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
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{
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avrf_flash_bank_t *avrf_info;
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if (argc < 6)
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{
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LOG_WARNING("incomplete flash_bank avr configuration");
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return ERROR_FLASH_BANK_INVALID;
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}
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avrf_info = malloc(sizeof(avrf_flash_bank_t));
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bank->driver_priv = avrf_info;
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avrf_info->probed = 0;
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return ERROR_OK;
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}
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static int avrf_erase(struct flash_bank_s *bank, int first, int last)
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{
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LOG_INFO(__FUNCTION__);
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return ERROR_OK;
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}
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static int avrf_protect(struct flash_bank_s *bank, int set, int first, int last)
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{
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LOG_INFO(__FUNCTION__);
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return ERROR_OK;
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}
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static int avrf_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
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{
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target_t *target = bank->target;
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avr_common_t *avr = target->arch_info;
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u32 cur_size, cur_buffer_size, page_size;
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if (bank->target->state != TARGET_HALTED)
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{
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LOG_ERROR("Target not halted");
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return ERROR_TARGET_NOT_HALTED;
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}
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page_size = bank->sectors[0].size;
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if ((offset % page_size) != 0)
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{
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LOG_WARNING("offset 0x%x breaks required %d-byte alignment", offset, page_size);
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return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
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}
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LOG_DEBUG("offset is 0x%08X", offset);
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LOG_DEBUG("count is %d", count);
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if (ERROR_OK != avr_jtagprg_enterprogmode(avr))
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{
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return ERROR_FAIL;
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}
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cur_size = 0;
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while(count > 0)
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{
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if (count > page_size)
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{
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cur_buffer_size = page_size;
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}
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else
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{
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cur_buffer_size = count;
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}
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avr_jtagprg_writeflashpage(avr, buffer + cur_size, cur_buffer_size, offset + cur_size, page_size);
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count -= cur_buffer_size;
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cur_size += cur_buffer_size;
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keep_alive();
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}
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return avr_jtagprg_leaveprogmode(avr);
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}
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#define EXTRACT_MFG(X) (((X) & 0xffe) >> 1)
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#define EXTRACT_PART(X) (((X) & 0xffff000) >> 12)
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#define EXTRACT_VER(X) (((X) & 0xf0000000) >> 28)
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static int avrf_probe(struct flash_bank_s *bank)
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{
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target_t *target = bank->target;
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avrf_flash_bank_t *avrf_info = bank->driver_priv;
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avr_common_t *avr = target->arch_info;
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avrf_type_t *avr_info;
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int i;
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u32 device_id;
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if (bank->target->state != TARGET_HALTED)
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{
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LOG_ERROR("Target not halted");
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return ERROR_TARGET_NOT_HALTED;
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}
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avrf_info->probed = 0;
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avr_jtag_read_jtagid(avr, &device_id);
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if (ERROR_OK != mcu_execute_queue())
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{
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return ERROR_FAIL;
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}
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LOG_INFO( "device id = 0x%08x", device_id );
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if (EXTRACT_MFG(device_id) != 0x1F)
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{
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LOG_ERROR("0x%X is invalid Manufacturer for avr, 0x%X is expected", EXTRACT_MFG(device_id), 0x1F);
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}
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for (i = 0; i < (int)(sizeof(avft_chips_info) / sizeof(avft_chips_info[0])); i++)
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{
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if (avft_chips_info[i].chip_id == EXTRACT_PART(device_id))
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{
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avr_info = &avft_chips_info[i];
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LOG_INFO("target device is %s", avr_info->name);
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break;
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}
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}
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if (i < (int)(sizeof(avft_chips_info) / sizeof(avft_chips_info[0])))
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{
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// chip found
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bank->base = 0x00000000;
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bank->size = (avr_info->flash_page_size * avr_info->flash_page_num);
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bank->num_sectors = avr_info->flash_page_num;
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bank->sectors = malloc(sizeof(flash_sector_t) * avr_info->flash_page_num);
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for (i = 0; i < avr_info->flash_page_num; i++)
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{
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bank->sectors[i].offset = i * avr_info->flash_page_size;
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bank->sectors[i].size = avr_info->flash_page_size;
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bank->sectors[i].is_erased = -1;
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bank->sectors[i].is_protected = 1;
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}
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avrf_info->probed = 1;
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return ERROR_OK;
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}
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else
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{
|
||||
// chip not supported
|
||||
LOG_ERROR("0x%X is not support for avr", EXTRACT_PART(device_id));
|
||||
|
||||
avrf_info->probed = 1;
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
}
|
||||
|
||||
static int avrf_auto_probe(struct flash_bank_s *bank)
|
||||
{
|
||||
avrf_flash_bank_t *avrf_info = bank->driver_priv;
|
||||
if (avrf_info->probed)
|
||||
return ERROR_OK;
|
||||
return avrf_probe(bank);
|
||||
}
|
||||
|
||||
static int avrf_protect_check(struct flash_bank_s *bank)
|
||||
{
|
||||
LOG_INFO(__FUNCTION__);
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
static int avrf_info(struct flash_bank_s *bank, char *buf, int buf_size)
|
||||
{
|
||||
target_t *target = bank->target;
|
||||
avr_common_t *avr = target->arch_info;
|
||||
avrf_type_t *avr_info;
|
||||
int i;
|
||||
u32 device_id;
|
||||
|
||||
if (bank->target->state != TARGET_HALTED)
|
||||
{
|
||||
LOG_ERROR("Target not halted");
|
||||
return ERROR_TARGET_NOT_HALTED;
|
||||
}
|
||||
|
||||
avr_jtag_read_jtagid(avr, &device_id);
|
||||
if (ERROR_OK != mcu_execute_queue())
|
||||
{
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
LOG_INFO( "device id = 0x%08x", device_id );
|
||||
if (EXTRACT_MFG(device_id) != 0x1F)
|
||||
{
|
||||
LOG_ERROR("0x%X is invalid Manufacturer for avr, 0x%X is expected", EXTRACT_MFG(device_id), 0x1F);
|
||||
}
|
||||
|
||||
for (i = 0; i < (int)(sizeof(avft_chips_info) / sizeof(avft_chips_info[0])); i++)
|
||||
{
|
||||
if (avft_chips_info[i].chip_id == EXTRACT_PART(device_id))
|
||||
{
|
||||
avr_info = &avft_chips_info[i];
|
||||
LOG_INFO("target device is %s", avr_info->name);
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
}
|
||||
|
||||
if (i < (int)(sizeof(avft_chips_info) / sizeof(avft_chips_info[0])))
|
||||
{
|
||||
// chip found
|
||||
snprintf(buf, buf_size, "%s - Rev: 0x%X", avr_info->name, EXTRACT_VER(device_id));
|
||||
return ERROR_OK;
|
||||
}
|
||||
else
|
||||
{
|
||||
// chip not supported
|
||||
snprintf(buf, buf_size, "Cannot identify target as a avr\n");
|
||||
return ERROR_FLASH_OPERATION_FAILED;
|
||||
}
|
||||
}
|
||||
|
||||
static int avrf_mass_erase(struct flash_bank_s *bank)
|
||||
{
|
||||
target_t *target = bank->target;
|
||||
avr_common_t *avr = target->arch_info;
|
||||
|
||||
if (target->state != TARGET_HALTED)
|
||||
{
|
||||
LOG_ERROR("Target not halted");
|
||||
return ERROR_TARGET_NOT_HALTED;
|
||||
}
|
||||
|
||||
if ((ERROR_OK != avr_jtagprg_enterprogmode(avr))
|
||||
|| (ERROR_OK != avr_jtagprg_chiperase(avr))
|
||||
|| (ERROR_OK != avr_jtagprg_leaveprogmode(avr)))
|
||||
{
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
static int avrf_handle_mass_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
|
||||
{
|
||||
flash_bank_t *bank;
|
||||
int i;
|
||||
|
||||
if (argc < 1)
|
||||
{
|
||||
command_print(cmd_ctx, "avr mass_erase <bank>");
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0));
|
||||
if (!bank)
|
||||
{
|
||||
command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]);
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
if (avrf_mass_erase(bank) == ERROR_OK)
|
||||
{
|
||||
/* set all sectors as erased */
|
||||
for (i = 0; i < bank->num_sectors; i++)
|
||||
{
|
||||
bank->sectors[i].is_erased = 1;
|
||||
}
|
||||
|
||||
command_print(cmd_ctx, "avr mass erase complete");
|
||||
}
|
||||
else
|
||||
{
|
||||
command_print(cmd_ctx, "avr mass erase failed");
|
||||
}
|
||||
|
||||
LOG_DEBUG(__FUNCTION__);
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
|
@ -0,0 +1,39 @@
|
|||
/***************************************************************************
|
||||
* Copyright (C) 2009 by Simon Qian *
|
||||
* SimonQian@SimonQian.com *
|
||||
* *
|
||||
* This program is free software; you can redistribute it and/or modify *
|
||||
* it under the terms of the GNU General Public License as published by *
|
||||
* the Free Software Foundation; either version 2 of the License, or *
|
||||
* (at your option) any later version. *
|
||||
* *
|
||||
* This program is distributed in the hope that it will be useful, *
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
|
||||
* GNU General Public License for more details. *
|
||||
* *
|
||||
* You should have received a copy of the GNU General Public License *
|
||||
* along with this program; if not, write to the *
|
||||
* Free Software Foundation, Inc., *
|
||||
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
|
||||
***************************************************************************/
|
||||
#ifndef AVRF_H
|
||||
#define AVRF_H
|
||||
|
||||
typedef struct avrf_type_s
|
||||
{
|
||||
char name[15];
|
||||
u16 chip_id;
|
||||
int flash_page_size;
|
||||
int flash_page_num;
|
||||
int eeprom_page_size;
|
||||
int eeprom_page_num;
|
||||
} avrf_type_t;
|
||||
|
||||
typedef struct avrf_flash_bank_s
|
||||
{
|
||||
int ppage_size;
|
||||
int probed;
|
||||
} avrf_flash_bank_t;
|
||||
|
||||
#endif /* AVRF_H */
|
||||
|
|
@ -77,6 +77,7 @@ extern flash_driver_t ecosflash_flash;
|
|||
extern flash_driver_t lpc288x_flash;
|
||||
extern flash_driver_t ocl_flash;
|
||||
extern flash_driver_t pic32mx_flash;
|
||||
extern flash_driver_t avr_flash;
|
||||
|
||||
flash_driver_t *flash_drivers[] = {
|
||||
&lpc2000_flash,
|
||||
|
|
@ -94,6 +95,7 @@ flash_driver_t *flash_drivers[] = {
|
|||
&lpc288x_flash,
|
||||
&ocl_flash,
|
||||
&pic32mx_flash,
|
||||
&avr_flash,
|
||||
NULL,
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -13,11 +13,11 @@ libtarget_a_SOURCES = target.c register.c breakpoints.c armv4_5.c embeddedice.c
|
|||
arm_jtag.c arm7_9_common.c algorithm.c arm920t.c arm720t.c armv4_5_mmu.c armv4_5_cache.c arm_disassembler.c \
|
||||
arm966e.c arm926ejs.c feroceon.c etb.c xscale.c arm_simulator.c image.c armv7m.c cortex_m3.c arm_adi_v5.c \
|
||||
etm_dummy.c $(OOCD_TRACE_FILES) target_request.c trace.c arm11.c arm11_dbgtap.c mips32.c mips_m4k.c \
|
||||
mips32_pracc.c mips32_dmaacc.c mips_ejtag.c
|
||||
mips32_pracc.c mips32_dmaacc.c mips_ejtag.c avrt.c
|
||||
noinst_HEADERS = target.h trace.h register.h armv4_5.h embeddedice.h etm.h arm7tdmi.h arm9tdmi.h \
|
||||
arm_jtag.h arm7_9_common.h arm920t.h arm720t.h armv4_5_mmu.h armv4_5_cache.h breakpoints.h algorithm.h \
|
||||
arm_disassembler.h arm966e.h arm926ejs.h etb.h xscale.h arm_simulator.h image.h armv7m.h cortex_m3.h arm_adi_v5.h \
|
||||
etm_dummy.h oocd_trace.h target_request.h trace.h arm11.h mips32.h mips_m4k.h mips_ejtag.h mips32_pracc.h mips32_dmaacc.h
|
||||
etm_dummy.h oocd_trace.h target_request.h trace.h arm11.h mips32.h mips_m4k.h mips_ejtag.h mips32_pracc.h mips32_dmaacc.h avrt.h
|
||||
|
||||
nobase_dist_pkglib_DATA =
|
||||
nobase_dist_pkglib_DATA += xscale/debug_handler.bin
|
||||
|
|
|
|||
|
|
@ -0,0 +1,354 @@
|
|||
/***************************************************************************
|
||||
* Copyright (C) 2009 by Simon Qian *
|
||||
* SimonQian@SimonQian.com *
|
||||
* *
|
||||
* This program is free software; you can redistribute it and/or modify *
|
||||
* it under the terms of the GNU General Public License as published by *
|
||||
* the Free Software Foundation; either version 2 of the License, or *
|
||||
* (at your option) any later version. *
|
||||
* *
|
||||
* This program is distributed in the hope that it will be useful, *
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
|
||||
* GNU General Public License for more details. *
|
||||
* *
|
||||
* You should have received a copy of the GNU General Public License *
|
||||
* along with this program; if not, write to the *
|
||||
* Free Software Foundation, Inc., *
|
||||
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
|
||||
***************************************************************************/
|
||||
#ifdef HAVE_CONFIG_H
|
||||
#include "config.h"
|
||||
#endif
|
||||
|
||||
#include "replacements.h"
|
||||
|
||||
#include "avrt.h"
|
||||
|
||||
#include "register.h"
|
||||
#include "target.h"
|
||||
#include "log.h"
|
||||
#include "jtag.h"
|
||||
#include "binarybuffer.h"
|
||||
#include "time_support.h"
|
||||
#include "breakpoints.h"
|
||||
#include "fileio.h"
|
||||
|
||||
#include <stdlib.h>
|
||||
#include <string.h>
|
||||
|
||||
#include <sys/types.h>
|
||||
#include <unistd.h>
|
||||
#include <errno.h>
|
||||
|
||||
#define AVR_JTAG_INS_LEN 4
|
||||
|
||||
/* cli handling */
|
||||
int avr_register_commands(struct command_context_s *cmd_ctx);
|
||||
|
||||
/* forward declarations */
|
||||
int avr_target_create(struct target_s *target, Jim_Interp *interp);
|
||||
int avr_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
|
||||
int avr_quit(void);
|
||||
|
||||
int avr_arch_state(struct target_s *target);
|
||||
int avr_poll(target_t *target);
|
||||
int avr_halt(target_t *target);
|
||||
int avr_resume(struct target_s *target, int current, u32 address, int handle_breakpoints, int debug_execution);
|
||||
int avr_step(struct target_s *target, int current, u32 address, int handle_breakpoints);
|
||||
|
||||
int avr_assert_reset(target_t *target);
|
||||
int avr_deassert_reset(target_t *target);
|
||||
int avr_soft_reset_halt(struct target_s *target);
|
||||
|
||||
/* IR and DR functions */
|
||||
int avr_jtag_sendinstr(jtag_tap_t *tap, u8 *ir_in, u8 ir_out);
|
||||
int avr_jtag_senddat(jtag_tap_t *tap, u32 *dr_in, u32 dr_out, int len);
|
||||
|
||||
int mcu_write_ir(jtag_tap_t *tap, u8 *ir_in, u8 *ir_out, int ir_len, int rti);
|
||||
int mcu_write_dr(jtag_tap_t *tap, u8 *dr_in, u8 *dr_out, int dr_len, int rti);
|
||||
int mcu_write_ir_u8(jtag_tap_t *tap, u8 *ir_in, u8 ir_out, int ir_len, int rti);
|
||||
int mcu_write_dr_u8(jtag_tap_t *tap, u8 *ir_in, u8 ir_out, int dr_len, int rti);
|
||||
int mcu_write_ir_u16(jtag_tap_t *tap, u16 *ir_in, u16 ir_out, int ir_len, int rti);
|
||||
int mcu_write_dr_u16(jtag_tap_t *tap, u16 *ir_in, u16 ir_out, int dr_len, int rti);
|
||||
int mcu_write_ir_u32(jtag_tap_t *tap, u32 *ir_in, u32 ir_out, int ir_len, int rti);
|
||||
int mcu_write_dr_u32(jtag_tap_t *tap, u32 *ir_in, u32 ir_out, int dr_len, int rti);
|
||||
int mcu_execute_queue(void);
|
||||
|
||||
target_type_t avr_target =
|
||||
{
|
||||
.name = "avr",
|
||||
|
||||
.poll = avr_poll,
|
||||
.arch_state = avr_arch_state,
|
||||
|
||||
.target_request_data = NULL,
|
||||
|
||||
.halt = avr_halt,
|
||||
.resume = avr_resume,
|
||||
.step = avr_step,
|
||||
|
||||
.assert_reset = avr_assert_reset,
|
||||
.deassert_reset = avr_deassert_reset,
|
||||
.soft_reset_halt = avr_soft_reset_halt,
|
||||
/*
|
||||
.get_gdb_reg_list = avr_get_gdb_reg_list,
|
||||
|
||||
.read_memory = avr_read_memory,
|
||||
.write_memory = avr_write_memory,
|
||||
.bulk_write_memory = avr_bulk_write_memory,
|
||||
.checksum_memory = avr_checksum_memory,
|
||||
.blank_check_memory = avr_blank_check_memory,
|
||||
|
||||
.run_algorithm = avr_run_algorithm,
|
||||
|
||||
.add_breakpoint = avr_add_breakpoint,
|
||||
.remove_breakpoint = avr_remove_breakpoint,
|
||||
.add_watchpoint = avr_add_watchpoint,
|
||||
.remove_watchpoint = avr_remove_watchpoint,
|
||||
*/
|
||||
.register_commands = avr_register_commands,
|
||||
.target_create = avr_target_create,
|
||||
.init_target = avr_init_target,
|
||||
.quit = avr_quit,
|
||||
/*
|
||||
.virt2phys = avr_virt2phys,
|
||||
.mmu = avr_mmu
|
||||
*/
|
||||
};
|
||||
|
||||
int avr_register_commands(struct command_context_s *cmd_ctx)
|
||||
{
|
||||
LOG_DEBUG(__FUNCTION__);
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
int avr_target_create(struct target_s *target, Jim_Interp *interp)
|
||||
{
|
||||
avr_common_t *avr = calloc(1, sizeof(avr_common_t));
|
||||
|
||||
avr->jtag_info.tap = target->tap;
|
||||
target->arch_info = avr;
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
int avr_init_target(struct command_context_s *cmd_ctx, struct target_s *target)
|
||||
{
|
||||
LOG_DEBUG(__FUNCTION__);
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
int avr_quit(void)
|
||||
{
|
||||
LOG_DEBUG(__FUNCTION__);
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
int avr_arch_state(struct target_s *target)
|
||||
{
|
||||
LOG_DEBUG(__FUNCTION__);
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
int avr_poll(target_t *target)
|
||||
{
|
||||
if ((target->state == TARGET_RUNNING) || (target->state == TARGET_DEBUG_RUNNING))
|
||||
{
|
||||
target->state = TARGET_HALTED;
|
||||
}
|
||||
|
||||
LOG_DEBUG(__FUNCTION__);
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
int avr_halt(target_t *target)
|
||||
{
|
||||
LOG_DEBUG(__FUNCTION__);
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
int avr_resume(struct target_s *target, int current, u32 address, int handle_breakpoints, int debug_execution)
|
||||
{
|
||||
LOG_DEBUG(__FUNCTION__);
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
int avr_step(struct target_s *target, int current, u32 address, int handle_breakpoints)
|
||||
{
|
||||
LOG_DEBUG(__FUNCTION__);
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
int avr_assert_reset(target_t *target)
|
||||
{
|
||||
target->state = TARGET_RESET;
|
||||
|
||||
LOG_DEBUG(__FUNCTION__);
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
int avr_deassert_reset(target_t *target)
|
||||
{
|
||||
target->state = TARGET_RUNNING;
|
||||
|
||||
LOG_DEBUG(__FUNCTION__);
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
int avr_soft_reset_halt(struct target_s *target)
|
||||
{
|
||||
LOG_DEBUG(__FUNCTION__);
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
int avr_jtag_senddat(jtag_tap_t *tap, u32* dr_in, u32 dr_out, int len)
|
||||
{
|
||||
return mcu_write_dr_u32(tap, dr_in, dr_out, len, 1);
|
||||
}
|
||||
|
||||
int avr_jtag_sendinstr(jtag_tap_t *tap, u8 *ir_in, u8 ir_out)
|
||||
{
|
||||
return mcu_write_ir_u8(tap, ir_in, ir_out, AVR_JTAG_INS_LEN, 1);
|
||||
}
|
||||
|
||||
/* IR and DR functions */
|
||||
int mcu_write_ir(jtag_tap_t *tap, u8 *ir_in, u8 *ir_out, int ir_len, int rti)
|
||||
{
|
||||
if (NULL == tap)
|
||||
{
|
||||
LOG_ERROR("invalid tap");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
if (ir_len != tap->ir_length)
|
||||
{
|
||||
LOG_ERROR("invalid ir_len");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
{
|
||||
scan_field_t field[1];
|
||||
|
||||
field[0].tap = tap;
|
||||
field[0].num_bits = tap->ir_length;
|
||||
field[0].out_value = ir_out;
|
||||
field[0].out_mask = NULL;
|
||||
field[0].in_value = ir_in;
|
||||
field[0].in_check_value = NULL;
|
||||
field[0].in_check_mask = NULL;
|
||||
field[0].in_handler = NULL;
|
||||
field[0].in_handler_priv = NULL;
|
||||
jtag_add_plain_ir_scan(sizeof(field) / sizeof(field[0]), field, TAP_IDLE);
|
||||
}
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
int mcu_write_dr(jtag_tap_t *tap, u8 *dr_in, u8 *dr_out, int dr_len, int rti)
|
||||
{
|
||||
if (NULL == tap)
|
||||
{
|
||||
LOG_ERROR("invalid tap");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
{
|
||||
scan_field_t field[1];
|
||||
|
||||
field[0].tap = tap;
|
||||
field[0].num_bits = dr_len;
|
||||
field[0].out_value = dr_out;
|
||||
field[0].out_mask = NULL;
|
||||
field[0].in_value = dr_in;
|
||||
field[0].in_check_value = NULL;
|
||||
field[0].in_check_mask = NULL;
|
||||
field[0].in_handler = NULL;
|
||||
field[0].in_handler_priv = NULL;
|
||||
jtag_add_plain_dr_scan(sizeof(field) / sizeof(field[0]), field, TAP_IDLE);
|
||||
}
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
int mcu_write_ir_u8(jtag_tap_t *tap, u8 *ir_in, u8 ir_out, int ir_len, int rti)
|
||||
{
|
||||
if (ir_len > 8)
|
||||
{
|
||||
LOG_ERROR("ir_len overflow, maxium is 8");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
mcu_write_ir(tap, ir_in, &ir_out, ir_len, rti);
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
int mcu_write_dr_u8(jtag_tap_t *tap, u8 *dr_in, u8 dr_out, int dr_len, int rti)
|
||||
{
|
||||
if (dr_len > 8)
|
||||
{
|
||||
LOG_ERROR("dr_len overflow, maxium is 8");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
mcu_write_dr(tap, dr_in, &dr_out, dr_len, rti);
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
int mcu_write_ir_u16(jtag_tap_t *tap, u16 *ir_in, u16 ir_out, int ir_len, int rti)
|
||||
{
|
||||
if (ir_len > 16)
|
||||
{
|
||||
LOG_ERROR("ir_len overflow, maxium is 16");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
mcu_write_ir(tap, (u8*)ir_in, (u8*)&ir_out, ir_len, rti);
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
int mcu_write_dr_u16(jtag_tap_t *tap, u16 *dr_in, u16 dr_out, int dr_len, int rti)
|
||||
{
|
||||
if (dr_len > 16)
|
||||
{
|
||||
LOG_ERROR("dr_len overflow, maxium is 16");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
mcu_write_dr(tap, (u8*)dr_in, (u8*)&dr_out, dr_len, rti);
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
int mcu_write_ir_u32(jtag_tap_t *tap, u32 *ir_in, u32 ir_out, int ir_len, int rti)
|
||||
{
|
||||
if (ir_len > 32)
|
||||
{
|
||||
LOG_ERROR("ir_len overflow, maxium is 32");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
mcu_write_ir(tap, (u8*)ir_in, (u8*)&ir_out, ir_len, rti);
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
int mcu_write_dr_u32(jtag_tap_t *tap, u32 *dr_in, u32 dr_out, int dr_len, int rti)
|
||||
{
|
||||
if (dr_len > 32)
|
||||
{
|
||||
LOG_ERROR("dr_len overflow, maxium is 32");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
mcu_write_dr(tap, (u8*)dr_in, (u8*)&dr_out, dr_len, rti);
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
int mcu_execute_queue(void)
|
||||
{
|
||||
return jtag_execute_queue();
|
||||
}
|
||||
|
|
@ -0,0 +1,33 @@
|
|||
/***************************************************************************
|
||||
* Copyright (C) 2009 by Simon Qian *
|
||||
* SimonQian@SimonQian.com *
|
||||
* *
|
||||
* This program is free software; you can redistribute it and/or modify *
|
||||
* it under the terms of the GNU General Public License as published by *
|
||||
* the Free Software Foundation; either version 2 of the License, or *
|
||||
* (at your option) any later version. *
|
||||
* *
|
||||
* This program is distributed in the hope that it will be useful, *
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
|
||||
* GNU General Public License for more details. *
|
||||
* *
|
||||
* You should have received a copy of the GNU General Public License *
|
||||
* along with this program; if not, write to the *
|
||||
* Free Software Foundation, Inc., *
|
||||
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
|
||||
***************************************************************************/
|
||||
#ifndef AVRT_H
|
||||
#define AVRT_H
|
||||
|
||||
typedef struct mcu_jtag_s
|
||||
{
|
||||
jtag_tap_t *tap;
|
||||
} mcu_jtag_t;
|
||||
|
||||
typedef struct avr_common_s
|
||||
{
|
||||
mcu_jtag_t jtag_info;
|
||||
} avr_common_t;
|
||||
|
||||
#endif /* AVRT_H */
|
||||
|
|
@ -105,6 +105,7 @@ extern target_type_t xscale_target;
|
|||
extern target_type_t cortexm3_target;
|
||||
extern target_type_t arm11_target;
|
||||
extern target_type_t mips_m4k_target;
|
||||
extern target_type_t avr_target;
|
||||
|
||||
target_type_t *target_types[] =
|
||||
{
|
||||
|
|
@ -119,6 +120,7 @@ target_type_t *target_types[] =
|
|||
&cortexm3_target,
|
||||
&arm11_target,
|
||||
&mips_m4k_target,
|
||||
&avr_target,
|
||||
NULL,
|
||||
};
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue