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flash/stm32h7x: fix register names to comply with RM0399 Rev2 and RM0433 Rev6 

Change-Id: I085d86a2a47f4aeef93a99238e3b80ee294d46df
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5192
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
bscan_optimization
Tarek BOCHKATI 2019-06-01 14:49:36 +02:00 committed by Tomas Vanek
parent 8ed19a2e29
commit e6990bdd00
1 changed files with 13 additions and 13 deletions
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26
src/flash/nor/stm32h7x.c
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@ -38,18 +38,18 @@
#define FLASH_SR 0x10 #define FLASH_SR 0x10
#define FLASH_CCR 0x14 #define FLASH_CCR 0x14
#define FLASH_OPTCR 0x18 #define FLASH_OPTCR 0x18
#define FLASH_OPTCUR 0x1C #define FLASH_OPTSR_CUR 0x1C
#define FLASH_OPTPRG 0x20 #define FLASH_OPTSR_PRG 0x20
#define FLASH_OPTCCR 0x24 #define FLASH_OPTCCR 0x24
#define FLASH_WPSNCUR 0x38 #define FLASH_WPSN_CUR 0x38
#define FLASH_WPSNPRG 0x3C #define FLASH_WPSN_PRG 0x3C
/* FLASH_CR register bits */ /* FLASH_CR register bits */
#define FLASH_LOCK (1 << 0) #define FLASH_LOCK (1 << 0)
#define FLASH_PG (1 << 1) #define FLASH_PG (1 << 1)
#define FLASH_SER (1 << 2) #define FLASH_SER (1 << 2)
#define FLASH_BER_CMD (1 << 3) #define FLASH_BER (1 << 3)
#define FLASH_PSIZE_8 (0 << 4) #define FLASH_PSIZE_8 (0 << 4)
#define FLASH_PSIZE_16 (1 << 4) #define FLASH_PSIZE_16 (1 << 4)
#define FLASH_PSIZE_32 (2 << 4) #define FLASH_PSIZE_32 (2 << 4)
@ -314,7 +314,7 @@ static int stm32x_read_options(struct flash_bank *bank)
stm32x_info = bank->driver_priv; stm32x_info = bank->driver_priv;
/* read current option bytes */ /* read current option bytes */
int retval = target_read_u32(target, FLASH_REG_BASE_B0 + FLASH_OPTCUR, &optiondata); int retval = target_read_u32(target, FLASH_REG_BASE_B0 + FLASH_OPTSR_CUR, &optiondata);
if (retval != ERROR_OK) if (retval != ERROR_OK)
return retval; return retval;
@ -328,13 +328,13 @@ static int stm32x_read_options(struct flash_bank *bank)
LOG_INFO("Device Security Bit Set"); LOG_INFO("Device Security Bit Set");
/* read current WPSN option bytes */ /* read current WPSN option bytes */
retval = target_read_u32(target, FLASH_REG_BASE_B0 + FLASH_WPSNCUR, &optiondata); retval = target_read_u32(target, FLASH_REG_BASE_B0 + FLASH_WPSN_CUR, &optiondata);
if (retval != ERROR_OK) if (retval != ERROR_OK)
return retval; return retval;
stm32x_info->option_bytes.protection = optiondata & 0xff; stm32x_info->option_bytes.protection = optiondata & 0xff;
/* read current WPSN2 option bytes */ /* read current WPSN2 option bytes */
retval = target_read_u32(target, FLASH_REG_BASE_B1 + FLASH_WPSNCUR, &optiondata); retval = target_read_u32(target, FLASH_REG_BASE_B1 + FLASH_WPSN_CUR, &optiondata);
if (retval != ERROR_OK) if (retval != ERROR_OK)
return retval; return retval;
stm32x_info->option_bytes.protection2 = optiondata & 0xff; stm32x_info->option_bytes.protection2 = optiondata & 0xff;
@ -361,19 +361,19 @@ static int stm32x_write_options(struct flash_bank *bank)
optiondata |= (stm32x_info->option_bytes.user3_options & 0xa3) << 24; optiondata |= (stm32x_info->option_bytes.user3_options & 0xa3) << 24;
/* program options */ /* program options */
retval = target_write_u32(target, FLASH_REG_BASE_B0 + FLASH_OPTPRG, optiondata); retval = target_write_u32(target, FLASH_REG_BASE_B0 + FLASH_OPTSR_PRG, optiondata);
if (retval != ERROR_OK) if (retval != ERROR_OK)
return retval; return retval;
optiondata = stm32x_info->option_bytes.protection & 0xff; optiondata = stm32x_info->option_bytes.protection & 0xff;
/* Program protection WPSNPRG */ /* Program protection WPSNPRG */
retval = target_write_u32(target, FLASH_REG_BASE_B0 + FLASH_WPSNPRG, optiondata); retval = target_write_u32(target, FLASH_REG_BASE_B0 + FLASH_WPSN_PRG, optiondata);
if (retval != ERROR_OK) if (retval != ERROR_OK)
return retval; return retval;
optiondata = stm32x_info->option_bytes.protection2 & 0xff; optiondata = stm32x_info->option_bytes.protection2 & 0xff;
/* Program protection WPSNPRG2 */ /* Program protection WPSNPRG2 */
retval = target_write_u32(target, FLASH_REG_BASE_B1 + FLASH_WPSNPRG, optiondata); retval = target_write_u32(target, FLASH_REG_BASE_B1 + FLASH_WPSN_PRG, optiondata);
if (retval != ERROR_OK) if (retval != ERROR_OK)
return retval; return retval;
@ -1030,12 +1030,12 @@ static int stm32x_mass_erase(struct flash_bank *bank)
return retval; return retval;
/* mass erase flash memory bank */ /* mass erase flash memory bank */
retval = target_write_u32(target, stm32x_get_flash_reg(bank, FLASH_CR), FLASH_BER_CMD | FLASH_PSIZE_64); retval = target_write_u32(target, stm32x_get_flash_reg(bank, FLASH_CR), FLASH_BER | FLASH_PSIZE_64);
if (retval != ERROR_OK) if (retval != ERROR_OK)
return retval; return retval;
retval = target_write_u32(target, stm32x_get_flash_reg(bank, FLASH_CR), retval = target_write_u32(target, stm32x_get_flash_reg(bank, FLASH_CR),
FLASH_BER_CMD | FLASH_PSIZE_64 | FLASH_START); FLASH_BER | FLASH_PSIZE_64 | FLASH_START);
if (retval != ERROR_OK) if (retval != ERROR_OK)
return retval; return retval;