bcm2835gpio: Add SWD support, Raspberry Pi 2 support.
Added support for SWD transport similar to sysfsgpio driver. Added configurable peripheral base address to support Raspberry Pi 2. Change-Id: If76d45fbe74ce49f1f22af72e5f246e973237e04 Signed-off-by: Christoph Pittracher <pitt@segfault.info> Reviewed-on: http://openocd.zylin.com/2802 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>__archive__
Christoph Pittracher
Spencer Oliver
parent
33d220d10a
commit
e3f8db54e6
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@ -30,10 +30,10 @@
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#include <sys/mman.h>
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#define BCM2835_PERI_BASE 0x20000000
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#define BCM2835_GPIO_BASE (BCM2835_PERI_BASE + 0x200000) /* GPIO controller */
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uint32_t bcm2835_peri_base = 0x20000000;
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#define BCM2835_GPIO_BASE (bcm2835_peri_base + 0x200000) /* GPIO controller */
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#define BCM2835_PADS_GPIO_0_27 (BCM2835_PERI_BASE + 0x100000)
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#define BCM2835_PADS_GPIO_0_27 (bcm2835_peri_base + 0x100000)
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#define BCM2835_PADS_GPIO_0_27_OFFSET (0x2c / 4)
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/* GPIO setup macros */
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@ -55,6 +55,9 @@ static int bcm2835gpio_read(void);
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static void bcm2835gpio_write(int tck, int tms, int tdi);
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static void bcm2835gpio_reset(int trst, int srst);
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static int bcm2835_swdio_read(void);
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static void bcm2835_swdio_drive(bool is_output);
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static int bcm2835gpio_init(void);
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static int bcm2835gpio_quit(void);
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@ -62,6 +65,8 @@ static struct bitbang_interface bcm2835gpio_bitbang = {
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.read = bcm2835gpio_read,
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.write = bcm2835gpio_write,
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.reset = bcm2835gpio_reset,
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.swdio_read = bcm2835_swdio_read,
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.swdio_drive = bcm2835_swdio_drive,
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.blink = NULL
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};
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@ -78,6 +83,10 @@ static int trst_gpio = -1;
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static int trst_gpio_mode;
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static int srst_gpio = -1;
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static int srst_gpio_mode;
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static int swclk_gpio = -1;
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static int swclk_gpio_mode;
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static int swdio_gpio = -1;
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static int swdio_gpio_mode;
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/* Transition delay coefficients */
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static int speed_coeff = 113714;
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@ -101,6 +110,18 @@ static void bcm2835gpio_write(int tck, int tms, int tdi)
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asm volatile ("");
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}
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static void bcm2835gpio_swd_write(int tck, int tms, int tdi)
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{
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uint32_t set = tck<<swclk_gpio | tdi<<swdio_gpio;
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uint32_t clear = !tck<<swclk_gpio | !tdi<<swdio_gpio;
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GPIO_SET = set;
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GPIO_CLR = clear;
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for (unsigned int i = 0; i < jtag_delay; i++)
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asm volatile ("");
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}
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/* (1) assert or (0) deassert reset lines */
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static void bcm2835gpio_reset(int trst, int srst)
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{
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@ -121,6 +142,19 @@ static void bcm2835gpio_reset(int trst, int srst)
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GPIO_CLR = clear;
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}
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static void bcm2835_swdio_drive(bool is_output)
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{
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if (is_output)
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OUT_GPIO(swdio_gpio);
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else
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INP_GPIO(swdio_gpio);
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}
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static int bcm2835_swdio_read(void)
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{
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return !!(GPIO_LEV & 1 << swdio_gpio);
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}
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static int bcm2835gpio_khz(int khz, int *jtag_speed)
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{
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if (!khz) {
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@ -222,6 +256,40 @@ COMMAND_HANDLER(bcm2835gpio_handle_jtag_gpionum_trst)
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return ERROR_OK;
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}
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COMMAND_HANDLER(bcm2835gpio_handle_swd_gpionums)
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{
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if (CMD_ARGC == 2) {
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COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], swclk_gpio);
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COMMAND_PARSE_NUMBER(int, CMD_ARGV[1], swdio_gpio);
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} else if (CMD_ARGC != 0) {
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return ERROR_COMMAND_SYNTAX_ERROR;
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}
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command_print(CMD_CTX,
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"BCM2835 GPIO nums: swclk = %d, swdio = %d",
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swclk_gpio, swdio_gpio);
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return ERROR_OK;
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}
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COMMAND_HANDLER(bcm2835gpio_handle_swd_gpionum_swclk)
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{
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if (CMD_ARGC == 1)
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COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], swclk_gpio);
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command_print(CMD_CTX, "BCM2835 num: swclk = %d", swclk_gpio);
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return ERROR_OK;
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}
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COMMAND_HANDLER(bcm2835gpio_handle_swd_gpionum_swdio)
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{
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if (CMD_ARGC == 1)
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COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], swdio_gpio);
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command_print(CMD_CTX, "BCM2835 num: swdio = %d", swdio_gpio);
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return ERROR_OK;
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}
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COMMAND_HANDLER(bcm2835gpio_handle_speed_coeffs)
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{
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if (CMD_ARGC == 2) {
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@ -231,6 +299,13 @@ COMMAND_HANDLER(bcm2835gpio_handle_speed_coeffs)
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return ERROR_OK;
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}
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COMMAND_HANDLER(bcm2835gpio_handle_peripheral_base)
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{
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if (CMD_ARGC == 1)
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COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], bcm2835_peri_base);
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return ERROR_OK;
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}
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static const struct command_registration bcm2835gpio_command_handlers[] = {
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{
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.name = "bcm2835gpio_jtag_nums",
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@ -263,6 +338,25 @@ static const struct command_registration bcm2835gpio_command_handlers[] = {
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.mode = COMMAND_CONFIG,
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.help = "gpio number for tdi.",
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},
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{
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.name = "bcm2835gpio_swd_nums",
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.handler = &bcm2835gpio_handle_swd_gpionums,
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.mode = COMMAND_CONFIG,
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.help = "gpio numbers for swclk, swdio. (in that order)",
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.usage = "(swclk swdio)* ",
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},
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{
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.name = "bcm2835gpio_swclk_num",
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.handler = &bcm2835gpio_handle_swd_gpionum_swclk,
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.mode = COMMAND_CONFIG,
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.help = "gpio number for swclk.",
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},
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{
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.name = "bcm2835gpio_swdio_num",
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.handler = &bcm2835gpio_handle_swd_gpionum_swdio,
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.mode = COMMAND_CONFIG,
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.help = "gpio number for swdio.",
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},
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{
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.name = "bcm2835gpio_srst_num",
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.handler = &bcm2835gpio_handle_jtag_gpionum_srst,
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@ -281,14 +375,24 @@ static const struct command_registration bcm2835gpio_command_handlers[] = {
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.mode = COMMAND_CONFIG,
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.help = "SPEED_COEFF and SPEED_OFFSET for delay calculations.",
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},
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{
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.name = "bcm2835gpio_peripheral_base",
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.handler = &bcm2835gpio_handle_peripheral_base,
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.mode = COMMAND_CONFIG,
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.help = "peripheral base to access GPIOs (RPi1 0x20000000, RPi2 0x3F000000).",
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},
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COMMAND_REGISTRATION_DONE
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};
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static const char * const bcm2835_transports[] = { "jtag", "swd", NULL };
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struct jtag_interface bcm2835gpio_interface = {
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.name = "bcm2835gpio",
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.supported = DEBUG_CAP_TMS_SEQ,
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.execute_queue = bitbang_execute_queue,
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.transports = jtag_only,
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.transports = bcm2835_transports,
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.swd = &bitbang_swd,
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.speed = bcm2835gpio_speed,
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.khz = bcm2835gpio_khz,
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.speed_div = bcm2835gpio_speed_div,
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@ -297,15 +401,49 @@ struct jtag_interface bcm2835gpio_interface = {
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.quit = bcm2835gpio_quit,
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};
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static bool bcm2835gpio_jtag_mode_possible(void)
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{
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if (!is_gpio_valid(tck_gpio))
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return 0;
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if (!is_gpio_valid(tms_gpio))
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return 0;
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if (!is_gpio_valid(tdi_gpio))
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return 0;
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if (!is_gpio_valid(tdo_gpio))
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return 0;
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return 1;
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}
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static bool bcm2835gpio_swd_mode_possible(void)
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{
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if (!is_gpio_valid(swclk_gpio))
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return 0;
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if (!is_gpio_valid(swdio_gpio))
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return 0;
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return 1;
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}
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static int bcm2835gpio_init(void)
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{
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bitbang_interface = &bcm2835gpio_bitbang;
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if (!is_gpio_valid(tdo_gpio) || !is_gpio_valid(tdi_gpio) ||
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!is_gpio_valid(tck_gpio) || !is_gpio_valid(tms_gpio) ||
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(trst_gpio != -1 && !is_gpio_valid(trst_gpio)) ||
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(srst_gpio != -1 && !is_gpio_valid(srst_gpio)))
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LOG_INFO("BCM2835 GPIO JTAG/SWD bitbang driver");
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if (bcm2835gpio_jtag_mode_possible()) {
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if (bcm2835gpio_swd_mode_possible())
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LOG_INFO("JTAG and SWD modes enabled");
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else
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LOG_INFO("JTAG only mode enabled (specify swclk and swdio gpio to add SWD mode)");
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if (!is_gpio_valid(trst_gpio) && !is_gpio_valid(srst_gpio)) {
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LOG_ERROR("Require at least one of trst or srst gpios to be specified");
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return ERROR_JTAG_INIT_FAILED;
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}
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} else if (bcm2835gpio_swd_mode_possible()) {
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LOG_INFO("SWD only mode enabled (specify tck, tms, tdi and tdo gpios to add JTAG mode)");
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} else {
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LOG_ERROR("Require tck, tms, tdi and tdo gpios for JTAG mode and/or swclk and swdio gpio for SWD mode");
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return ERROR_JTAG_INIT_FAILED;
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}
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dev_mem_fd = open("/dev/mem", O_RDWR | O_SYNC);
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if (dev_mem_fd < 0) {
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@ -339,18 +477,22 @@ static int bcm2835gpio_init(void)
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tdi_gpio_mode = MODE_GPIO(tdi_gpio);
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tck_gpio_mode = MODE_GPIO(tck_gpio);
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tms_gpio_mode = MODE_GPIO(tms_gpio);
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swclk_gpio_mode = MODE_GPIO(swclk_gpio);
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swdio_gpio_mode = MODE_GPIO(swdio_gpio);
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/*
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* Configure TDO as an input, and TDI, TCK, TMS, TRST, SRST
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* as outputs. Drive TDI and TCK low, and TMS/TRST/SRST high.
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*/
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INP_GPIO(tdo_gpio);
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GPIO_CLR = 1<<tdi_gpio | 1<<tck_gpio;
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GPIO_CLR = 1<<tdi_gpio | 1<<tck_gpio | 1<<swdio_gpio | 1<<swclk_gpio;
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GPIO_SET = 1<<tms_gpio;
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OUT_GPIO(tdi_gpio);
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OUT_GPIO(tck_gpio);
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OUT_GPIO(tms_gpio);
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OUT_GPIO(swclk_gpio);
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OUT_GPIO(swdio_gpio);
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if (trst_gpio != -1) {
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trst_gpio_mode = MODE_GPIO(trst_gpio);
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GPIO_SET = 1 << trst_gpio;
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@ -366,6 +508,11 @@ static int bcm2835gpio_init(void)
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"tdo %d trst %d srst %d", tck_gpio_mode, tms_gpio_mode,
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tdi_gpio_mode, tdo_gpio_mode, trst_gpio_mode, srst_gpio_mode);
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if (swd_mode) {
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bcm2835gpio_bitbang.write = bcm2835gpio_swd_write;
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bitbang_switch_to_swd();
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}
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return ERROR_OK;
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}
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@ -375,6 +522,8 @@ static int bcm2835gpio_quit(void)
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SET_MODE_GPIO(tdi_gpio, tdi_gpio_mode);
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SET_MODE_GPIO(tck_gpio, tck_gpio_mode);
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SET_MODE_GPIO(tms_gpio, tms_gpio_mode);
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SET_MODE_GPIO(swclk_gpio, swclk_gpio_mode);
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SET_MODE_GPIO(swdio_gpio, swdio_gpio_mode);
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if (trst_gpio != -1)
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SET_MODE_GPIO(trst_gpio, trst_gpio_mode);
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if (srst_gpio != -1)
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@ -10,6 +10,8 @@
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interface bcm2835gpio
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bcm2835gpio_peripheral_base 0x20000000
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# Transition delay calculation: SPEED_COEFF/khz - SPEED_OFFSET
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# These depend on system clock, calibrated for stock 700MHz
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# bcm2835gpio_speed SPEED_COEFF SPEED_OFFSET
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@ -0,0 +1,42 @@
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#
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# Config for using Raspberry Pi's expansion header
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#
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# This is best used with a fast enough buffer but also
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# is suitable for direct connection if the target voltage
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# matches RPi's 3.3V and the cable is short enough.
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#
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# Do not forget the GND connection, pin 6 of the expansion header.
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#
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interface bcm2835gpio
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bcm2835gpio_peripheral_base 0x3F000000
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# Transition delay calculation: SPEED_COEFF/khz - SPEED_OFFSET
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# These depend on system clock, calibrated for stock 700MHz
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# bcm2835gpio_speed SPEED_COEFF SPEED_OFFSET
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bcm2835gpio_speed_coeffs 146203 36
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# Each of the JTAG lines need a gpio number set: tck tms tdi tdo
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# Header pin numbers: 23 22 19 21
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# bcm2835gpio_jtag_nums 11 25 10 9
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# or if you have both connected,
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# reset_config trst_and_srst srst_push_pull
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# Each of the SWD lines need a gpio number set: swclk swdio
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# Header pin numbers: 22 18
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bcm2835gpio_swd_nums 25 24
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# If you define trst or srst, use appropriate reset_config
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# Header pin numbers: TRST - 26, SRST - 18
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# bcm2835gpio_trst_num 7
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# reset_config trst_only
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bcm2835gpio_srst_num 18
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reset_config srst_only srst_push_pull
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# or if you have both connected,
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# reset_config trst_and_srst srst_push_pull
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