All LPC2xxx chips are little endian and that cannot be changed - update config scripts

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
__archive__
Freddie Chopin 2010-05-21 18:02:58 +02:00 committed by Spencer Oliver
parent 9c3b4cfc5d
commit e2c9518eda
7 changed files with 8 additions and 53 deletions

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@ -6,12 +6,6 @@ if { [info exists CHIPNAME] } {
set _CHIPNAME lpc2103 set _CHIPNAME lpc2103
} }
if { [info exists ENDIAN] } {
set _ENDIAN $ENDIAN
} else {
set _ENDIAN little
}
if { [info exists CPUTAPID ] } { if { [info exists CPUTAPID ] } {
set _CPUTAPID $CPUTAPID set _CPUTAPID $CPUTAPID
} else { } else {
@ -28,7 +22,7 @@ jtag_ntrst_delay 100
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
set _TARGETNAME $_CHIPNAME.cpu set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4 target create $_TARGETNAME arm7tdmi -chain-position $_TARGETNAME -variant arm7tdmi-s_r4
# 8kB of internal SRAM # 8kB of internal SRAM
$_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x2000 -work-area-backup 0 $_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x2000 -work-area-backup 0

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@ -1,4 +1,4 @@
#LPC-2124 CPU # NXP LPC2124
if { [info exists CHIPNAME] } { if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME set _CHIPNAME $CHIPNAME
@ -6,20 +6,12 @@ if { [info exists CHIPNAME] } {
set _CHIPNAME lpc2124 set _CHIPNAME lpc2124
} }
if { [info exists ENDIAN] } {
set _ENDIAN $ENDIAN
} else {
set _ENDIAN little
}
if { [info exists CPUTAPID ] } { if { [info exists CPUTAPID ] } {
set _CPUTAPID $CPUTAPID set _CPUTAPID $CPUTAPID
} else { } else {
# force an error till we get a good number
set _CPUTAPID 0x4f1f0f0f set _CPUTAPID 0x4f1f0f0f
} }
#use combined on interfaces or targets that can't set TRST/SRST separately #use combined on interfaces or targets that can't set TRST/SRST separately
reset_config trst_and_srst srst_pulls_trst reset_config trst_and_srst srst_pulls_trst
@ -33,11 +25,10 @@ adapter_khz 1000
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
set _TARGETNAME $_CHIPNAME.cpu set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4 target create $_TARGETNAME arm7tdmi -chain-position $_TARGETNAME -variant arm7tdmi-s_r4
$_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 0 $_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 0
# flash bank <name> lpc2000 <base> <size> 0 0 <target#> <variant> <clock> [calc checksum] # flash bank <name> lpc2000 <base> <size> 0 0 <target#> <variant> <clock> [calc checksum]
set _FLASHNAME $_CHIPNAME.flash set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME lpc2000 0x0 0x40000 0 0 $_TARGETNAME lpc2000_v1 14745 calc_checksum flash bank $_FLASHNAME lpc2000 0x0 0x40000 0 0 $_TARGETNAME lpc2000_v1 14745 calc_checksum

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@ -6,12 +6,6 @@ if { [info exists CHIPNAME] } {
set _CHIPNAME lpc2129 set _CHIPNAME lpc2129
} }
if { [info exists ENDIAN] } {
set _ENDIAN $ENDIAN
} else {
set _ENDIAN little
}
if { [info exists CPUTAPID ] } { if { [info exists CPUTAPID ] } {
set _CPUTAPID $CPUTAPID set _CPUTAPID $CPUTAPID
} else { } else {
@ -29,7 +23,7 @@ jtag_ntrst_delay 100
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
set _TARGETNAME $_CHIPNAME.cpu set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4 target create $_TARGETNAME arm7tdmi -chain-position $_TARGETNAME -variant arm7tdmi-s_r4
$_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 0 $_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 0

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@ -9,12 +9,6 @@ if { [info exists CHIPNAME] } {
set _CHIPNAME lpc2148 set _CHIPNAME lpc2148
} }
if { [info exists ENDIAN] } {
set _ENDIAN $ENDIAN
} else {
set _ENDIAN little
}
if { [info exists CPUTAPID ] } { if { [info exists CPUTAPID ] } {
set _CPUTAPID $CPUTAPID set _CPUTAPID $CPUTAPID
} else { } else {
@ -33,7 +27,7 @@ reset_config trst_and_srst srst_pulls_trst
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
set _TARGETNAME $_CHIPNAME.cpu set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4 target create $_TARGETNAME arm7tdmi -chain-position $_TARGETNAME -variant arm7tdmi-s_r4
$_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 0 $_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 0

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@ -4,12 +4,6 @@ if { [info exists CHIPNAME] } {
set _CHIPNAME lpc2294 set _CHIPNAME lpc2294
} }
if { [info exists ENDIAN] } {
set _ENDIAN $ENDIAN
} else {
set _ENDIAN little
}
if { [info exists CPUTAPID ] } { if { [info exists CPUTAPID ] } {
set _CPUTAPID $CPUTAPID set _CPUTAPID $CPUTAPID
} else { } else {
@ -27,7 +21,7 @@ reset_config trst_and_srst srst_pulls_trst
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
set _TARGETNAME $_CHIPNAME.cpu set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4 target create $_TARGETNAME arm7tdmi -chain-position $_TARGETNAME -variant arm7tdmi-s_r4
$_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 0 $_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 0
#flash configuration #flash configuration

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@ -6,12 +6,6 @@ if { [info exists CHIPNAME] } {
set _CHIPNAME lpc2378 set _CHIPNAME lpc2378
} }
if { [info exists ENDIAN] } {
set _ENDIAN $ENDIAN
} else {
set _ENDIAN little
}
if { [info exists CPUTAPID ] } { if { [info exists CPUTAPID ] } {
set _CPUTAPID $CPUTAPID set _CPUTAPID $CPUTAPID
} else { } else {
@ -28,7 +22,7 @@ reset_config trst_and_srst srst_pulls_trst
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
set _TARGETNAME $_CHIPNAME.cpu set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4 target create $_TARGETNAME arm7tdmi -chain-position $_TARGETNAME -variant arm7tdmi-s_r4
# LPC2378 has 32kB of SRAM on its main system bus (so-called Local On-Chip SRAM) # LPC2378 has 32kB of SRAM on its main system bus (so-called Local On-Chip SRAM)
$_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x8000 -work-area-backup 0 $_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x8000 -work-area-backup 0

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@ -6,12 +6,6 @@ if { [info exists CHIPNAME] } {
set _CHIPNAME lpc2478 set _CHIPNAME lpc2478
} }
if { [info exists ENDIAN] } {
set _ENDIAN $ENDIAN
} else {
set _ENDIAN little
}
if { [info exists CPUTAPID ] } { if { [info exists CPUTAPID ] } {
set _CPUTAPID $CPUTAPID set _CPUTAPID $CPUTAPID
} else { } else {
@ -28,7 +22,7 @@ reset_config trst_and_srst srst_pulls_trst
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
set _TARGETNAME $_CHIPNAME.cpu set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4 target create $_TARGETNAME arm7tdmi -chain-position $_TARGETNAME -variant arm7tdmi-s_r4
# LPC2478 has 64kB of SRAM on its main system bus (so-called Local On-Chip SRAM) # LPC2478 has 64kB of SRAM on its main system bus (so-called Local On-Chip SRAM)
$_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x10000 -work-area-backup 0 $_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x10000 -work-area-backup 0