ETM: start cleaning up ETM_CTRL bit handling
Provide better comments for the ETM_CTRL bits; use the correct bit for half/full clock mode; and define a few more of the bits available from the earliest ETM versions. The new bit defintions use ETM_CTRL_* names to match their register (instead of ETM_PORT_* or ETMV1_*). For clarity, and better matching to docs, they are defined with bitshifting not pre-computed masks. Stop abusing typdefs for ETM_CTRL values; such values are not limited to the enumerated set of individual bit values. Rename etm->portmode to etm->control ... and start morphing it into a single generic shadow of ETM_CTRL. Eventually etm->tracemode should vanish, so we can just write etm->control to ETM_CTRL. Restore an "if" that somehow got dropped. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>__archive__
David Brownell
parent
9abad965ab
commit
e25819645e
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@ -579,9 +579,9 @@ static int etb_read_trace(struct etm_context *etm_ctx)
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free(etm_ctx->trace_data);
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}
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if ((etm_ctx->portmode & ETM_PORT_WIDTH_MASK) == ETM_PORT_4BIT)
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if ((etm_ctx->control & ETM_PORT_WIDTH_MASK) == ETM_PORT_4BIT)
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etm_ctx->trace_depth = num_frames * 3;
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else if ((etm_ctx->portmode & ETM_PORT_WIDTH_MASK) == ETM_PORT_8BIT)
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else if ((etm_ctx->control & ETM_PORT_WIDTH_MASK) == ETM_PORT_8BIT)
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etm_ctx->trace_depth = num_frames * 2;
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else
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etm_ctx->trace_depth = num_frames;
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@ -590,7 +590,7 @@ static int etb_read_trace(struct etm_context *etm_ctx)
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for (i = 0, j = 0; i < num_frames; i++)
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{
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if ((etm_ctx->portmode & ETM_PORT_WIDTH_MASK) == ETM_PORT_4BIT)
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if ((etm_ctx->control & ETM_PORT_WIDTH_MASK) == ETM_PORT_4BIT)
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{
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/* trace word j */
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etm_ctx->trace_data[j].pipestat = trace_data[i] & 0x7;
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@ -636,7 +636,7 @@ static int etb_read_trace(struct etm_context *etm_ctx)
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j += 3;
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}
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else if ((etm_ctx->portmode & ETM_PORT_WIDTH_MASK) == ETM_PORT_8BIT)
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else if ((etm_ctx->control & ETM_PORT_WIDTH_MASK) == ETM_PORT_8BIT)
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{
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/* trace word j */
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etm_ctx->trace_data[j].pipestat = trace_data[i] & 0x7;
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@ -699,9 +699,9 @@ static int etb_start_capture(struct etm_context *etm_ctx)
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uint32_t etb_ctrl_value = 0x1;
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uint32_t trigger_count;
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if ((etm_ctx->portmode & ETM_PORT_MODE_MASK) == ETM_PORT_DEMUXED)
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if ((etm_ctx->control & ETM_PORT_MODE_MASK) == ETM_PORT_DEMUXED)
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{
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if ((etm_ctx->portmode & ETM_PORT_WIDTH_MASK) != ETM_PORT_8BIT)
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if ((etm_ctx->control & ETM_PORT_WIDTH_MASK) != ETM_PORT_8BIT)
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{
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LOG_ERROR("ETB can't run in demultiplexed mode with a 4 or 16 bit port");
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return ERROR_ETM_PORTMODE_NOT_SUPPORTED;
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@ -709,7 +709,7 @@ static int etb_start_capture(struct etm_context *etm_ctx)
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etb_ctrl_value |= 0x2;
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}
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if ((etm_ctx->portmode & ETM_PORT_MODE_MASK) == ETM_PORT_MUXED) {
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if ((etm_ctx->control & ETM_PORT_MODE_MASK) == ETM_PORT_MUXED) {
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LOG_ERROR("ETB: can't run in multiplexed mode");
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return ERROR_ETM_PORTMODE_NOT_SUPPORTED;
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}
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@ -435,10 +435,10 @@ int etm_setup(struct target *target)
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/* initialize some ETM control register settings */
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etm_get_reg(etm_ctrl_reg);
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etm_ctrl_value = buf_get_u32(etm_ctrl_reg->value, 0, etm_ctrl_reg->size);
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etm_ctrl_value = buf_get_u32(etm_ctrl_reg->value, 0, 32);
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/* clear the ETM powerdown bit (0) */
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etm_ctrl_value &= ~0x1;
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etm_ctrl_value &= ~ETM_CTRL_POWERDOWN;
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/* configure port width (21,6:4), mode (13,17:16) and
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* for older modules clocking (13)
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@ -447,9 +447,9 @@ int etm_setup(struct target *target)
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& ~ETM_PORT_WIDTH_MASK
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& ~ETM_PORT_MODE_MASK
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& ~ETM_PORT_CLOCK_MASK)
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| etm_ctx->portmode;
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| etm_ctx->control;
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buf_set_u32(etm_ctrl_reg->value, 0, etm_ctrl_reg->size, etm_ctrl_value);
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buf_set_u32(etm_ctrl_reg->value, 0, 32, etm_ctrl_value);
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etm_store_reg(etm_ctrl_reg);
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if ((retval = jtag_execute_queue()) != ERROR_OK)
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@ -727,7 +727,8 @@ static int etmv1_next_packet(struct etm_context *ctx, uint8_t *packet, int apo)
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continue;
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}
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if ((ctx->portmode & ETM_PORT_WIDTH_MASK) == ETM_PORT_16BIT)
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/* FIXME there are more port widths than these... */
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if ((ctx->control & ETM_PORT_WIDTH_MASK) == ETM_PORT_16BIT)
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{
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if (ctx->data_half == 0)
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{
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@ -741,7 +742,7 @@ static int etmv1_next_packet(struct etm_context *ctx, uint8_t *packet, int apo)
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ctx->data_index++;
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}
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}
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else if ((ctx->portmode & ETM_PORT_WIDTH_MASK) == ETM_PORT_8BIT)
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else if ((ctx->control & ETM_PORT_WIDTH_MASK) == ETM_PORT_8BIT)
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{
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*packet = ctx->trace_data[ctx->data_index].packet & 0xff;
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ctx->data_index++;
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@ -1171,9 +1172,9 @@ static int etmv1_analyze_trace(struct etm_context *ctx, struct command_context *
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}
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static COMMAND_HELPER(handle_etm_tracemode_command_update,
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etmv1_tracemode_t *mode)
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uint32_t *mode)
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{
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etmv1_tracemode_t tracemode;
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uint32_t tracemode;
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/* what parts of data access are traced? */
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if (strcmp(CMD_ARGV[0], "none") == 0)
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@ -1218,6 +1219,7 @@ static COMMAND_HELPER(handle_etm_tracemode_command_update,
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bool etmv1_branch_output;
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COMMAND_PARSE_ENABLE(CMD_ARGV[3], etmv1_branch_output);
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if (etmv1_branch_output)
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tracemode |= ETMV1_BRANCH_OUTPUT;
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/* IGNORED:
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@ -1247,7 +1249,7 @@ COMMAND_HANDLER(handle_etm_tracemode_command)
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return ERROR_FAIL;
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}
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etmv1_tracemode_t tracemode = etm->tracemode;
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uint32_t tracemode = etm->tracemode;
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switch (CMD_ARGC)
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{
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@ -1356,7 +1358,7 @@ COMMAND_HANDLER(handle_etm_config_command)
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{
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struct target *target;
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struct arm *arm;
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etm_portmode_t portmode = 0x0;
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uint32_t portmode = 0x0;
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struct etm_context *etm_ctx;
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int i;
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@ -1495,7 +1497,7 @@ COMMAND_HANDLER(handle_etm_config_command)
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etm_ctx->target = target;
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etm_ctx->trace_data = NULL;
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etm_ctx->portmode = portmode;
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etm_ctx->control = portmode;
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etm_ctx->core_state = ARM_STATE_ARM;
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arm->etm = etm_ctx;
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@ -1822,7 +1824,7 @@ COMMAND_HANDLER(handle_etm_dump_command)
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}
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fileio_write_u32(&file, etm_ctx->capture_status);
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fileio_write_u32(&file, etm_ctx->portmode);
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fileio_write_u32(&file, etm_ctx->control);
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fileio_write_u32(&file, etm_ctx->tracemode);
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fileio_write_u32(&file, etm_ctx->trace_depth);
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@ -1894,7 +1896,7 @@ COMMAND_HANDLER(handle_etm_load_command)
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{
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uint32_t tmp;
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fileio_read_u32(&file, &tmp); etm_ctx->capture_status = tmp;
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fileio_read_u32(&file, &tmp); etm_ctx->portmode = tmp;
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fileio_read_u32(&file, &tmp); etm_ctx->control = tmp;
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fileio_read_u32(&file, &tmp); etm_ctx->tracemode = tmp;
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fileio_read_u32(&file, &etm_ctx->trace_depth);
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}
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@ -78,9 +78,20 @@ struct etm_reg
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struct arm_jtag *jtag_info;
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};
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typedef enum
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/* Subset of ETM_CTRL bit assignments. Many of these
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* control the configuration of trace output, which
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* hooks up either to ETB or to an external device.
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*
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* NOTE that these have evolved since the ~v1.3 defns ...
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*/
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enum
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{
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/* Port width */
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ETM_CTRL_POWERDOWN = (1 << 0),
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ETM_CTRL_MONITOR_CPRT = (1 << 1),
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// bits 3:2 == trace type (ETMV1_TRACE_* << 2)
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/* Port width (bits 21 and 6:4) */
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ETM_PORT_4BIT = 0x00,
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ETM_PORT_8BIT = 0x10,
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ETM_PORT_16BIT = 0x20,
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@ -91,18 +102,32 @@ typedef enum
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ETM_PORT_1BIT = 0x00 | (1 << 21),
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ETM_PORT_2BIT = 0x10 | (1 << 21),
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ETM_PORT_WIDTH_MASK = 0x70 | (1 << 21),
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/* Port modes */
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ETM_PORT_NORMAL = 0x00000,
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ETM_PORT_MUXED = 0x10000,
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ETM_PORT_DEMUXED = 0x20000,
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ETM_PORT_MODE_MASK = 0x30000,
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/* Clocking modes */
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ETM_PORT_FULL_CLOCK = 0x0000,
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ETM_PORT_HALF_CLOCK = 0x1000,
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ETM_PORT_CLOCK_MASK = 0x1000,
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} etm_portmode_t;
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typedef enum
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ETM_CTRL_FIFOFULL_STALL = (1 << 7),
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ETM_CTRL_BRANCH_OUTPUT = (1 << 8),
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ETM_CTRL_DBGRQ = (1 << 9),
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ETM_CTRL_ETM_PROG = (1 << 10),
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ETM_CTRL_ETMEN = (1 << 11),
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ETM_CTRL_CYCLE_ACCURATE = (1 << 12),
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/* Clocking modes -- up to v2.1, bit 13 */
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ETM_PORT_FULL_CLOCK = (0 << 13),
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ETM_PORT_HALF_CLOCK = (1 << 13),
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ETM_PORT_CLOCK_MASK = (1 << 13),
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// bits 15:14 == context ID size used in tracing
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// ETMV1_CONTEXTID_* << 8
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/* Port modes -- bits 17:16, tied to clocking mode */
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ETM_PORT_NORMAL = (0 << 16),
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ETM_PORT_MUXED = (1 << 16),
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ETM_PORT_DEMUXED = (2 << 16),
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ETM_PORT_MODE_MASK = (3 << 16),
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// bits 31:18 defined in v3.0 and later (e.g. ARM11+)
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};
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enum
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{
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/* Data trace */
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ETMV1_TRACE_NONE = 0x00,
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@ -118,7 +143,7 @@ typedef enum
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/* Misc */
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ETMV1_CYCLE_ACCURATE = 0x100,
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ETMV1_BRANCH_OUTPUT = 0x200
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} etmv1_tracemode_t;
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};
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/* forward-declare ETM context */
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struct etm_context;
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@ -161,8 +186,8 @@ struct etm_context
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trace_status_t capture_status; /* current state of capture run */
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struct etmv1_trace_data *trace_data; /* trace data */
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uint32_t trace_depth; /* number of cycles to be analyzed, 0 if no data available */
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etm_portmode_t portmode; /* normal, multiplexed or demultiplexed */
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etmv1_tracemode_t tracemode; /* type of info trace contains */
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uint32_t control; /* shadow of ETM_CTRL */
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uint32_t tracemode; /* type of info trace contains */
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int /*arm_state*/ core_state; /* current core state */
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struct image *image; /* source for target opcodes */
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uint32_t pipe_index; /* current trace cycle */
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