Merge pull request #65 from riscv/print64
Fix print statements to work with 64-bit addressesgitignore-build
commit
e17f8f03b5
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@ -1212,7 +1212,8 @@ static int read_memory(struct target *target, target_addr_t address,
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{
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RISCV013_INFO(info);
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LOG_DEBUG("reading %d words of %d bytes from 0x%08lx", count, size, (long)address);
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LOG_DEBUG("reading %d words of %d bytes from 0x%" TARGET_PRIxADDR, count,
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size, address);
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select_dmi(target);
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riscv_set_current_hartid(target, 0);
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@ -1274,7 +1275,7 @@ static int read_memory(struct target *target, target_addr_t address,
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}
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uint32_t value = riscv_program_read_ram(&program, r_data);
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LOG_DEBUG("M[0x%08lx] reads 0x%08lx", (long)address, (long)value);
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LOG_DEBUG("M[0x%" TARGET_PRIxADDR "] reads 0x%08lx", address, (long)value);
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switch (size) {
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case 1:
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buffer[0] = value;
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@ -1308,9 +1309,11 @@ static int read_memory(struct target *target, target_addr_t address,
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riscv_addr_t cur_addr = 0xbadbeef;
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riscv_addr_t fin_addr = address + (count * size);
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riscv_addr_t prev_addr = ((riscv_addr_t) address) - size;
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LOG_DEBUG("writing until final address 0x%016lx", fin_addr);
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LOG_DEBUG("writing until final address 0x%" PRIx64, fin_addr);
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while (count > 1 && (cur_addr = riscv_read_debug_buffer_x(target, d_addr)) < fin_addr) {
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LOG_DEBUG("transferring burst starting at address 0x%016lx (previous burst was 0x%016lx)", cur_addr, prev_addr);
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LOG_DEBUG("transferring burst starting at address 0x%" TARGET_PRIxADDR
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" (previous burst was 0x%" TARGET_PRIxADDR ")", cur_addr,
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prev_addr);
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assert(prev_addr < cur_addr);
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prev_addr = cur_addr;
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riscv_addr_t start = (cur_addr - address) / size;
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