Fix style issues. Code cleanup.
parent
4f4d5f46f1
commit
e025cb320c
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@ -283,7 +283,7 @@ static void decode_dmi(char *text, unsigned address, unsigned data)
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{ DMI_DMCONTROL, DMI_DMCONTROL_RESUMEREQ, "resumereq" },
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{ DMI_DMCONTROL, DMI_DMCONTROL_RESUMEREQ, "resumereq" },
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{ DMI_DMCONTROL, DMI_DMCONTROL_HARTRESET, "hartreset" },
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{ DMI_DMCONTROL, DMI_DMCONTROL_HARTRESET, "hartreset" },
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{ DMI_DMCONTROL, DMI_DMCONTROL_HASEL, "hasel" },
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{ DMI_DMCONTROL, DMI_DMCONTROL_HASEL, "hasel" },
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{ DMI_DMCONTROL, DMI_DMCONTROL_HARTSELLO, "hartsel" },
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{ DMI_DMCONTROL, DMI_DMCONTROL_HARTSELLO, "hartsello" },
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{ DMI_DMCONTROL, DMI_DMCONTROL_NDMRESET, "ndmreset" },
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{ DMI_DMCONTROL, DMI_DMCONTROL_NDMRESET, "ndmreset" },
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{ DMI_DMCONTROL, DMI_DMCONTROL_DMACTIVE, "dmactive" },
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{ DMI_DMCONTROL, DMI_DMCONTROL_DMACTIVE, "dmactive" },
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@ -2941,7 +2941,7 @@ static int riscv013_test_sba_config_reg(struct target *target,
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read_sbcs_nonbusy(target, &sbcs);
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read_sbcs_nonbusy(target, &sbcs);
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curr_addr = sb_read_address(target);
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curr_addr = sb_read_address(target);
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if ((curr_addr - prev_addr != (uint32_t)(1 << sbaccess)) && (i != 0)) {
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if ((curr_addr - prev_addr != (uint32_t)(1 << sbaccess)) && (i != 0)) {
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LOG_ERROR("System Bus Access Test 2: Error with address auto-increment, sbaccess = %x", sbaccess);
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LOG_ERROR("System Bus Access Test 2: Error with address auto-increment, sbaccess = %x.", sbaccess);
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test_passed = false;
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test_passed = false;
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}
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}
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dmi_write(target, DMI_SBDATA0, i);
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dmi_write(target, DMI_SBDATA0, i);
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@ -2968,7 +2968,7 @@ static int riscv013_test_sba_config_reg(struct target *target,
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read_sbcs_nonbusy(target, &sbcs);
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read_sbcs_nonbusy(target, &sbcs);
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if (i != val) {
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if (i != val) {
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LOG_ERROR("System Bus Access Test 2: Error reading auto-incremented address,"
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LOG_ERROR("System Bus Access Test 2: Error reading auto-incremented address,"
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"expected val = %x, read val = %x", i, val);
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"expected val = %x, read val = %x.", i, val);
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test_passed = false;
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test_passed = false;
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}
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}
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}
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}
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@ -3000,7 +3000,7 @@ static int riscv013_test_sba_config_reg(struct target *target,
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sbcs = set_field(sbcs_orig, DMI_SBCS_SBERROR, 2);
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sbcs = set_field(sbcs_orig, DMI_SBCS_SBERROR, 2);
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dmi_write(target, DMI_SBCS,sbcs);
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dmi_write(target, DMI_SBCS,sbcs);
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dmi_read(target, &rd_val, DMI_SBCS);
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dmi_read(target, &rd_val, DMI_SBCS);
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if(get_field(rd_val, DMI_SBCS_SBERROR) == 0)
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if (get_field(rd_val, DMI_SBCS_SBERROR) == 0)
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LOG_INFO("System Bus Access Test 4: Illegal address write test PASSED.");
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LOG_INFO("System Bus Access Test 4: Illegal address write test PASSED.");
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else
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else
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LOG_ERROR("System Bus Access Test 4: Illegal address write test FAILED, unable to clear to 0.");
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LOG_ERROR("System Bus Access Test 4: Illegal address write test FAILED, unable to clear to 0.");
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