Old fixes from June (#311)
* Changed logging level * Added logging statement * Removed halt event when attaching to target * Extended some packet handling * Extended handling of rtos_hart_id and clearing of register cache * Extended execute_fence to handle all harts * Removing logging statement again * Updated according to review comments * Forgot to re-add the return statement * Was removing too much for the if statement to work * This needs to >= 3 now to handle both a fence and a fence.ideinit
parent
e54511ffa4
commit
dc4fe85880
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@ -124,6 +124,11 @@ static int riscv_gdb_thread_packet(struct connection *connection, const char *pa
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return ERROR_OK;
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}
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if (strcmp(packet, "qTStatus") == 0) {
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gdb_put_packet(connection, "T0", 2);
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return ERROR_OK;
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}
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if (strcmp(packet, "qC") == 0) {
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char rep_str[32];
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snprintf(rep_str, 32, "QC%" PRIx64, rtos->current_threadid);
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@ -250,6 +255,7 @@ static int riscv_gdb_v_packet(struct connection *connection, const char *packet,
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if (strcmp(packet_stttrr, "vCont;c") == 0) {
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target_call_event_callbacks(target, TARGET_EVENT_GDB_START);
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target_call_event_callbacks(target, TARGET_EVENT_RESUME_START);
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riscv_set_all_rtos_harts(target);
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riscv_openocd_resume(target, 1, 0, 0, 0);
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target->state = TARGET_RUNNING;
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gdb_set_frontend_state_running(connection);
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@ -51,7 +51,6 @@ int riscv_batch_run(struct riscv_batch *batch)
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keep_alive();
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LOG_DEBUG("running a batch of %ld scans", (long)batch->used_scans);
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riscv_batch_add_nop(batch);
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for (size_t i = 0; i < batch->used_scans; ++i) {
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@ -60,7 +59,6 @@ int riscv_batch_run(struct riscv_batch *batch)
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jtag_add_runtest(batch->idle_count, TAP_IDLE);
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}
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LOG_DEBUG("executing queue");
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if (jtag_execute_queue() != ERROR_OK) {
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LOG_ERROR("Unable to execute JTAG queue");
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return ERROR_FAIL;
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@ -102,9 +100,6 @@ size_t riscv_batch_add_dmi_read(struct riscv_batch *batch, unsigned address)
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riscv_batch_add_nop(batch);
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batch->read_keys[batch->read_keys_used] = batch->used_scans - 1;
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LOG_DEBUG("read key %u for batch 0x%p is %u (0x%p)",
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(unsigned) batch->read_keys_used, batch, (unsigned) (batch->used_scans - 1),
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batch->data_in + sizeof(uint64_t) * (batch->used_scans + 1));
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return batch->read_keys_used++;
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}
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@ -135,7 +130,6 @@ void riscv_batch_add_nop(struct riscv_batch *batch)
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riscv_fill_dmi_nop_u64(batch->target, (char *)field->in_value);
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batch->last_scan = RISCV_SCAN_TYPE_NOP;
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batch->used_scans++;
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LOG_DEBUG(" added NOP with in_value=0x%p", field->in_value);
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}
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void dump_field(const struct scan_field *field)
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@ -1771,13 +1771,38 @@ static void write_to_buf(uint8_t *buffer, uint64_t value, unsigned size)
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static int execute_fence(struct target *target)
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{
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struct riscv_program program;
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riscv_program_init(&program, target);
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riscv_program_fence(&program);
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int result = riscv_program_exec(&program, target);
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if (result != ERROR_OK)
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LOG_ERROR("Unable to execute fence");
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return result;
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int old_hartid = riscv_current_hartid(target);
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/* FIXME: For non-coherent systems we need to flush the caches right
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* here, but there's no ISA-defined way of doing that. */
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{
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struct riscv_program program;
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riscv_program_init(&program, target);
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riscv_program_fence_i(&program);
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riscv_program_fence(&program);
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int result = riscv_program_exec(&program, target);
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if (result != ERROR_OK)
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LOG_DEBUG("Unable to execute pre-fence");
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}
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for (int i = 0; i < riscv_count_harts(target); ++i) {
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if (!riscv_hart_enabled(target, i))
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continue;
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riscv_set_current_hartid(target, i);
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struct riscv_program program;
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riscv_program_init(&program, target);
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riscv_program_fence_i(&program);
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riscv_program_fence(&program);
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int result = riscv_program_exec(&program, target);
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if (result != ERROR_OK)
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LOG_DEBUG("Unable to execute fence on hart %d", i);
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}
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riscv_set_current_hartid(target, old_hartid);
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return ERROR_OK;
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}
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static void log_memory_access(target_addr_t address, uint64_t value,
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@ -3344,15 +3369,8 @@ static int maybe_execute_fence_i(struct target *target)
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{
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RISCV013_INFO(info);
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RISCV_INFO(r);
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if (info->progbufsize + r->impebreak >= 2) {
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struct riscv_program program;
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riscv_program_init(&program, target);
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if (riscv_program_fence_i(&program) != ERROR_OK)
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return ERROR_FAIL;
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if (riscv_program_exec(&program, target) != ERROR_OK) {
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LOG_ERROR("Failed to execute fence.i");
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return ERROR_FAIL;
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}
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if (info->progbufsize + r->impebreak >= 3) {
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return execute_fence(target);
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}
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return ERROR_OK;
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}
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@ -266,6 +266,8 @@ static int riscv_init_target(struct command_context *cmd_ctx,
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riscv_semihosting_init(target);
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target->debug_reason = DBG_REASON_DBGRQ;
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return ERROR_OK;
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}
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@ -856,9 +858,11 @@ static int old_or_new_riscv_resume(
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static int riscv_select_current_hart(struct target *target)
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{
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RISCV_INFO(r);
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if (r->rtos_hartid != -1 && riscv_rtos_enabled(target))
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if (riscv_rtos_enabled(target)) {
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if (r->rtos_hartid == -1)
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r->rtos_hartid = target->rtos->current_threadid - 1;
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return riscv_set_current_hartid(target, r->rtos_hartid);
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else
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} else
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return riscv_set_current_hartid(target, target->coreid);
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}
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@ -1196,8 +1200,12 @@ int riscv_openocd_halt(struct target *target)
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register_cache_invalidate(target->reg_cache);
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if (riscv_rtos_enabled(target)) {
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target->rtos->current_threadid = r->rtos_hartid + 1;
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target->rtos->current_thread = r->rtos_hartid + 1;
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if (r->rtos_hartid != -1) {
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LOG_DEBUG("halt requested on RTOS hartid %d", r->rtos_hartid);
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target->rtos->current_threadid = r->rtos_hartid + 1;
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target->rtos->current_thread = r->rtos_hartid + 1;
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} else
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LOG_DEBUG("halt requested, but no known RTOS hartid");
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}
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target->state = TARGET_HALTED;
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@ -1817,6 +1825,8 @@ int riscv_halt_all_harts(struct target *target)
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riscv_halt_one_hart(target, i);
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}
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riscv_invalidate_register_cache(target);
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return ERROR_OK;
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}
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@ -1869,7 +1879,7 @@ int riscv_step_rtos_hart(struct target *target)
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if (riscv_rtos_enabled(target)) {
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hartid = r->rtos_hartid;
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if (hartid == -1) {
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LOG_USER("GDB has asked me to step \"any\" thread, so I'm stepping hart 0.");
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LOG_DEBUG("GDB has asked me to step \"any\" thread, so I'm stepping hart 0.");
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hartid = 0;
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}
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}
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@ -1942,15 +1952,6 @@ int riscv_set_current_hartid(struct target *target, int hartid)
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if (!target_was_examined(target))
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return ERROR_OK;
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/* Avoid invalidating the register cache all the time. */
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if (r->registers_initialized
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&& (!riscv_rtos_enabled(target) || (previous_hartid == hartid))
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&& target->reg_cache->reg_list[GDB_REGNO_ZERO].size == (unsigned)riscv_xlen(target)
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&& (!riscv_rtos_enabled(target) || (r->rtos_hartid != -1))) {
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return ERROR_OK;
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} else
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LOG_DEBUG("Initializing registers: xlen=%d", riscv_xlen(target));
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riscv_invalidate_register_cache(target);
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return ERROR_OK;
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}
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@ -2031,7 +2032,15 @@ int riscv_get_register_on_hart(struct target *target, riscv_reg_t *value,
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int hartid, enum gdb_regno regid)
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{
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RISCV_INFO(r);
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if (hartid != riscv_current_hartid(target))
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riscv_invalidate_register_cache(target);
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int result = r->get_register(target, value, hartid, regid);
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if (hartid != riscv_current_hartid(target))
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riscv_invalidate_register_cache(target);
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LOG_DEBUG("[%d] %s: %" PRIx64, hartid, gdb_regno_name(regid), *value);
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return result;
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}
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