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target/cortex_a: check dscr before timeout 

In function cortex_a_wait_dscr_bits() the last read on dscr gets
ignored in case of timeout, even if it finally provides the value
that would trigger a successful return.

Check the returned value before testing the timeout.
Also, print a message on failure reading dscr.

Change-Id: I261ac1545113db39374833a55be911a4da71d893
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5112
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
bscan_optimization
Antonio Borneo 2019-04-15 22:32:32 +02:00 committed by Matthias Welwarsky
parent d3a9e535d5
commit d870ecf5ff
1 changed files with 11 additions and 3 deletions
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14
src/target/cortex_a.c
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@ -1765,14 +1765,22 @@ static int cortex_a_wait_dscr_bits(struct target *target, uint32_t mask,
{ {
/* Waits until the specified bit(s) of DSCR take on a specified value. */ /* Waits until the specified bit(s) of DSCR take on a specified value. */
struct armv7a_common *armv7a = target_to_armv7a(target); struct armv7a_common *armv7a = target_to_armv7a(target);
int64_t then = timeval_ms(); int64_t then;
int retval; int retval;
while ((*dscr & mask) != value) { if ((*dscr & mask) == value)
return ERROR_OK;
then = timeval_ms();
while (1) {
retval = mem_ap_read_atomic_u32(armv7a->debug_ap, retval = mem_ap_read_atomic_u32(armv7a->debug_ap,
armv7a->debug_base + CPUDBG_DSCR, dscr); armv7a->debug_base + CPUDBG_DSCR, dscr);
if (retval != ERROR_OK) if (retval != ERROR_OK) {
LOG_ERROR("Could not read DSCR register");
return retval; return retval;
}
if ((*dscr & mask) == value)
break;
if (timeval_ms() > then + 1000) { if (timeval_ms() > then + 1000) {
LOG_ERROR("timeout waiting for DSCR bit change"); LOG_ERROR("timeout waiting for DSCR bit change");
return ERROR_FAIL; return ERROR_FAIL;