pic32mx: add new device ID, 17x/27x Flash support
- add new device ID: 170F256B, 170F256D, 270F256B, 270F256D, 330F064H, 330F064L, 430F064H, 430F064L, 350F128H, 350F128L, 450F128H, 450F128L, 350F256H, 350F256L, 450F256H, 450F256L, 370F512H, 370F512L, 470F512H, 470F512L - add support for PIC32MX17x/27x 256kB Flash Change-Id: I65a304d2114fff80de3a24c1f6d0b5e955b22531 Signed-off-by: SASANO Takayoshi <uaa@uaa.org.uk> Reviewed-on: http://openocd.zylin.com/3186 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>__archive__
SASANO Takayoshi
Andreas Fritiofson
parent
a46eb1f082
commit
d856aa9771
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@ -50,7 +50,7 @@
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/* pic32mx configuration register locations */
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#define PIC32MX_DEVCFG0_1_2 0xBFC00BFC
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#define PIC32MX_DEVCFG0_1xx_2xx 0xBFC00BFC
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#define PIC32MX_DEVCFG0 0xBFC02FFC
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#define PIC32MX_DEVCFG1 0xBFC02FF8
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#define PIC32MX_DEVCFG2 0xBFC02FF4
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@ -91,7 +91,8 @@
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#define NVMKEY1 0xAA996655
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#define NVMKEY2 0x556699AA
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#define MX_1_2 1 /* PIC32mx1xx/2xx */
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#define MX_1xx_2xx 1 /* PIC32mx1xx/2xx */
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#define MX_17x_27x 2 /* PIC32mx17x/27x */
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struct pic32mx_flash_bank {
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int probed;
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@ -99,7 +100,7 @@ struct pic32mx_flash_bank {
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};
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/*
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* DEVID values as per PIC32MX Flash Programming Specification Rev J
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* DEVID values as per PIC32MX Flash Programming Specification Rev N
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*/
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static const struct pic32mx_devs_s {
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@ -118,6 +119,8 @@ static const struct pic32mx_devs_s {
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{0x04D06053, "150F128B"},
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{0x04D08053, "150F128C"},
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{0x04D0A053, "150F128D"},
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{0x06610053, "170F256B"},
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{0x0661A053, "170F256D"},
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{0x04A01053, "210F016B"},
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{0x04A03053, "210F016C"},
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{0x04A05053, "210F016D"},
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@ -130,6 +133,24 @@ static const struct pic32mx_devs_s {
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{0x04D00053, "250F128B"},
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{0x04D02053, "250F128C"},
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{0x04D04053, "250F128D"},
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{0x06600053, "270F256B"},
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{0x0660A053, "270F256D"},
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{0x05600053, "330F064H"},
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{0x05601053, "330F064L"},
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{0x05602053, "430F064H"},
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{0x05603053, "430F064L"},
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{0x0570C053, "350F128H"},
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{0x0570D053, "350F128L"},
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{0x0570E053, "450F128H"},
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{0x0570F053, "450F128L"},
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{0x05704053, "350F256H"},
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{0x05705053, "350F256L"},
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{0x05706053, "450F256H"},
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{0x05707053, "450F256L"},
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{0x05808053, "370F512H"},
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{0x05809053, "370F512L"},
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{0x0580A053, "470F512H"},
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{0x0580B053, "470F512L"},
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{0x00938053, "360F512L"},
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{0x00934053, "360F256L"},
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{0x0092D053, "340F128L"},
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@ -258,10 +279,15 @@ static int pic32mx_protect_check(struct flash_bank *bank)
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return ERROR_TARGET_NOT_HALTED;
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}
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if (pic32mx_info->dev_type == MX_1_2)
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config0_address = PIC32MX_DEVCFG0_1_2;
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else
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switch (pic32mx_info->dev_type) {
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case MX_1xx_2xx:
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case MX_17x_27x:
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config0_address = PIC32MX_DEVCFG0_1xx_2xx;
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break;
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default:
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config0_address = PIC32MX_DEVCFG0;
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break;
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}
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target_read_u32(target, config0_address, &devcfg0);
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@ -274,10 +300,17 @@ static int pic32mx_protect_check(struct flash_bank *bank)
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num_pages = 0xffff; /* All pages protected */
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} else {
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/* pgm flash */
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if (pic32mx_info->dev_type == MX_1_2)
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num_pages = (~devcfg0 >> 10) & 0x3f;
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else
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switch (pic32mx_info->dev_type) {
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case MX_1xx_2xx:
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num_pages = (~devcfg0 >> 10) & 0x7f;
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break;
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case MX_17x_27x:
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num_pages = (~devcfg0 >> 10) & 0x1ff;
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break;
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default:
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num_pages = (~devcfg0 >> 12) & 0xff;
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break;
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}
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}
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for (s = 0; s < bank->num_sectors && s < num_pages; s++)
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@ -431,20 +464,24 @@ static int pic32mx_write_block(struct flash_bank *bank, const uint8_t *buffer,
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}
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/* Change values for counters and row size, depending on variant */
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if (pic32mx_info->dev_type == MX_1_2) {
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switch (pic32mx_info->dev_type) {
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case MX_1xx_2xx:
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case MX_17x_27x:
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/* 128 byte row */
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pic32mx_flash_write_code[8] = 0x2CD30020;
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pic32mx_flash_write_code[14] = 0x24840080;
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pic32mx_flash_write_code[15] = 0x24A50080;
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pic32mx_flash_write_code[17] = 0x24C6FFE0;
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row_size = 128;
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} else {
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break;
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default:
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/* 512 byte row */
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pic32mx_flash_write_code[8] = 0x2CD30080;
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pic32mx_flash_write_code[14] = 0x24840200;
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pic32mx_flash_write_code[15] = 0x24A50200;
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pic32mx_flash_write_code[17] = 0x24C6FF80;
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row_size = 512;
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break;
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}
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uint8_t code[sizeof(pic32mx_flash_write_code)];
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@ -680,17 +717,21 @@ static int pic32mx_probe(struct flash_bank *bank)
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/* Check for PIC32mx1xx/2xx */
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for (i = 0; pic32mx_devs[i].name != NULL; i++) {
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if (pic32mx_devs[i].devid == (device_id & 0x0fffffff)) {
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if ((*(pic32mx_devs[i].name) == '1') || (*(pic32mx_devs[i].name) == '2'))
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pic32mx_info->dev_type = MX_1_2;
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if ((pic32mx_devs[i].name[0] == '1') || (pic32mx_devs[i].name[0] == '2'))
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pic32mx_info->dev_type = (pic32mx_devs[i].name[1] == '7') ? MX_17x_27x : MX_1xx_2xx;
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break;
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}
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}
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if (pic32mx_info->dev_type == MX_1_2)
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switch (pic32mx_info->dev_type) {
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case MX_1xx_2xx:
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case MX_17x_27x:
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page_size = 1024;
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else
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break;
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default:
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page_size = 4096;
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break;
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}
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if (Virt2Phys(bank->base) == PIC32MX_PHYS_BOOT_FLASH) {
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/* 0x1FC00000: Boot flash size */
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@ -704,20 +745,29 @@ static int pic32mx_probe(struct flash_bank *bank)
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}
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#else
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/* fixed 12k boot bank - see comments above */
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if (pic32mx_info->dev_type == MX_1_2)
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switch (pic32mx_info->dev_type) {
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case MX_1xx_2xx:
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case MX_17x_27x:
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num_pages = (3 * 1024);
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else
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break;
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default:
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num_pages = (12 * 1024);
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break;
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}
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#endif
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} else {
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/* read the flash size from the device */
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if (target_read_u32(target, PIC32MX_BMXPFMSZ, &num_pages) != ERROR_OK) {
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if (pic32mx_info->dev_type == MX_1_2) {
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switch (pic32mx_info->dev_type) {
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case MX_1xx_2xx:
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case MX_17x_27x:
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LOG_WARNING("PIC32MX flash size failed, probe inaccurate - assuming 32k flash");
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num_pages = (32 * 1024);
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} else {
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break;
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default:
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LOG_WARNING("PIC32MX flash size failed, probe inaccurate - assuming 512k flash");
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num_pages = (512 * 1024);
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break;
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}
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}
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}
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