From d6334188eccc2b71c78fde840ae0089d6574b6c2 Mon Sep 17 00:00:00 2001 From: Mathias K Date: Fri, 25 May 2012 10:57:26 +0200 Subject: [PATCH] config: Add TI Calypso CPU configuration This patch add the TI Calypso CPU to the configuration files. Change-Id: Ieb462960391c4a2c630d7a83699c3b6e8162ace9 Signed-off-by: Mathias K Reviewed-on: http://openocd.zylin.com/630 Tested-by: jenkins Reviewed-by: Spencer Oliver --- tcl/target/ti_calypso.cfg | 57 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 57 insertions(+) create mode 100644 tcl/target/ti_calypso.cfg diff --git a/tcl/target/ti_calypso.cfg b/tcl/target/ti_calypso.cfg new file mode 100644 index 000000000..8b4a86960 --- /dev/null +++ b/tcl/target/ti_calypso.cfg @@ -0,0 +1,57 @@ +# +# TI Calypso (lite) G2 C035 Digital Base Band chip +# +# ARM7TDMIE + DSP subchip (S28C128) +# +# 512K SRAM Calypso +# 256K SRAM Calypso lite +# +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME calypso +} + +if { [info exists ENDIAN] } { + set _ENDIAN $ENDIAN +} else { + set _ENDIAN little +} + +if { [info exists CPUTAPID] } { + set _CPUTAPID $CPUTAPID +} else { + set _CPUTAPID 0x3100e02f +} + +# Work-area is a space in RAM used for flash programming +# By default use 64kB +if { [info exists WORKAREASIZE] } { + set _WORKAREASIZE $WORKAREASIZE +} else { + set _WORKAREASIZE 0x10000 +} + +adapter_khz 1000 + +reset_config trst_and_srst + +jtag newtap $_CHIPNAME dsp -expected-id 0x00000000 -irlen 8 +jtag newtap $_CHIPNAME arm -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID + +# target + +set _TARGETNAME $_CHIPNAME.arm +target create $_TARGETNAME arm7tdmi -endian little -chain-position $_TARGETNAME -variant calypso + +# workarea + +$_TARGETNAME configure -work-area-phys 0x00800000 -work-area-size $_WORKAREASIZE -work-area-backup 1 + +arm7_9 dcc_downloads enable +arm7_9 fast_memory_access enable + +$_TARGETNAME configure -event examine-start { + irscan calypso.arm 0x0b -endstate DRPAUSE + drscan calypso.arm 2 2 -endstate RUN/IDLE +}