lpc1768.cfg pulled out constants from flash init as variables
Seems like an esthetic change, but it will allow easy support for other lpc17xx devices. Change-Id: I2cb953ce1afdd82f6ca65b38d5557a28416f895e Signed-off-by: Vandra Akos <axos88@gmail.com> Reviewed-on: http://openocd.zylin.com/674 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>__archive__
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@ -22,12 +22,25 @@ if { [info exists CCLK] } {
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} else {
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set _CCLK 4000
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}
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if { [info exists CPUTAPID] } {
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set _CPUTAPID $CPUTAPID
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} else {
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set _CPUTAPID 0x4ba00477
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}
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if { [info exists CPURAMSIZE] } {
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set _CPURAMSIZE $CPURAMSIZE
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} else {
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set _CPURAMSIZE 0x8000
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}
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if { [info exists CPUROMSIZE] } {
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set _CPUROMSIZE $CPUROMSIZE
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} else {
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set _CPUROMSIZE 0x80000
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}
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#delays on reset lines
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adapter_nsrst_delay 200
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jtag_ntrst_delay 200
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@ -40,13 +53,13 @@ target create $_TARGETNAME cortex_m3 -chain-position $_TARGETNAME
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# LPC1768 has 32kB of SRAM In the ARMv7-M "Code" area (at 0x10000000)
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# and 32K more on AHB, in the ARMv7-M "SRAM" area, (at 0x2007c000).
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$_TARGETNAME configure -work-area-phys 0x10000000 -work-area-size 0x8000
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$_TARGETNAME configure -work-area-phys 0x10000000 -work-area-size $_CPURAMSIZE
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# LPC1768 has 512kB of flash memory, managed by ROM code (including a
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# boot loader which verifies the flash exception table's checksum).
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# flash bank <name> lpc2000 <base> <size> 0 0 <target#> <variant> <clock> [calc checksum]
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set _FLASHNAME $_CHIPNAME.flash
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flash bank $_FLASHNAME lpc2000 0x0 0x80000 0 0 $_TARGETNAME \
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flash bank $_FLASHNAME lpc2000 0x0 $_CPUROMSIZE 0 0 $_TARGETNAME \
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lpc1700 $_CCLK calc_checksum
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# Run with *real slow* clock by default since the
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