contrib: add source to the cfi flash loaders
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>__archive__
Spencer Oliver
parent
9a76c68563
commit
cbf48bed6a
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@ -0,0 +1,57 @@
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/***************************************************************************
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* Copyright (C) 2005, 2007 by Dominic Rath *
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* Dominic.Rath@gmx.de *
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* Copyright (C) 2010 Spencer Oliver *
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* spen@spen-soft.co.uk *
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* *
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* This program is free software; you can redistribute it and/or modify *
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* it under the terms of the GNU General Public License as published by *
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||||||
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* the Free Software Foundation; either version 2 of the License, or *
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* (at your option) any later version. *
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* *
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* This program is distributed in the hope that it will be useful, *
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* but WITHOUT ANY WARRANTY; without even the implied warranty of *
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||||||
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
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* GNU General Public License for more details. *
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||||||
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* *
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||||||
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* You should have received a copy of the GNU General Public License *
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||||||
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* along with this program; if not, write to the *
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||||||
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* Free Software Foundation, Inc., *
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* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
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***************************************************************************/
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.text
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.arm
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.arch armv4
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.section .init
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/* algorithm register usage:
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* r0: source address (in RAM)
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* r1: target address (in Flash)
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* r2: count
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* r3: flash write command
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* r4: status byte (returned to host)
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* r5: busy test pattern
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* r6: error test pattern
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*/
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loop:
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ldrh r4, [r0], #2
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strh r3, [r1]
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strh r4, [r1]
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busy:
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ldrh r4, [r1]
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and r7, r4, r5
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cmp r7, r5
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bne busy
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tst r4, r6
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bne done
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subs r2, r2, #1
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beq done
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add r1, r1, #2
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b loop
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done:
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b done
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.end
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@ -0,0 +1,57 @@
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/***************************************************************************
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* Copyright (C) 2005, 2007 by Dominic Rath *
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* Dominic.Rath@gmx.de *
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* Copyright (C) 2010 Spencer Oliver *
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* spen@spen-soft.co.uk *
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* *
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* This program is free software; you can redistribute it and/or modify *
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||||||
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* it under the terms of the GNU General Public License as published by *
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||||||
|
* the Free Software Foundation; either version 2 of the License, or *
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||||||
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* (at your option) any later version. *
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||||||
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* *
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||||||
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* This program is distributed in the hope that it will be useful, *
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||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
|
||||||
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* GNU General Public License for more details. *
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||||||
|
* *
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||||||
|
* You should have received a copy of the GNU General Public License *
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||||||
|
* along with this program; if not, write to the *
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||||||
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* Free Software Foundation, Inc., *
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||||||
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* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
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***************************************************************************/
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.text
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.arm
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.arch armv4
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.section .init
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/* algorithm register usage:
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* r0: source address (in RAM)
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* r1: target address (in Flash)
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* r2: count
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* r3: flash write command
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* r4: status byte (returned to host)
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* r5: busy test pattern
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* r6: error test pattern
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*/
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loop:
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ldr r4, [r0], #4
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str r3, [r1]
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str r4, [r1]
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busy:
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ldr r4, [r1]
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and r7, r4, r5
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cmp r7, r5
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bne busy
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tst r4, r6
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bne done
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subs r2, r2, #1
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beq done
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add r1, r1, #4
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b loop
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done:
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b done
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.end
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@ -0,0 +1,57 @@
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/***************************************************************************
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* Copyright (C) 2005, 2007 by Dominic Rath *
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* Dominic.Rath@gmx.de *
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* Copyright (C) 2010 Spencer Oliver *
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* spen@spen-soft.co.uk *
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* *
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* This program is free software; you can redistribute it and/or modify *
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||||||
|
* it under the terms of the GNU General Public License as published by *
|
||||||
|
* the Free Software Foundation; either version 2 of the License, or *
|
||||||
|
* (at your option) any later version. *
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||||||
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* *
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||||||
|
* This program is distributed in the hope that it will be useful, *
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||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
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||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
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||||||
|
* GNU General Public License for more details. *
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||||||
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* *
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||||||
|
* You should have received a copy of the GNU General Public License *
|
||||||
|
* along with this program; if not, write to the *
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|
* Free Software Foundation, Inc., *
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* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
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***************************************************************************/
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.text
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.arm
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.arch armv4
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.section .init
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/* algorithm register usage:
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* r0: source address (in RAM)
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* r1: target address (in Flash)
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* r2: count
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* r3: flash write command
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* r4: status byte (returned to host)
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* r5: busy test pattern
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* r6: error test pattern
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*/
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loop:
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ldrb r4, [r0], #1
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strb r3, [r1]
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strb r4, [r1]
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busy:
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ldrb r4, [r1]
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and r7, r4, r5
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cmp r7, r5
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bne busy
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tst r4, r6
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bne done
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subs r2, r2, #1
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beq done
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add r1, r1, #1
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b loop
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done:
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b done
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.end
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@ -0,0 +1,75 @@
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/***************************************************************************
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* Copyright (C) 2005, 2007 by Dominic Rath *
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* Dominic.Rath@gmx.de *
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* Copyright (C) 2010 Spencer Oliver *
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* spen@spen-soft.co.uk *
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* *
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* This program is free software; you can redistribute it and/or modify *
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||||||
|
* it under the terms of the GNU General Public License as published by *
|
||||||
|
* the Free Software Foundation; either version 2 of the License, or *
|
||||||
|
* (at your option) any later version. *
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||||||
|
* *
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||||||
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* This program is distributed in the hope that it will be useful, *
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||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
|
||||||
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* GNU General Public License for more details. *
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||||||
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* *
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||||||
|
* You should have received a copy of the GNU General Public License *
|
||||||
|
* along with this program; if not, write to the *
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||||||
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* Free Software Foundation, Inc., *
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||||||
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* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
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***************************************************************************/
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.text
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.arm
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.arch armv4
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.section .init
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/* input parameters - */
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/* R0 = source address */
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/* R1 = destination address */
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/* R2 = number of writes */
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/* R3 = flash write command */
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/* R4 = constant to mask DQ7 bits (also used for Dq5 with shift) */
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/* output parameters - */
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/* R5 = 0x80 ok 0x00 bad */
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/* temp registers - */
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/* R6 = value read from flash to test status */
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/* R7 = holding register */
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/* unlock registers - */
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/* R8 = unlock1_addr */
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/* R9 = unlock1_cmd */
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/* R10 = unlock2_addr */
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/* R11 = unlock2_cmd */
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code:
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ldrh r5, [r0], #2
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strh r9, [r8]
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strh r11, [r10]
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strh r3, [r8]
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strh r5, [r1]
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nop
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busy:
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ldrh r6, [r1]
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eor r7, r5, r6
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ands r7, r4, r7
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beq cont /* b if DQ7 == Data7 */
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ands r6, r6, r4, lsr #2
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beq busy /* b if DQ5 low */
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ldrh r6, [r1]
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eor r7, r5, r6
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ands r7, r4, r7
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beq cont /* b if DQ7 == Data7 */
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mov r5, #0 /* 0x0 - return 0x00, error */
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bne done
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cont:
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subs r2, r2, #1 /* 0x1 */
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moveq r5, #128 /* 0x80 */
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beq done
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add r1, r1, #2 /* 0x2 */
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b code
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done:
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b done
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.end
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@ -0,0 +1,66 @@
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/***************************************************************************
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* Copyright (C) 2005, 2007 by Dominic Rath *
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* Dominic.Rath@gmx.de *
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* Copyright (C) 2010 Spencer Oliver *
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* spen@spen-soft.co.uk *
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* *
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* This program is free software; you can redistribute it and/or modify *
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||||||
|
* it under the terms of the GNU General Public License as published by *
|
||||||
|
* the Free Software Foundation; either version 2 of the License, or *
|
||||||
|
* (at your option) any later version. *
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||||||
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* *
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||||||
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* This program is distributed in the hope that it will be useful, *
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||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
|
||||||
|
* GNU General Public License for more details. *
|
||||||
|
* *
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||||||
|
* You should have received a copy of the GNU General Public License *
|
||||||
|
* along with this program; if not, write to the *
|
||||||
|
* Free Software Foundation, Inc., *
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||||||
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* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
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||||||
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***************************************************************************/
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.text
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.arm
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.arch armv4
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.section .init
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/* input parameters - */
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/* R0 = source address */
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/* R1 = destination address */
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/* R2 = number of writes */
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/* R3 = flash write command */
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/* R4 = constant to mask DQ7 bits (also used for Dq5 with shift) */
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/* output parameters - */
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/* R5 = 0x80 ok 0x00 bad */
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/* temp registers - */
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/* R6 = value read from flash to test status */
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/* R7 = holding register */
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/* unlock registers - */
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/* R8 = unlock1_addr */
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/* R9 = unlock1_cmd */
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/* R10 = unlock2_addr */
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/* R11 = unlock2_cmd */
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code:
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ldrh r5, [r0], #2
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strh r9, [r8]
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strh r11, [r10]
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strh r3, [r8]
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strh r5, [r1]
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nop
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busy:
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ldrh r6, [r1]
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eor r7, r5, r6
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ands r7, #0x80
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bne busy
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subs r2, r2, #1 /* 0x1 */
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moveq r5, #128 /* 0x80 */
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beq done
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add r1, r1, #2 /* 0x2 */
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b code
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done:
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b done
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.end
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@ -0,0 +1,75 @@
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||||||
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/***************************************************************************
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||||||
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* Copyright (C) 2005, 2007 by Dominic Rath *
|
||||||
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* Dominic.Rath@gmx.de *
|
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|
* Copyright (C) 2010 Spencer Oliver *
|
||||||
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* spen@spen-soft.co.uk *
|
||||||
|
* *
|
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|
* This program is free software; you can redistribute it and/or modify *
|
||||||
|
* it under the terms of the GNU General Public License as published by *
|
||||||
|
* the Free Software Foundation; either version 2 of the License, or *
|
||||||
|
* (at your option) any later version. *
|
||||||
|
* *
|
||||||
|
* This program is distributed in the hope that it will be useful, *
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
|
||||||
|
* GNU General Public License for more details. *
|
||||||
|
* *
|
||||||
|
* You should have received a copy of the GNU General Public License *
|
||||||
|
* along with this program; if not, write to the *
|
||||||
|
* Free Software Foundation, Inc., *
|
||||||
|
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
|
||||||
|
***************************************************************************/
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.text
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.arm
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.arch armv4
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|
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.section .init
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/* input parameters - */
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/* R0 = source address */
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/* R1 = destination address */
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||||||
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/* R2 = number of writes */
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||||||
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/* R3 = flash write command */
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||||||
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/* R4 = constant to mask DQ7 bits (also used for Dq5 with shift) */
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||||||
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/* output parameters - */
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||||||
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/* R5 = 0x80 ok 0x00 bad */
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/* temp registers - */
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||||||
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/* R6 = value read from flash to test status */
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/* R7 = holding register */
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/* unlock registers - */
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/* R8 = unlock1_addr */
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/* R9 = unlock1_cmd */
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/* R10 = unlock2_addr */
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/* R11 = unlock2_cmd */
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code:
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ldr r5, [r0], #4
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str r9, [r8]
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str r11, [r10]
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str r3, [r8]
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str r5, [r1]
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nop
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busy:
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ldr r6, [r1]
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eor r7, r5, r6
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ands r7, r4, r7
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beq cont /* b if DQ7 == Data7 */
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ands r6, r6, r4, lsr #2
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beq busy /* b if DQ5 low */
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ldr r6, [r1]
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eor r7, r5, r6
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ands r7, r4, r7
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beq cont /* b if DQ7 == Data7 */
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mov r5, #0 /* 0x0 - return 0x00, error */
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bne done
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cont:
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subs r2, r2, #1 /* 0x1 */
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moveq r5, #128 /* 0x80 */
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beq done
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add r1, r1, #4 /* 0x4 */
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b code
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done:
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b done
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.end
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@ -0,0 +1,75 @@
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/***************************************************************************
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||||||
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* Copyright (C) 2005, 2007 by Dominic Rath *
|
||||||
|
* Dominic.Rath@gmx.de *
|
||||||
|
* Copyright (C) 2010 Spencer Oliver *
|
||||||
|
* spen@spen-soft.co.uk *
|
||||||
|
* *
|
||||||
|
* This program is free software; you can redistribute it and/or modify *
|
||||||
|
* it under the terms of the GNU General Public License as published by *
|
||||||
|
* the Free Software Foundation; either version 2 of the License, or *
|
||||||
|
* (at your option) any later version. *
|
||||||
|
* *
|
||||||
|
* This program is distributed in the hope that it will be useful, *
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
|
||||||
|
* GNU General Public License for more details. *
|
||||||
|
* *
|
||||||
|
* You should have received a copy of the GNU General Public License *
|
||||||
|
* along with this program; if not, write to the *
|
||||||
|
* Free Software Foundation, Inc., *
|
||||||
|
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
|
||||||
|
***************************************************************************/
|
||||||
|
|
||||||
|
.text
|
||||||
|
.arm
|
||||||
|
.arch armv4
|
||||||
|
|
||||||
|
.section .init
|
||||||
|
|
||||||
|
/* input parameters - */
|
||||||
|
/* R0 = source address */
|
||||||
|
/* R1 = destination address */
|
||||||
|
/* R2 = number of writes */
|
||||||
|
/* R3 = flash write command */
|
||||||
|
/* R4 = constant to mask DQ7 bits (also used for Dq5 with shift) */
|
||||||
|
/* output parameters - */
|
||||||
|
/* R5 = 0x80 ok 0x00 bad */
|
||||||
|
/* temp registers - */
|
||||||
|
/* R6 = value read from flash to test status */
|
||||||
|
/* R7 = holding register */
|
||||||
|
/* unlock registers - */
|
||||||
|
/* R8 = unlock1_addr */
|
||||||
|
/* R9 = unlock1_cmd */
|
||||||
|
/* R10 = unlock2_addr */
|
||||||
|
/* R11 = unlock2_cmd */
|
||||||
|
|
||||||
|
code:
|
||||||
|
ldrb r5, [r0], #1
|
||||||
|
strb r9, [r8]
|
||||||
|
strb r11, [r10]
|
||||||
|
strb r3, [r8]
|
||||||
|
strb r5, [r1]
|
||||||
|
nop
|
||||||
|
busy:
|
||||||
|
ldrb r6, [r1]
|
||||||
|
eor r7, r5, r6
|
||||||
|
ands r7, r4, r7
|
||||||
|
beq cont /* b if DQ7 == Data7 */
|
||||||
|
ands r6, r6, r4, lsr #2
|
||||||
|
beq busy /* b if DQ5 low */
|
||||||
|
ldrb r6, [r1]
|
||||||
|
eor r7, r5, r6
|
||||||
|
ands r7, r4, r7
|
||||||
|
beq cont /* b if DQ7 == Data7 */
|
||||||
|
mov r5, #0 /* 0x0 - return 0x00, error */
|
||||||
|
bne done
|
||||||
|
cont:
|
||||||
|
subs r2, r2, #1 /* 0x1 */
|
||||||
|
moveq r5, #128 /* 0x80 */
|
||||||
|
beq done
|
||||||
|
add r1, r1, #1 /* 0x1 */
|
||||||
|
b code
|
||||||
|
done:
|
||||||
|
b done
|
||||||
|
|
||||||
|
.end
|
||||||
|
|
@ -1226,6 +1226,7 @@ static int cfi_intel_write_block(struct flash_bank *bank, uint8_t *buffer,
|
||||||
* r6: error test pattern
|
* r6: error test pattern
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
/* see contib/loaders/flash/armv4_5_cfi_intel_32.s for src */
|
||||||
static const uint32_t word_32_code[] = {
|
static const uint32_t word_32_code[] = {
|
||||||
0xe4904004, /* loop: ldr r4, [r0], #4 */
|
0xe4904004, /* loop: ldr r4, [r0], #4 */
|
||||||
0xe5813000, /* str r3, [r1] */
|
0xe5813000, /* str r3, [r1] */
|
||||||
|
|
@ -1243,6 +1244,7 @@ static int cfi_intel_write_block(struct flash_bank *bank, uint8_t *buffer,
|
||||||
0xeafffffe /* done: b -2 */
|
0xeafffffe /* done: b -2 */
|
||||||
};
|
};
|
||||||
|
|
||||||
|
/* see contib/loaders/flash/armv4_5_cfi_intel_16.s for src */
|
||||||
static const uint32_t word_16_code[] = {
|
static const uint32_t word_16_code[] = {
|
||||||
0xe0d040b2, /* loop: ldrh r4, [r0], #2 */
|
0xe0d040b2, /* loop: ldrh r4, [r0], #2 */
|
||||||
0xe1c130b0, /* strh r3, [r1] */
|
0xe1c130b0, /* strh r3, [r1] */
|
||||||
|
|
@ -1260,6 +1262,7 @@ static int cfi_intel_write_block(struct flash_bank *bank, uint8_t *buffer,
|
||||||
0xeafffffe /* done: b -2 */
|
0xeafffffe /* done: b -2 */
|
||||||
};
|
};
|
||||||
|
|
||||||
|
/* see contib/loaders/flash/armv4_5_cfi_intel_8.s for src */
|
||||||
static const uint32_t word_8_code[] = {
|
static const uint32_t word_8_code[] = {
|
||||||
0xe4d04001, /* loop: ldrb r4, [r0], #1 */
|
0xe4d04001, /* loop: ldrb r4, [r0], #1 */
|
||||||
0xe5c13000, /* strb r3, [r1] */
|
0xe5c13000, /* strb r3, [r1] */
|
||||||
|
|
@ -1487,6 +1490,7 @@ static int cfi_spansion_write_block(struct flash_bank *bank, uint8_t *buffer,
|
||||||
/* R10 = unlock2_addr */
|
/* R10 = unlock2_addr */
|
||||||
/* R11 = unlock2_cmd */
|
/* R11 = unlock2_cmd */
|
||||||
|
|
||||||
|
/* see contib/loaders/flash/armv4_5_cfi_span_32.s for src */
|
||||||
static const uint32_t word_32_code[] = {
|
static const uint32_t word_32_code[] = {
|
||||||
/* 00008100 <sp_32_code>: */
|
/* 00008100 <sp_32_code>: */
|
||||||
0xe4905004, /* ldr r5, [r0], #4 */
|
0xe4905004, /* ldr r5, [r0], #4 */
|
||||||
|
|
@ -1521,6 +1525,7 @@ static int cfi_spansion_write_block(struct flash_bank *bank, uint8_t *buffer,
|
||||||
0xeafffffe /* b 8154 <sp_32_done> */
|
0xeafffffe /* b 8154 <sp_32_done> */
|
||||||
};
|
};
|
||||||
|
|
||||||
|
/* see contib/loaders/flash/armv4_5_cfi_span_16.s for src */
|
||||||
static const uint32_t word_16_code[] = {
|
static const uint32_t word_16_code[] = {
|
||||||
/* 00008158 <sp_16_code>: */
|
/* 00008158 <sp_16_code>: */
|
||||||
0xe0d050b2, /* ldrh r5, [r0], #2 */
|
0xe0d050b2, /* ldrh r5, [r0], #2 */
|
||||||
|
|
@ -1555,6 +1560,7 @@ static int cfi_spansion_write_block(struct flash_bank *bank, uint8_t *buffer,
|
||||||
0xeafffffe /* b 81ac <sp_16_done> */
|
0xeafffffe /* b 81ac <sp_16_done> */
|
||||||
};
|
};
|
||||||
|
|
||||||
|
/* see contib/loaders/flash/armv4_5_cfi_span_16_dq7.s for src */
|
||||||
static const uint32_t word_16_code_dq7only[] = {
|
static const uint32_t word_16_code_dq7only[] = {
|
||||||
/* <sp_16_code>: */
|
/* <sp_16_code>: */
|
||||||
0xe0d050b2, /* ldrh r5, [r0], #2 */
|
0xe0d050b2, /* ldrh r5, [r0], #2 */
|
||||||
|
|
@ -1580,6 +1586,7 @@ static int cfi_spansion_write_block(struct flash_bank *bank, uint8_t *buffer,
|
||||||
0xeafffffe /* b 81ac <sp_16_done> */
|
0xeafffffe /* b 81ac <sp_16_done> */
|
||||||
};
|
};
|
||||||
|
|
||||||
|
/* see contib/loaders/flash/armv4_5_cfi_span_8.s for src */
|
||||||
static const uint32_t word_8_code[] = {
|
static const uint32_t word_8_code[] = {
|
||||||
/* 000081b0 <sp_16_code_end>: */
|
/* 000081b0 <sp_16_code_end>: */
|
||||||
0xe4d05001, /* ldrb r5, [r0], #1 */
|
0xe4d05001, /* ldrb r5, [r0], #1 */
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue