split startup.tcl file across modules

Moves definitions for each layer into their own file, eliminating
layering violations in the built-in TCL code.  Updates src/Makefile.am
rules to include all files in the final startup.tcl input file, and
others Makefile.am rules to distribute the new files in our packages.
__archive__
Zachary T Welch 2009-11-17 08:29:20 -08:00
parent 903daa796a
commit cb7dbc1af4
11 changed files with 246 additions and 232 deletions

View File

@ -99,7 +99,11 @@ libopenocd_la_LIBADD += -lmicrohttpd
endif
STARTUP_TCL_SRCS = \
$(srcdir)/helper/startup.tcl
$(srcdir)/helper/startup.tcl \
$(srcdir)/jtag/startup.tcl \
$(srcdir)/target/startup.tcl \
$(srcdir)/flash/startup.tcl \
$(srcdir)/server/startup.tcl
EXTRA_DIST = $(STARTUP_TCL_SRCS)

View File

@ -79,4 +79,6 @@ noinst_HEADERS = \
s3c24xx_nand.h \
s3c24xx_regs_nand.h
EXTRA_DIST = startup.tcl
MAINTAINERCLEANFILES = $(srcdir)/Makefile.in

16
src/flash/startup.tcl Normal file
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@ -0,0 +1,16 @@
# Defines basic Tcl procs for OpenOCD flash module
# Show flash in human readable form
# This is an example of a human readable form of a low level fn
proc flash_banks {} {
set i 0
set result ""
foreach {a} [ocd_flash_banks] {
if {$i > 0} {
set result "$result\n"
}
set result [format "$result#%d: %s at 0x%08x, size 0x%08x, buswidth %d, chipwidth %d" $i $a(name) $a(base) $a(size) $a(bus_width) $a(chip_width)]
set i [expr $i+1]
}
return $result
}

View File

@ -50,6 +50,8 @@ noinst_HEADERS = \
system.h \
bin2char.c
EXTRA_DIST = startup.tcl
BIN2C = bin2char$(EXEEXT_FOR_BUILD)
BUILT_SOURCES = $(BIN2C)

View File

@ -1,11 +1,8 @@
#
# Defines basic Tcl procs that must be there for
# OpenOCD to work.
# Defines basic Tcl procs that must exist for OpenOCD scripts to work.
#
# Embedded into OpenOCD executable
#
# Help text list. A list of command + help text pairs.
#
# Commands can be more than one word and they are stored
@ -22,21 +19,6 @@ proc get_help_text {} {
}
# Show flash in human readable form
# This is an example of a human readable form of a low level fn
proc flash_banks {} {
set i 0
set result ""
foreach {a} [ocd_flash_banks] {
if {$i > 0} {
set result "$result\n"
}
set result [format "$result#%d: %s at 0x%08x, size 0x%08x, buswidth %d, chipwidth %d" $i $a(name) $a(base) $a(size) $a(bus_width) $a(chip_width)]
set i [expr $i+1]
}
return $result
}
# We need to explicitly redirect this to the OpenOCD command
# as Tcl defines the exit proc
proc exit {} {
@ -133,207 +115,6 @@ proc script {filename} {
add_help_text script "<filename> - filename of OpenOCD script (tcl) to run"
# Handle GDB 'R' packet. Can be overriden by configuration script,
# but it's not something one would expect target scripts to do
# normally
proc ocd_gdb_restart {target_id} {
# Fix!!! we're resetting all targets here! Really we should reset only
# one target
reset halt
}
#########
# Temporary migration aid. May be removed starting in January 2011.
proc armv4_5 params {
echo "DEPRECATED! use 'arm $params' not 'armv4_5 $params'"
arm $params
}
#########
# This reset logic may be overridden by board/target/... scripts as needed
# to provide a reset that, if possible, is close to a power-up reset.
#
# Exit requirements include: (a) JTAG must be working, (b) the scan
# chain was validated with "jtag arp_init" (or equivalent), (c) nothing
# stays in reset. No TAP-specific scans were performed. It's OK if
# some targets haven't been reset yet; they may need TAP-specific scans.
#
# The "mode" values include: halt, init, run (from "reset" command);
# startup (at OpenOCD server startup, when JTAG may not yet work); and
# potentially more (for reset types like cold, warm, etc)
proc init_reset { mode } {
jtag arp_init-reset
}
global in_process_reset
set in_process_reset 0
# Catch reset recursion
proc ocd_process_reset { MODE } {
global in_process_reset
if {$in_process_reset} {
set in_process_reset 0
return -code error "'reset' can not be invoked recursively"
}
set in_process_reset 1
set success [expr [catch {ocd_process_reset_inner $MODE} result]==0]
set in_process_reset 0
if {$success} {
return $result
} else {
return -code error $result
}
}
proc ocd_process_reset_inner { MODE } {
set targets [target names]
# If this target must be halted...
set halt -1
if { 0 == [string compare $MODE halt] } {
set halt 1
}
if { 0 == [string compare $MODE init] } {
set halt 1;
}
if { 0 == [string compare $MODE run ] } {
set halt 0;
}
if { $halt < 0 } {
return -error "Invalid mode: $MODE, must be one of: halt, init, or run";
}
# Target event handlers *might* change which TAPs are enabled
# or disabled, so we fire all of them. But don't issue any
# target "arp_*" commands, which may issue JTAG transactions,
# unless we know the underlying TAP is active.
#
# NOTE: ARP == "Advanced Reset Process" ... "advanced" is
# relative to a previous restrictive scheme
foreach t $targets {
# New event script.
$t invoke-event reset-start
}
# Use TRST or TMS/TCK operations to reset all the tap controllers.
# TAP reset events get reported; they might enable some taps.
init_reset $MODE
# Examine all targets on enabled taps.
foreach t $targets {
if {[jtag tapisenabled [$t cget -chain-position]]} {
$t arp_examine
}
}
# Assert SRST, and report the pre/post events.
# Note: no target sees SRST before "pre" or after "post".
foreach t $targets {
$t invoke-event reset-assert-pre
}
foreach t $targets {
# C code needs to know if we expect to 'halt'
if {[jtag tapisenabled [$t cget -chain-position]]} {
$t arp_reset assert $halt
}
}
foreach t $targets {
$t invoke-event reset-assert-post
}
# Now de-assert SRST, and report the pre/post events.
# Note: no target sees !SRST before "pre" or after "post".
foreach t $targets {
$t invoke-event reset-deassert-pre
}
foreach t $targets {
# Again, de-assert code needs to know if we 'halt'
if {[jtag tapisenabled [$t cget -chain-position]]} {
$t arp_reset deassert $halt
}
}
foreach t $targets {
$t invoke-event reset-deassert-post
}
# Pass 1 - Now wait for any halt (requested as part of reset
# assert/deassert) to happen. Ideally it takes effect without
# first executing any instructions.
if { $halt } {
foreach t $targets {
if {[jtag tapisenabled [$t cget -chain-position]] == 0} {
continue
}
# Wait upto 1 second for target to halt. Why 1sec? Cause
# the JTAG tap reset signal might be hooked to a slow
# resistor/capacitor circuit - and it might take a while
# to charge
# Catch, but ignore any errors.
catch { $t arp_waitstate halted 1000 }
# Did we succeed?
set s [$t curstate]
if { 0 != [string compare $s "halted" ] } {
return -error [format "TARGET: %s - Not halted" $t]
}
}
}
#Pass 2 - if needed "init"
if { 0 == [string compare init $MODE] } {
foreach t $targets {
if {[jtag tapisenabled [$t cget -chain-position]] == 0} {
continue
}
set err [catch "$t arp_waitstate halted 5000"]
# Did it halt?
if { $err == 0 } {
$t invoke-event reset-init
}
}
}
foreach t $targets {
$t invoke-event reset-end
}
}
#########
# REVISIT power_restore, power_dropout, srst_deasserted, srst_asserted
# are currently neither documented nor supported except on ZY1000.
proc power_restore {} {
puts "Sensed power restore."
reset init
}
add_help_text power_restore "Overridable procedure run when power restore is detected. Runs 'reset init' by default."
proc power_dropout {} {
puts "Sensed power dropout."
}
proc srst_deasserted {} {
puts "Sensed nSRST deasserted."
reset init
}
add_help_text srst_deasserted "Overridable procedure run when srst deassert is detected. Runs 'reset init' by default."
proc srst_asserted {} {
puts "Sensed nSRST asserted."
}
#########
# catch any exceptions, capture output and return output
@ -343,13 +124,3 @@ proc capture_catch {a} {
} result
return $result
}
# Executed during "init". Can be overridden
# by board/target/... scripts
proc jtag_init {} {
if {[catch {jtag arp_init} err]!=0} {
# try resetting additionally
init_reset startup
}
}

View File

@ -94,4 +94,6 @@ noinst_HEADERS = \
rlink/st7.h \
minidummy/jtag_minidriver.h
EXTRA_DIST = startup.tcl
MAINTAINERCLEANFILES = $(srcdir)/Makefile.in

41
src/jtag/startup.tcl Normal file
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@ -0,0 +1,41 @@
# Defines basic Tcl procs for OpenOCD JTAG module
# Executed during "init". Can be overridden
# by board/target/... scripts
proc jtag_init {} {
if {[catch {jtag arp_init} err]!=0} {
# try resetting additionally
init_reset startup
}
}
#########
# TODO: power_restore and power_dropout are currently neither
# documented nor supported except on ZY1000.
proc power_restore {} {
puts "Sensed power restore."
reset init
}
add_help_text power_restore "Overridable procedure run when power restore is detected. Runs 'reset init' by default."
proc power_dropout {} {
puts "Sensed power dropout."
}
#########
# TODO: srst_deasserted and srst_asserted are currently neither
# documented nor supported except on ZY1000.
proc srst_deasserted {} {
puts "Sensed nSRST deasserted."
reset init
}
add_help_text srst_deasserted "Overridable procedure run when srst deassert is detected. Runs 'reset init' by default."
proc srst_asserted {} {
puts "Sensed nSRST asserted."
}

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@ -35,6 +35,7 @@ nobase_dist_pkgdata_DATA = \
endif
EXTRA_DIST = \
startup.tcl \
httpd/readme.txt \
httpd/menu.xml \
httpd/menu.xsl \

8
src/server/startup.tcl Normal file
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@ -0,0 +1,8 @@
# Handle GDB 'R' packet. Can be overriden by configuration script,
# but it's not something one would expect target scripts to do
# normally
proc ocd_gdb_restart {target_id} {
# Fix!!! we're resetting all targets here! Really we should reset only
# one target
reset halt
}

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@ -13,7 +13,9 @@ AM_CPPFLAGS = \
BIN2C = $(top_builddir)/src/helper/bin2char$(EXEEXT_FOR_BUILD)
DEBUG_HANDLER = $(srcdir)/xscale/debug_handler.bin
EXTRA_DIST = $(DEBUG_HANDLER)
EXTRA_DIST = \
startup.tcl \
$(DEBUG_HANDLER)
DEBUG_HEADER = xscale_debug.h
BUILT_SOURCES = $(DEBUG_HEADER)

165
src/target/startup.tcl Normal file
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@ -0,0 +1,165 @@
#########
# This reset logic may be overridden by board/target/... scripts as needed
# to provide a reset that, if possible, is close to a power-up reset.
#
# Exit requirements include: (a) JTAG must be working, (b) the scan
# chain was validated with "jtag arp_init" (or equivalent), (c) nothing
# stays in reset. No TAP-specific scans were performed. It's OK if
# some targets haven't been reset yet; they may need TAP-specific scans.
#
# The "mode" values include: halt, init, run (from "reset" command);
# startup (at OpenOCD server startup, when JTAG may not yet work); and
# potentially more (for reset types like cold, warm, etc)
proc init_reset { mode } {
jtag arp_init-reset
}
global in_process_reset
set in_process_reset 0
# Catch reset recursion
proc ocd_process_reset { MODE } {
global in_process_reset
if {$in_process_reset} {
set in_process_reset 0
return -code error "'reset' can not be invoked recursively"
}
set in_process_reset 1
set success [expr [catch {ocd_process_reset_inner $MODE} result]==0]
set in_process_reset 0
if {$success} {
return $result
} else {
return -code error $result
}
}
proc ocd_process_reset_inner { MODE } {
set targets [target names]
# If this target must be halted...
set halt -1
if { 0 == [string compare $MODE halt] } {
set halt 1
}
if { 0 == [string compare $MODE init] } {
set halt 1;
}
if { 0 == [string compare $MODE run ] } {
set halt 0;
}
if { $halt < 0 } {
return -error "Invalid mode: $MODE, must be one of: halt, init, or run";
}
# Target event handlers *might* change which TAPs are enabled
# or disabled, so we fire all of them. But don't issue any
# target "arp_*" commands, which may issue JTAG transactions,
# unless we know the underlying TAP is active.
#
# NOTE: ARP == "Advanced Reset Process" ... "advanced" is
# relative to a previous restrictive scheme
foreach t $targets {
# New event script.
$t invoke-event reset-start
}
# Use TRST or TMS/TCK operations to reset all the tap controllers.
# TAP reset events get reported; they might enable some taps.
init_reset $MODE
# Examine all targets on enabled taps.
foreach t $targets {
if {[jtag tapisenabled [$t cget -chain-position]]} {
$t arp_examine
}
}
# Assert SRST, and report the pre/post events.
# Note: no target sees SRST before "pre" or after "post".
foreach t $targets {
$t invoke-event reset-assert-pre
}
foreach t $targets {
# C code needs to know if we expect to 'halt'
if {[jtag tapisenabled [$t cget -chain-position]]} {
$t arp_reset assert $halt
}
}
foreach t $targets {
$t invoke-event reset-assert-post
}
# Now de-assert SRST, and report the pre/post events.
# Note: no target sees !SRST before "pre" or after "post".
foreach t $targets {
$t invoke-event reset-deassert-pre
}
foreach t $targets {
# Again, de-assert code needs to know if we 'halt'
if {[jtag tapisenabled [$t cget -chain-position]]} {
$t arp_reset deassert $halt
}
}
foreach t $targets {
$t invoke-event reset-deassert-post
}
# Pass 1 - Now wait for any halt (requested as part of reset
# assert/deassert) to happen. Ideally it takes effect without
# first executing any instructions.
if { $halt } {
foreach t $targets {
if {[jtag tapisenabled [$t cget -chain-position]] == 0} {
continue
}
# Wait upto 1 second for target to halt. Why 1sec? Cause
# the JTAG tap reset signal might be hooked to a slow
# resistor/capacitor circuit - and it might take a while
# to charge
# Catch, but ignore any errors.
catch { $t arp_waitstate halted 1000 }
# Did we succeed?
set s [$t curstate]
if { 0 != [string compare $s "halted" ] } {
return -error [format "TARGET: %s - Not halted" $t]
}
}
}
#Pass 2 - if needed "init"
if { 0 == [string compare init $MODE] } {
foreach t $targets {
if {[jtag tapisenabled [$t cget -chain-position]] == 0} {
continue
}
set err [catch "$t arp_waitstate halted 5000"]
# Did it halt?
if { $err == 0 } {
$t invoke-event reset-init
}
}
}
foreach t $targets {
$t invoke-event reset-end
}
}
#########
# Temporary migration aid. May be removed starting in January 2011.
proc armv4_5 params {
echo "DEPRECATED! use 'arm $params' not 'armv4_5 $params'"
arm $params
}