David Brownell <david-b@pacbell.net>
Cleanup some the downloaded ARM target algorithm code: - Provide more complete disassembly of the DCC bulk write code - Make code blocks "static const", in case GCC doesn't - Fix some tabbing/layout issues - Make some arm7_9_common.h flags be "bool" not "int"; and compact the layout a bit (group most bools together) git-svn-id: svn://svn.berlios.de/openocd/trunk@2698 b42882b7-edfa-0310-969c-e2dbd0fdcd60__archive__
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f6a29d438e
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c993d75d1f
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@ -2657,8 +2657,21 @@ static int arm7_9_dcc_completion(struct target_s *target, uint32_t exit_point, i
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static const uint32_t dcc_code[] =
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static const uint32_t dcc_code[] =
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{
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{
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/* MRC TST BNE MRC STR B */
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/* r0 == input, points to memory buffer
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0xee101e10, 0xe3110001, 0x0afffffc, 0xee111e10, 0xe4801004, 0xeafffff9
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* r1 == scratch
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*/
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/* spin until DCC control (c0) reports data arrived */
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0xee101e10, /* w: mrc p14, #0, r1, c0, c0 */
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0xe3110001, /* tst r1, #1 */
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0x0afffffc, /* bne w */
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/* read word from DCC (c1), write to memory */
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0xee111e10, /* mrc p14, #0, r1, c1, c0 */
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0xe4801004, /* str r1, [r0], #4 */
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/* repeat */
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0xeafffff9 /* b w */
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};
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};
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int armv4_5_run_algorithm_inner(struct target_s *target, int num_mem_params, mem_param_t *mem_params, int num_reg_params, reg_param_t *reg_params, uint32_t entry_point, uint32_t exit_point, int timeout_ms, void *arch_info, int (*run_it)(struct target_s *target, uint32_t exit_point, int timeout_ms, void *arch_info));
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int armv4_5_run_algorithm_inner(struct target_s *target, int num_mem_params, mem_param_t *mem_params, int num_reg_params, reg_param_t *reg_params, uint32_t entry_point, uint32_t exit_point, int timeout_ms, void *arch_info, int (*run_it)(struct target_s *target, uint32_t exit_point, int timeout_ms, void *arch_info));
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@ -2736,7 +2749,7 @@ int arm7_9_checksum_memory(struct target_s *target, uint32_t address, uint32_t c
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reg_param_t reg_params[2];
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reg_param_t reg_params[2];
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int retval;
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int retval;
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uint32_t arm7_9_crc_code[] = {
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static const uint32_t arm7_9_crc_code[] = {
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0xE1A02000, /* mov r2, r0 */
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0xE1A02000, /* mov r2, r0 */
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0xE3E00000, /* mov r0, #0xffffffff */
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0xE3E00000, /* mov r0, #0xffffffff */
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0xE1A03001, /* mov r3, r1 */
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0xE1A03001, /* mov r3, r1 */
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@ -2818,7 +2831,7 @@ int arm7_9_blank_check_memory(struct target_s *target, uint32_t address, uint32_
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int retval;
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int retval;
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uint32_t i;
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uint32_t i;
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uint32_t erase_check_code[] =
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static const uint32_t erase_check_code[] =
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{
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{
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/* loop: */
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/* loop: */
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0xe4d03001, /* ldrb r3, [r0], #1 */
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0xe4d03001, /* ldrb r3, [r0], #1 */
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@ -46,6 +46,8 @@ typedef struct arm7_9_common_s
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uint32_t arm_bkpt; /**< ARM breakpoint instruction */
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uint32_t arm_bkpt; /**< ARM breakpoint instruction */
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uint16_t thumb_bkpt; /**< Thumb breakpoint instruction */
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uint16_t thumb_bkpt; /**< Thumb breakpoint instruction */
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bool force_hw_bkpts;
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int sw_breakpoints_added; /**< Specifies which watchpoint software breakpoints are setup on */
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int sw_breakpoints_added; /**< Specifies which watchpoint software breakpoints are setup on */
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int sw_breakpoint_count; /**< keep track of number of software breakpoints we have set */
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int sw_breakpoint_count; /**< keep track of number of software breakpoints we have set */
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int breakpoint_count; /**< Current number of set breakpoints */
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int breakpoint_count; /**< Current number of set breakpoints */
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@ -54,24 +56,23 @@ typedef struct arm7_9_common_s
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int wp0_used; /**< Specifies if and how watchpoint unit 0 is used */
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int wp0_used; /**< Specifies if and how watchpoint unit 0 is used */
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int wp1_used; /**< Specifies if and how watchpoint unit 1 is used */
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int wp1_used; /**< Specifies if and how watchpoint unit 1 is used */
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int wp1_used_default; /**< Specifies if and how watchpoint unit 1 is used by default */
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int wp1_used_default; /**< Specifies if and how watchpoint unit 1 is used by default */
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int force_hw_bkpts;
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int dbgreq_adjust_pc; /**< Amount of PC adjustment caused by a DBGREQ */
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int dbgreq_adjust_pc; /**< Amount of PC adjustment caused by a DBGREQ */
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int use_dbgrq; /**< Specifies if DBGRQ should be used to halt the target */
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bool use_dbgrq; /**< Specifies if DBGRQ should be used to halt the target */
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int need_bypass_before_restart; /**< Specifies if there should be a bypass before a JTAG restart */
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bool need_bypass_before_restart; /**< Specifies if there should be a bypass before a JTAG restart */
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bool has_single_step;
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bool has_monitor_mode;
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bool has_vector_catch; /**< Specifies if the target has a reset vector catch */
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bool debug_entry_from_reset; /**< Specifies if debug entry was from a reset */
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bool fast_memory_access;
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bool dcc_downloads;
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etm_context_t *etm_ctx;
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etm_context_t *etm_ctx;
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int has_single_step;
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int has_monitor_mode;
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int has_vector_catch; /**< Specifies if the target has a reset vector catch */
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int debug_entry_from_reset; /**< Specifies if debug entry was from a reset */
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struct working_area_s *dcc_working_area;
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struct working_area_s *dcc_working_area;
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int fast_memory_access;
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int dcc_downloads;
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int (*examine_debug_reason)(target_t *target); /**< Function for determining why debug state was entered */
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int (*examine_debug_reason)(target_t *target); /**< Function for determining why debug state was entered */
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void (*change_to_arm)(target_t *target, uint32_t *r0, uint32_t *pc); /**< Function for changing from Thumb to ARM mode */
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void (*change_to_arm)(target_t *target, uint32_t *r0, uint32_t *pc); /**< Function for changing from Thumb to ARM mode */
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@ -573,7 +573,7 @@ int armv7m_checksum_memory(struct target_s *target, uint32_t address, uint32_t c
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reg_param_t reg_params[2];
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reg_param_t reg_params[2];
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int retval;
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int retval;
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uint16_t cortex_m3_crc_code[] = {
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static const uint16_t cortex_m3_crc_code[] = {
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0x4602, /* mov r2, r0 */
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0x4602, /* mov r2, r0 */
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0xF04F, 0x30FF, /* mov r0, #0xffffffff */
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0xF04F, 0x30FF, /* mov r0, #0xffffffff */
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0x460B, /* mov r3, r1 */
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0x460B, /* mov r3, r1 */
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@ -655,7 +655,7 @@ int armv7m_blank_check_memory(struct target_s *target, uint32_t address, uint32_
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int retval;
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int retval;
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uint32_t i;
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uint32_t i;
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uint16_t erase_check_code[] =
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static const uint16_t erase_check_code[] =
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{
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{
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/* loop: */
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/* loop: */
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0xF810, 0x3B01, /* ldrb r3, [r0], #1 */
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0xF810, 0x3B01, /* ldrb r3, [r0], #1 */
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