From c993d75d1febddc96286b0d41b682ab81bf28684 Mon Sep 17 00:00:00 2001 From: oharboe Date: Sat, 12 Sep 2009 08:10:19 +0000 Subject: [PATCH] David Brownell Cleanup some the downloaded ARM target algorithm code: - Provide more complete disassembly of the DCC bulk write code - Make code blocks "static const", in case GCC doesn't - Fix some tabbing/layout issues - Make some arm7_9_common.h flags be "bool" not "int"; and compact the layout a bit (group most bools together) git-svn-id: svn://svn.berlios.de/openocd/trunk@2698 b42882b7-edfa-0310-969c-e2dbd0fdcd60 --- src/target/arm7_9_common.c | 35 ++++++++++++++++++++++++----------- src/target/arm7_9_common.h | 25 +++++++++++++------------ src/target/armv7m.c | 8 ++++---- 3 files changed, 41 insertions(+), 27 deletions(-) diff --git a/src/target/arm7_9_common.c b/src/target/arm7_9_common.c index 6f76c07cf..9f05d777e 100644 --- a/src/target/arm7_9_common.c +++ b/src/target/arm7_9_common.c @@ -2657,8 +2657,21 @@ static int arm7_9_dcc_completion(struct target_s *target, uint32_t exit_point, i static const uint32_t dcc_code[] = { - /* MRC TST BNE MRC STR B */ - 0xee101e10, 0xe3110001, 0x0afffffc, 0xee111e10, 0xe4801004, 0xeafffff9 + /* r0 == input, points to memory buffer + * r1 == scratch + */ + + /* spin until DCC control (c0) reports data arrived */ + 0xee101e10, /* w: mrc p14, #0, r1, c0, c0 */ + 0xe3110001, /* tst r1, #1 */ + 0x0afffffc, /* bne w */ + + /* read word from DCC (c1), write to memory */ + 0xee111e10, /* mrc p14, #0, r1, c1, c0 */ + 0xe4801004, /* str r1, [r0], #4 */ + + /* repeat */ + 0xeafffff9 /* b w */ }; int armv4_5_run_algorithm_inner(struct target_s *target, int num_mem_params, mem_param_t *mem_params, int num_reg_params, reg_param_t *reg_params, uint32_t entry_point, uint32_t exit_point, int timeout_ms, void *arch_info, int (*run_it)(struct target_s *target, uint32_t exit_point, int timeout_ms, void *arch_info)); @@ -2736,7 +2749,7 @@ int arm7_9_checksum_memory(struct target_s *target, uint32_t address, uint32_t c reg_param_t reg_params[2]; int retval; - uint32_t arm7_9_crc_code[] = { + static const uint32_t arm7_9_crc_code[] = { 0xE1A02000, /* mov r2, r0 */ 0xE3E00000, /* mov r0, #0xffffffff */ 0xE1A03001, /* mov r3, r1 */ @@ -2818,15 +2831,15 @@ int arm7_9_blank_check_memory(struct target_s *target, uint32_t address, uint32_ int retval; uint32_t i; - uint32_t erase_check_code[] = + static const uint32_t erase_check_code[] = { - /* loop: */ - 0xe4d03001, /* ldrb r3, [r0], #1 */ - 0xe0022003, /* and r2, r2, r3 */ - 0xe2511001, /* subs r1, r1, #1 */ - 0x1afffffb, /* bne loop */ - /* end: */ - 0xeafffffe /* b end */ + /* loop: */ + 0xe4d03001, /* ldrb r3, [r0], #1 */ + 0xe0022003, /* and r2, r2, r3 */ + 0xe2511001, /* subs r1, r1, #1 */ + 0x1afffffb, /* bne loop */ + /* end: */ + 0xeafffffe /* b end */ }; /* make sure we have a working area */ diff --git a/src/target/arm7_9_common.h b/src/target/arm7_9_common.h index 68197b46d..b3c3c5833 100644 --- a/src/target/arm7_9_common.h +++ b/src/target/arm7_9_common.h @@ -46,6 +46,8 @@ typedef struct arm7_9_common_s uint32_t arm_bkpt; /**< ARM breakpoint instruction */ uint16_t thumb_bkpt; /**< Thumb breakpoint instruction */ + bool force_hw_bkpts; + int sw_breakpoints_added; /**< Specifies which watchpoint software breakpoints are setup on */ int sw_breakpoint_count; /**< keep track of number of software breakpoints we have set */ int breakpoint_count; /**< Current number of set breakpoints */ @@ -54,24 +56,23 @@ typedef struct arm7_9_common_s int wp0_used; /**< Specifies if and how watchpoint unit 0 is used */ int wp1_used; /**< Specifies if and how watchpoint unit 1 is used */ int wp1_used_default; /**< Specifies if and how watchpoint unit 1 is used by default */ - int force_hw_bkpts; int dbgreq_adjust_pc; /**< Amount of PC adjustment caused by a DBGREQ */ - int use_dbgrq; /**< Specifies if DBGRQ should be used to halt the target */ - int need_bypass_before_restart; /**< Specifies if there should be a bypass before a JTAG restart */ + bool use_dbgrq; /**< Specifies if DBGRQ should be used to halt the target */ + bool need_bypass_before_restart; /**< Specifies if there should be a bypass before a JTAG restart */ + + bool has_single_step; + bool has_monitor_mode; + bool has_vector_catch; /**< Specifies if the target has a reset vector catch */ + + bool debug_entry_from_reset; /**< Specifies if debug entry was from a reset */ + + bool fast_memory_access; + bool dcc_downloads; etm_context_t *etm_ctx; - int has_single_step; - int has_monitor_mode; - int has_vector_catch; /**< Specifies if the target has a reset vector catch */ - - int debug_entry_from_reset; /**< Specifies if debug entry was from a reset */ - struct working_area_s *dcc_working_area; - int fast_memory_access; - int dcc_downloads; - int (*examine_debug_reason)(target_t *target); /**< Function for determining why debug state was entered */ void (*change_to_arm)(target_t *target, uint32_t *r0, uint32_t *pc); /**< Function for changing from Thumb to ARM mode */ diff --git a/src/target/armv7m.c b/src/target/armv7m.c index 45722f542..75a2fb9e3 100644 --- a/src/target/armv7m.c +++ b/src/target/armv7m.c @@ -573,7 +573,7 @@ int armv7m_checksum_memory(struct target_s *target, uint32_t address, uint32_t c reg_param_t reg_params[2]; int retval; - uint16_t cortex_m3_crc_code[] = { + static const uint16_t cortex_m3_crc_code[] = { 0x4602, /* mov r2, r0 */ 0xF04F, 0x30FF, /* mov r0, #0xffffffff */ 0x460B, /* mov r3, r1 */ @@ -655,11 +655,11 @@ int armv7m_blank_check_memory(struct target_s *target, uint32_t address, uint32_ int retval; uint32_t i; - uint16_t erase_check_code[] = + static const uint16_t erase_check_code[] = { /* loop: */ - 0xF810, 0x3B01, /* ldrb r3, [r0], #1 */ - 0xEA02, 0x0203, /* and r2, r2, r3 */ + 0xF810, 0x3B01, /* ldrb r3, [r0], #1 */ + 0xEA02, 0x0203, /* and r2, r2, r3 */ 0x3901, /* subs r1, r1, #1 */ 0xD1F9, /* bne loop */ /* end: */