crc check on flashed data
parent
d09bef2622
commit
c989de0cea
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@ -716,7 +716,7 @@ static int dsp5680xx_read_32_single(struct target * target, uint32_t address, ui
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uint16_t tmp;
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retval = eonce_rx_upper_data(target,&tmp);
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err_check_propagate(retval);
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*data_read = (((*data_read)<<16) | tmp);
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*data_read = ((tmp<<16) | (*data_read));//This enables opencd crc to succeed, even though it's very slow.
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return retval;
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}
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@ -973,7 +973,34 @@ static int dsp5680xx_read_buffer(struct target * target, uint32_t address, uint3
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}
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static int dsp5680xx_checksum_memory(struct target * target, uint32_t address, uint32_t size, uint32_t * checksum){
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return ERROR_FAIL; //this makes openocd do the crc
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//TODO implement.
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//This will make openocd do the work, but it will fail because of the word/byte addressing issues.
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int retval;
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struct working_area * crc_algorithm;
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retval = target_alloc_working_area(target, 20, &crc_algorithm);
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if(retval != ERROR_OK)
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return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
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retval = target_free_working_area(target, crc_algorithm);
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return ERROR_FAIL;
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}
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// Data signature algorithm used by the core FM (flash module)
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static int perl_crc(uint16_t * buff16,uint32_t word_count){
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uint16_t checksum = 0xffff;
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uint16_t data,fbmisr;
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uint32_t i;
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for(i=0;i<word_count;i++){
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data = buff16[i];
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fbmisr = (checksum & 2)>>1 ^ (checksum & 4)>>2 ^ (checksum & 16)>>4 ^ (checksum & 0x8000)>>15;
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checksum = (data ^ ((checksum << 1) | fbmisr));
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}
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i--;
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for(;!(i&0x80000000);i--){
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data = buff16[i];
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fbmisr = (checksum & 2)>>1 ^ (checksum & 4)>>2 ^ (checksum & 16)>>4 ^ (checksum & 0x8000)>>15;
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checksum = (data ^ ((checksum << 1) | fbmisr));
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}
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return checksum;
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}
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int dsp5680xx_f_SIM_reset(struct target * target){
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@ -1025,7 +1052,7 @@ int dsp5680xx_f_protect_check(struct target * target, uint8_t * protected) {
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return retval;
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}
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static int dsp5680xx_f_execute_command(struct target * target, uint16_t command, uint32_t address, uint16_t * hfm_ustat, int pmem){
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static int dsp5680xx_f_execute_command(struct target * target, uint16_t command, uint32_t address, uint32_t data, uint16_t * hfm_ustat, int pmem){
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int retval;
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retval = eonce_load_TX_RX_high_to_r0(target);
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err_check_propagate(retval);
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@ -1057,6 +1084,8 @@ static int dsp5680xx_f_execute_command(struct target * target, uint16_t command,
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err_check_propagate(retval);
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retval = eonce_move_value_at_r2_disp(target,0x00,HFM_PROTB); // write to HMF_PROTB, clear protection
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err_check_propagate(retval);
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retval = eonce_move_value_to_y0(target,data);
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err_check_propagate(retval);
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retval = eonce_move_long_to_r3(target,address); // write to the flash block
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err_check_propagate(retval);
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if (pmem){
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@ -1125,6 +1154,23 @@ static int eonce_set_hfmdiv(struct target * target){
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return ERROR_OK;
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}
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static int dsp5680xx_f_signature(struct target * target, uint32_t address, uint32_t words, uint16_t * signature){
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int retval;
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uint16_t hfm_ustat;
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if (dsp5680xx_target_status(target,NULL,NULL) != TARGET_HALTED){
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retval = eonce_enter_debug_mode(target,NULL);
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err_check_propagate(retval);
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}
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retval = dsp5680xx_f_execute_command(target,HFM_CALCULATE_DATA_SIGNATURE,address,words,&hfm_ustat,1);
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err_check_propagate(retval);
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if (hfm_ustat&HFM_USTAT_MASK_PVIOL_ACCER){
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retval = ERROR_TARGET_FAILURE;
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err_check(retval,"HFM exec error:pviol and/or accer bits set.");
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}
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retval = dsp5680xx_read_16_single(target, HFM_BASE_ADDR|HFM_DATA, signature, 0);
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return retval;
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}
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int dsp5680xx_f_erase_check(struct target * target, uint8_t * erased){
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int retval;
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uint16_t hfm_ustat;
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@ -1150,7 +1196,7 @@ int dsp5680xx_f_erase_check(struct target * target, uint8_t * erased){
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// Check if chip is already erased.
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// Since only mass erase is currently implemented, only the first sector is checked (assuming no code will leave it unused)
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retval = dsp5680xx_f_execute_command(target,HFM_ERASE_VERIFY,HFM_FLASH_BASE_ADDR+0*HFM_SECTOR_SIZE,&hfm_ustat,1); // blank check
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retval = dsp5680xx_f_execute_command(target,HFM_ERASE_VERIFY,HFM_FLASH_BASE_ADDR+0*HFM_SECTOR_SIZE,0,&hfm_ustat,1); // blank check
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err_check_propagate(retval);
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if (hfm_ustat&HFM_USTAT_MASK_PVIOL_ACCER){
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retval = ERROR_TARGET_FAILURE;
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@ -1204,7 +1250,7 @@ int dsp5680xx_f_erase(struct target * target, int first, int last){
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// Execute mass erase command.
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uint16_t hfm_ustat;
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uint16_t hfm_cmd = HFM_MASS_ERASE;
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retval = dsp5680xx_f_execute_command(target,hfm_cmd,HFM_FLASH_BASE_ADDR+0*HFM_SECTOR_SIZE,&hfm_ustat,1);
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retval = dsp5680xx_f_execute_command(target,hfm_cmd,HFM_FLASH_BASE_ADDR+0*HFM_SECTOR_SIZE,0,&hfm_ustat,1);
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err_check_propagate(retval);
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if (hfm_ustat&HFM_USTAT_MASK_PVIOL_ACCER){
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retval = ERROR_TARGET_FAILURE;
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@ -1332,11 +1378,12 @@ int dsp5680xx_f_wr(struct target * target, uint8_t *buffer, uint32_t address, ui
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int counter_reset = FLUSH_COUNT_FLASH;
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int counter = counter_reset;
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context.flush = 0;
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for(uint32_t i=1; (i<count/2)&&(i<HFM_SIZE_REAL); i++){
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if(--counter==0){
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context.flush = 1;
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counter = counter_reset;
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}
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uint32_t i;
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for(i=1; (i<count/2)&&(i<HFM_SIZE_REAL); i++){
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if(--counter==0){
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context.flush = 1;
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counter = counter_reset;
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}
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retval = eonce_tx_upper_data(target,buff16[i],&drscan_data);
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if(retval!=ERROR_OK){
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context.flush = 1;
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@ -1345,9 +1392,23 @@ int dsp5680xx_f_wr(struct target * target, uint8_t *buffer, uint32_t address, ui
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context.flush = 0;
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}
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context.flush = 1;
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// -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
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// Verify flash
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// -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
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uint16_t signature;
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uint16_t pc_crc;
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retval = dsp5680xx_f_signature(target,address,i,&signature);
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err_check_propagate(retval);
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pc_crc = perl_crc(buff16,i);
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if(pc_crc != signature){
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retval = ERROR_FAIL;
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err_check(retval,"Flashed data failed CRC check, flash again!");
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}
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return retval;
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}
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int dsp5680xx_f_unlock(struct target * target){
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int retval;
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if(target->tap->enabled){
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