aarch64: add cache handling when setting/deleting soft breakpoints
Flush D-Cache before, flush D-Cache and invalidate I-Cache after modifying the breakpoint location. Change-Id: Id2e2f4f2545c062de7e27275f66857357496d4ae Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>gitignore-build
parent
e17d1d4dc8
commit
c6ed75fb0e
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@ -27,6 +27,7 @@
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#include "target_request.h"
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#include "target_request.h"
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#include "target_type.h"
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#include "target_type.h"
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#include "armv8_opcodes.h"
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#include "armv8_opcodes.h"
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#include "armv8_cache.h"
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#include <helper/time_support.h>
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#include <helper/time_support.h>
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static int aarch64_poll(struct target *target);
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static int aarch64_poll(struct target *target);
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@ -1401,6 +1402,7 @@ static int aarch64_set_breakpoint(struct target *target,
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} else if (breakpoint->type == BKPT_SOFT) {
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} else if (breakpoint->type == BKPT_SOFT) {
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uint8_t code[4];
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uint8_t code[4];
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buf_set_u32(code, 0, 32, ARMV8_HLT(0x11));
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buf_set_u32(code, 0, 32, ARMV8_HLT(0x11));
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retval = target_read_memory(target,
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retval = target_read_memory(target,
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breakpoint->address & 0xFFFFFFFFFFFFFFFE,
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breakpoint->address & 0xFFFFFFFFFFFFFFFE,
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@ -1408,11 +1410,25 @@ static int aarch64_set_breakpoint(struct target *target,
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breakpoint->orig_instr);
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breakpoint->orig_instr);
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if (retval != ERROR_OK)
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if (retval != ERROR_OK)
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return retval;
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return retval;
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armv8_cache_d_inner_flush_virt(armv8,
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breakpoint->address & 0xFFFFFFFFFFFFFFFE,
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breakpoint->length);
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retval = target_write_memory(target,
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retval = target_write_memory(target,
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breakpoint->address & 0xFFFFFFFFFFFFFFFE,
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breakpoint->address & 0xFFFFFFFFFFFFFFFE,
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breakpoint->length, 1, code);
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breakpoint->length, 1, code);
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if (retval != ERROR_OK)
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if (retval != ERROR_OK)
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return retval;
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return retval;
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armv8_cache_d_inner_flush_virt(armv8,
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breakpoint->address & 0xFFFFFFFFFFFFFFFE,
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breakpoint->length);
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armv8_cache_i_inner_inval_virt(armv8,
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breakpoint->address & 0xFFFFFFFFFFFFFFFE,
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breakpoint->length);
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breakpoint->set = 0x11; /* Any nice value but 0 */
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breakpoint->set = 0x11; /* Any nice value but 0 */
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}
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}
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@ -1668,6 +1684,11 @@ static int aarch64_unset_breakpoint(struct target *target, struct breakpoint *br
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}
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}
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} else {
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} else {
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/* restore original instruction (kept in target endianness) */
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/* restore original instruction (kept in target endianness) */
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armv8_cache_d_inner_flush_virt(armv8,
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breakpoint->address & 0xFFFFFFFFFFFFFFFE,
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breakpoint->length);
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if (breakpoint->length == 4) {
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if (breakpoint->length == 4) {
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retval = target_write_memory(target,
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retval = target_write_memory(target,
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breakpoint->address & 0xFFFFFFFFFFFFFFFE,
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breakpoint->address & 0xFFFFFFFFFFFFFFFE,
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@ -1681,6 +1702,14 @@ static int aarch64_unset_breakpoint(struct target *target, struct breakpoint *br
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if (retval != ERROR_OK)
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if (retval != ERROR_OK)
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return retval;
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return retval;
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}
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}
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armv8_cache_d_inner_flush_virt(armv8,
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breakpoint->address & 0xFFFFFFFFFFFFFFFE,
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breakpoint->length);
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armv8_cache_i_inner_inval_virt(armv8,
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breakpoint->address & 0xFFFFFFFFFFFFFFFE,
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breakpoint->length);
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}
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}
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breakpoint->set = 0;
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breakpoint->set = 0;
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